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X-Received-From: 192.55.52.93 Subject: [Qemu-devel] [PATCH v3 1/9] i386: Add die-level cpu topology to x86CPU on PCMachine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Dr . David Alan Gilbert" , like.xu@linux.intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The die-level as the first PC-specific cpu topology is added to the leagcy cpu topology model, which has one die per package implicitly and only the numbers of sockets/cores/threads are configurable. In the new model with die-level support, the total number of logical processors (including offline) on board will be calculated as: #cpus =3D #sockets * #dies * #cores * #threads and considering compatibility, the default value for #dies would be initialized to one in x86_cpu_initfn() and pc_machine_initfn(). Signed-off-by: Like Xu Reviewed-by: Eduardo Habkost --- hw/i386/pc.c | 9 +++++++-- include/hw/i386/pc.h | 2 ++ target/i386/cpu.c | 1 + target/i386/cpu.h | 2 ++ 4 files changed, 12 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 12c1e08b85..9e9a42f007 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2308,9 +2308,13 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_= dev, return; } =20 - /* if APIC ID is not set, set it based on socket/core/thread propertie= s */ + /* + * If APIC ID is not set, + * set it based on socket/die/core/thread properties. + */ if (cpu->apic_id =3D=3D UNASSIGNED_APIC_ID) { - int max_socket =3D (ms->smp.max_cpus - 1) / smp_threads / smp_core= s; + int max_socket =3D (ms->smp.max_cpus - 1) / + smp_threads / smp_cores / pcms->smp_dies; =20 if (cpu->socket_id < 0) { error_setg(errp, "CPU socket-id is not set"); @@ -2620,6 +2624,7 @@ static void pc_machine_initfn(Object *obj) pcms->smbus_enabled =3D true; pcms->sata_enabled =3D true; pcms->pit_enabled =3D true; + pcms->smp_dies =3D 1; =20 pc_system_flash_create(pcms); } diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index b260262640..fae9217e34 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -24,6 +24,7 @@ * PCMachineState: * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling * @boot_cpus: number of present VCPUs + * @smp_dies: number of dies per one package */ struct PCMachineState { /*< private >*/ @@ -59,6 +60,7 @@ struct PCMachineState { bool apic_xrupt_override; unsigned apic_id_limit; uint16_t boot_cpus; + unsigned smp_dies; =20 /* NUMA information: */ uint64_t numa_nodes; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 23119699de..a16be205fe 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5619,6 +5619,7 @@ static void x86_cpu_initfn(Object *obj) CPUX86State *env =3D &cpu->env; FeatureWord w; =20 + env->nr_dies =3D 1; cpu_set_cpustate_pointers(cpu); =20 object_property_add(obj, "family", "int", diff --git a/target/i386/cpu.h b/target/i386/cpu.h index edad6e1efb..5daa2eeafa 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1349,6 +1349,8 @@ typedef struct CPUX86State { uint64_t xss; =20 TPRAccess tpr_access_type; + + unsigned nr_dies; } CPUX86State; =20 struct kvm_msrs; --=20 2.21.0