From nobody Tue Nov 11 00:17:54 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.47 as permitted sender) client-ip=209.51.188.47; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.47 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1559905105; cv=none; d=zoho.com; s=zohoarc; b=DrFNUikqd6v6sskxfGgmHo5ZglrH7Sp7tScisVjZeTuTmuFK75bAnbA1fD7UG5JOkSrtBgzpDsc33Wv0x9zA69iuL2lCcbt0bLhyVq7dest4OPeuVF5gbr4CywWyOXeTViaemCJG6sX4ObOTh6MFvdZ4Gjl0S6M60e74P87TBVI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1559905105; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=Eq2TrJxJxD5hR2pep9US6t7nvbtNw5MznMV3RDk1PUw=; b=VuB6/KKE0/tlsFx0onZQXbeLpnpMZwg4GMpkv/9H3zW/SbVpVDU31qhi3K1qIJoAJlyqZQu26JmALwGrHy55+VTY/2bkCL0bjS28Ki37bgXswRfqCTFwElp1u0fiLx6Rdzk5X+/15HgAH9+Aoy6cva/E4CJzhog8AlMQheyIKg8= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.47 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.47]) by mx.zohomail.com with SMTPS id 1559905105733550.8995454300945; Fri, 7 Jun 2019 03:58:25 -0700 (PDT) Received: from localhost ([::1]:48342 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hZCZc-0005Ox-LB for importer@patchew.org; Fri, 07 Jun 2019 06:58:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54604) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hZBYZ-0001uN-CE for qemu-devel@nongnu.org; Fri, 07 Jun 2019 05:53:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hZBYX-0000xm-AK for qemu-devel@nongnu.org; Fri, 07 Jun 2019 05:53:07 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54364) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hZBYW-0000u5-ND; Fri, 07 Jun 2019 05:53:05 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 054B830832CE; Fri, 7 Jun 2019 09:53:00 +0000 (UTC) Received: from localhost (dhcp-192-191.str.redhat.com [10.33.192.191]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A21DA5C7A1; Fri, 7 Jun 2019 09:52:59 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Fri, 7 Jun 2019 11:52:08 +0200 Message-Id: <20190607095237.11364-7-cohuck@redhat.com> In-Reply-To: <20190607095237.11364-1-cohuck@redhat.com> References: <20190607095237.11364-1-cohuck@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Fri, 07 Jun 2019 09:53:00 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 06/35] s390x/tcg: Implement VECTOR ISOLATE STRING X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Richard Henderson , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: David Hildenbrand Logic mostly courtesy of Richard H. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 6 +++++ target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 34 ++++++++++++++++++++++++ target/s390x/vec_string_helper.c | 45 ++++++++++++++++++++++++++++++++ 4 files changed, 87 insertions(+) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index fb50b404db04..1f9f0b463bdb 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -230,6 +230,12 @@ DEF_HELPER_FLAGS_4(gvec_vfene32, TCG_CALL_NO_RWG, void= , ptr, cptr, cptr, i32) DEF_HELPER_5(gvec_vfene_cc8, void, ptr, cptr, cptr, env, i32) DEF_HELPER_5(gvec_vfene_cc16, void, ptr, cptr, cptr, env, i32) DEF_HELPER_5(gvec_vfene_cc32, void, ptr, cptr, cptr, env, i32) +DEF_HELPER_FLAGS_3(gvec_vistr8, TCG_CALL_NO_RWG, void, ptr, cptr, i32) +DEF_HELPER_FLAGS_3(gvec_vistr16, TCG_CALL_NO_RWG, void, ptr, cptr, i32) +DEF_HELPER_FLAGS_3(gvec_vistr32, TCG_CALL_NO_RWG, void, ptr, cptr, i32) +DEF_HELPER_4(gvec_vistr_cc8, void, ptr, cptr, env, i32) +DEF_HELPER_4(gvec_vistr_cc16, void, ptr, cptr, env, i32) +DEF_HELPER_4(gvec_vistr_cc32, void, ptr, cptr, env, i32) =20 #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index d03c1ee0b3ab..b4a6b5960864 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1199,6 +1199,8 @@ F(0xe780, VFEE, VRR_b, V, 0, 0, 0, 0, vfee, 0, IF_VEC) /* VECTOR FIND ELEMENT NOT EQUAL */ F(0xe781, VFENE, VRR_b, V, 0, 0, 0, 0, vfene, 0, IF_VEC) +/* VECTOR ISOLATE STRING */ + F(0xe75c, VISTR, VRR_a, V, 0, 0, 0, 0, vistr, 0, IF_VEC) =20 #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.in= c.c index 1ad0b6251721..08a62eab5263 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -188,6 +188,9 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8= _t reg, TCGv_i64 enr, #define gen_gvec_2s(v1, v2, c, gen) \ tcg_gen_gvec_2s(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ 16, 16, c, gen) +#define gen_gvec_2_ool(v1, v2, data, fn) \ + tcg_gen_gvec_2_ool(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ + 16, 16, data, fn) #define gen_gvec_2i_ool(v1, v2, c, data, fn) \ tcg_gen_gvec_2i_ool(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ c, 16, 16, data, fn) @@ -2445,3 +2448,34 @@ static DisasJumpType op_vfene(DisasContext *s, Disas= Ops *o) } return DISAS_NEXT; } + +static DisasJumpType op_vistr(DisasContext *s, DisasOps *o) +{ + const uint8_t es =3D get_field(s->fields, m4); + const uint8_t m5 =3D get_field(s->fields, m5); + static gen_helper_gvec_2 * const g[3] =3D { + gen_helper_gvec_vistr8, + gen_helper_gvec_vistr16, + gen_helper_gvec_vistr32, + }; + static gen_helper_gvec_2_ptr * const g_cc[3] =3D { + gen_helper_gvec_vistr_cc8, + gen_helper_gvec_vistr_cc16, + gen_helper_gvec_vistr_cc32, + }; + + if (es > ES_32 || m5 & ~0x1) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + if (extract32(m5, 0, 1)) { + gen_gvec_2_ptr(get_field(s->fields, v1), get_field(s->fields, v2), + cpu_env, 0, g_cc[es]); + set_cc_static(s); + } else { + gen_gvec_2_ool(get_field(s->fields, v1), get_field(s->fields, v2),= 0, + g[es]); + } + return DISAS_NEXT; +} diff --git a/target/s390x/vec_string_helper.c b/target/s390x/vec_string_hel= per.c index 0ee3470112b5..6bafa23bd723 100644 --- a/target/s390x/vec_string_helper.c +++ b/target/s390x/vec_string_helper.c @@ -283,3 +283,48 @@ void HELPER(gvec_vfene_cc##BITS)(void *v1, const void = *v2, const void *v3, \ DEF_VFENE_CC_HELPER(8) DEF_VFENE_CC_HELPER(16) DEF_VFENE_CC_HELPER(32) + +static int vistr(void *v1, const void *v2, uint8_t es) +{ + const uint64_t mask =3D get_element_lsbs_mask(es); + uint64_t a0 =3D s390_vec_read_element64(v2, 0); + uint64_t a1 =3D s390_vec_read_element64(v2, 1); + uint64_t z; + int cc =3D 3; + + z =3D zero_search(a0, mask); + if (z) { + a0 &=3D ~(-1ull >> clz64(z)); + a1 =3D 0; + cc =3D 0; + } else { + z =3D zero_search(a1, mask); + if (z) { + a1 &=3D ~(-1ull >> clz64(z)); + cc =3D 0; + } + } + + s390_vec_write_element64(v1, 0, a0); + s390_vec_write_element64(v1, 1, a1); + return cc; +} + +#define DEF_VISTR_HELPER(BITS) = \ +void HELPER(gvec_vistr##BITS)(void *v1, const void *v2, uint32_t desc) = \ +{ = \ + vistr(v1, v2, MO_##BITS); = \ +} +DEF_VISTR_HELPER(8) +DEF_VISTR_HELPER(16) +DEF_VISTR_HELPER(32) + +#define DEF_VISTR_CC_HELPER(BITS) = \ +void HELPER(gvec_vistr_cc##BITS)(void *v1, const void *v2, CPUS390XState *= env, \ + uint32_t desc) = \ +{ = \ + env->cc_op =3D vistr(v1, v2, MO_##BITS); = \ +} +DEF_VISTR_CC_HELPER(8) +DEF_VISTR_CC_HELPER(16) +DEF_VISTR_CC_HELPER(32) --=20 2.20.1