From nobody Sun Oct 5 00:12:48 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.47 as permitted sender) client-ip=209.51.188.47; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.47 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1559899704; cv=none; d=zoho.com; s=zohoarc; b=mXNvCPH9i4O7vZU3BJsc2TLrMRh6+i/fL79gfhvBtFfiVqkzf1fuVyTi9npTLb4fY2tEa9LyfnfTNYjTmuW7xdHW+fwzBShzGao8UV1FQc9/tDGfb9HvKYu9yJLid2jMHTyXw5Y1iEdvG2lV/xJelXZzNZ+ttknmYE5tZ4VbQ9w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1559899704; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=Oabu6CouOtU+d1WLJK3DndPmSla5lQ2sU7BlCGC7sgk=; b=i5Jd3pgg3Q1UtAF5XYaebdYmaVEfxxUp6Gw8W5NSlXhM4J1Cvbmn5cegZPmp9pQ/fBh1wMHRziSU8CSaKDNHzkiQ/KHgiK46JYFi6vljIB4QPlwnrv8wIYaGAp8B1QfUF4vMnxp+sUYroUq6iIICNDFd0JRBBUbbJjUT4q5q4eo= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.47 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.47]) by mx.zohomail.com with SMTPS id 155989970487951.875509429926865; Fri, 7 Jun 2019 02:28:24 -0700 (PDT) Received: from localhost ([::1]:47468 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hZBAd-0004rY-Dg for importer@patchew.org; Fri, 07 Jun 2019 05:28:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41383) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hZAuR-0000no-Mn for qemu-devel@nongnu.org; Fri, 07 Jun 2019 05:11:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hZAuO-0002qP-2y for qemu-devel@nongnu.org; Fri, 07 Jun 2019 05:11:39 -0400 Received: from mail03.asahi-net.or.jp ([202.224.55.15]:41364) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hZAuN-0002Zn-MI for qemu-devel@nongnu.org; Fri, 07 Jun 2019 05:11:35 -0400 Received: from h61-195-96-97.vps.ablenet.jp (h61-195-96-97.ablenetvps.ne.jp [61.195.96.97]) (Authenticated sender: PQ4Y-STU) by mail03.asahi-net.or.jp (Postfix) with ESMTPA id 5057E49ADB; Fri, 7 Jun 2019 18:11:29 +0900 (JST) Received: from yo-satoh-debian.localdomain (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by h61-195-96-97.vps.ablenet.jp (Postfix) with ESMTPSA id E294E240085; Fri, 7 Jun 2019 18:11:28 +0900 (JST) From: Yoshinori Sato To: qemu-devel@nongnu.org Date: Fri, 7 Jun 2019 18:11:05 +0900 Message-Id: <20190607091116.49044-14-ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190607091116.49044-1-ysato@users.sourceforge.jp> References: <20190607091116.49044-1-ysato@users.sourceforge.jp> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 202.224.55.15 Subject: [Qemu-devel] [PATCH v17 13/24] target/rx: Fix cpu types and names X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Richard Henderson , Yoshinori Sato , philmd@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson There was confusion here about abstract classes and naming cpus. We had registered a concrete class named "-rxcpu". This was put into the default cpu fields, and matched, so basic tests worked. However, no value for -cpu could ever match in rx_cpu_class_by_name. Rename the base class to "rx-cpu" and make it abstract. This matches what we do for most other targets. Create a new concrete cpu with the name "rx62n-rx-cpu". Signed-off-by: Richard Henderson Signed-off-by: Yoshinori Sato Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/rx/cpu.h | 12 ++++++------ hw/rx/rx-virt.c | 2 +- hw/rx/rx62n.c | 2 +- target/rx/cpu.c | 43 ++++++++++++++++++++++++++----------------- 4 files changed, 34 insertions(+), 25 deletions(-) diff --git a/target/rx/cpu.h b/target/rx/cpu.h index 8c1a4e448d..a0b6975963 100644 --- a/target/rx/cpu.h +++ b/target/rx/cpu.h @@ -24,14 +24,14 @@ #include "hw/registerfields.h" #include "qom/cpu.h" =20 -#define TYPE_RXCPU "rxcpu" +#define TYPE_RX_CPU "rx-cpu" =20 #define RXCPU_CLASS(klass) \ - OBJECT_CLASS_CHECK(RXCPUClass, (klass), TYPE_RXCPU) + OBJECT_CLASS_CHECK(RXCPUClass, (klass), TYPE_RX_CPU) #define RXCPU(obj) \ - OBJECT_CHECK(RXCPU, (obj), TYPE_RXCPU) + OBJECT_CHECK(RXCPU, (obj), TYPE_RX_CPU) #define RXCPU_GET_CLASS(obj) \ - OBJECT_GET_CLASS(RXCPUClass, (obj), TYPE_RXCPU) + OBJECT_GET_CLASS(RXCPUClass, (obj), TYPE_RX_CPU) =20 /* * RXCPUClass: @@ -164,9 +164,9 @@ static inline RXCPU *rx_env_get_cpu(CPURXState *env) =20 #define ENV_OFFSET offsetof(RXCPU, env) =20 -#define RX_CPU_TYPE_SUFFIX "-" TYPE_RXCPU +#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU #define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX -#define CPU_RESOLVING_TYPE TYPE_RXCPU +#define CPU_RESOLVING_TYPE TYPE_RX_CPU =20 extern const char rx_crname[][6]; =20 diff --git a/hw/rx/rx-virt.c b/hw/rx/rx-virt.c index 3deb7cb335..72a2989fcf 100644 --- a/hw/rx/rx-virt.c +++ b/hw/rx/rx-virt.c @@ -88,7 +88,7 @@ static void rxvirt_class_init(ObjectClass *oc, void *data) mc->desc =3D "RX QEMU Virtual Target"; mc->init =3D rxvirt_init; mc->is_default =3D 1; - mc->default_cpu_type =3D TYPE_RXCPU; + mc->default_cpu_type =3D RX_CPU_TYPE_NAME("rx62n"); } =20 static const TypeInfo rxvirt_type =3D { diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c index c6660b75b4..3a8fe7b0bf 100644 --- a/hw/rx/rx62n.c +++ b/hw/rx/rx62n.c @@ -195,7 +195,7 @@ static void rx62n_realize(DeviceState *dev, Error **err= p) } =20 object_initialize_child(OBJECT(s), "cpu", &s->cpu, - sizeof(RXCPU), TYPE_RXCPU, + sizeof(RXCPU), RX_CPU_TYPE_NAME("rx62n"), errp, NULL); object_property_set_bool(OBJECT(&s->cpu), true, "realized", errp); =20 diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 3268077d08..41fe1de4bb 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -74,13 +74,14 @@ static void rx_cpu_list_entry(gpointer data, gpointer u= ser_data) const char *typename =3D object_class_get_name(OBJECT_CLASS(data)); int len =3D strlen(typename) - strlen(RX_CPU_TYPE_SUFFIX); =20 - qemu_printf("%.*s\n", len, typename); + qemu_printf(" %.*s\n", len, typename); } =20 void rx_cpu_list(void) { - GSList *list; - list =3D object_class_get_list_sorted(TYPE_RXCPU, false); + GSList *list =3D object_class_get_list_sorted(TYPE_RX_CPU, false); + + qemu_printf("Available CPUs:\n"); g_slist_foreach(list, rx_cpu_list_entry, NULL); g_slist_free(list); } @@ -88,15 +89,17 @@ void rx_cpu_list(void) static ObjectClass *rx_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; - char *typename =3D NULL; + char *typename; =20 - typename =3D g_strdup_printf(RX_CPU_TYPE_NAME("")); + typename =3D g_strdup_printf(RX_CPU_TYPE_NAME("%s"), cpu_model); oc =3D object_class_by_name(typename); - if (oc !=3D NULL && object_class_is_abstract(oc)) { - oc =3D NULL; - } - g_free(typename); + + if (oc =3D=3D NULL || + object_class_is_abstract(oc) || + !object_class_dynamic_cast(oc, TYPE_RX_CPU)) { + return NULL; + } return oc; } =20 @@ -166,7 +169,7 @@ static void rx_cpu_init(Object *obj) qdev_init_gpio_in(DEVICE(cpu), rx_cpu_set_irq, 2); } =20 -static void rxcpu_class_init(ObjectClass *klass, void *data) +static void rx_cpu_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); CPUClass *cc =3D CPU_CLASS(klass); @@ -195,22 +198,28 @@ static void rxcpu_class_init(ObjectClass *klass, void= *data) cc->gdb_num_core_regs =3D 26; } =20 -static const TypeInfo rxcpu_info =3D { - .name =3D TYPE_RXCPU, +static const TypeInfo rx_cpu_info =3D { + .name =3D TYPE_RX_CPU, .parent =3D TYPE_CPU, .instance_size =3D sizeof(RXCPU), .instance_init =3D rx_cpu_init, - .abstract =3D false, + .abstract =3D true, .class_size =3D sizeof(RXCPUClass), - .class_init =3D rxcpu_class_init, + .class_init =3D rx_cpu_class_init, +}; + +static const TypeInfo rx62n_rx_cpu_info =3D { + .name =3D RX_CPU_TYPE_NAME("rx62n"), + .parent =3D TYPE_RX_CPU, }; =20 -static void rxcpu_register_types(void) +static void rx_cpu_register_types(void) { - type_register_static(&rxcpu_info); + type_register_static(&rx_cpu_info); + type_register_static(&rx62n_rx_cpu_info); } =20 -type_init(rxcpu_register_types) +type_init(rx_cpu_register_types) =20 static uint32_t extable[32]; =20 --=20 2.11.0