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(localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id A51621FF8C; Wed, 5 Jun 2019 17:23:26 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IDHocoT/qOpynBO1Yp20nQkSUYa2LGHJNcgaV0GU3E0=; b=eJpoWYTQmSpIk8itYd+znr5kZ/6/+hbXiC/N7oj8+8FxHOfPyqA0HsFN/chP/oWj0H kJyxxKwYDcCUWhMOSV5cDMgvCq5XoiSuntmwx3K/5HgczsAHWdmPW006KY7309zylZWC Z1wP3k/QoZzjnqQ/Zu6fALGm3venVAYuddEmFpLUjPhSciqiok/jdnDiphxSw+PR6F0i ii+VkJki3wrTewDCALT8ErI9ov4mOc7T/1BpEOkncxt1Wfq4RlVELF0eAmZpzs0sEIDc I4/N0lLONjltcnEqxU/55A9AH8Blo8yMAofA3q28aCkEP2YxzdPOFHrfwkm8TAKMrj1o CBSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IDHocoT/qOpynBO1Yp20nQkSUYa2LGHJNcgaV0GU3E0=; b=fbtI5OXW8+hnVlAjtDBIu9HnJT4mHfRQJDNPy9EzNt2ezmrv1kpdPWTKwUdAHpHRih s5698FDrP5cZ6Zi7WJ1D5sKm4tzDvWgUdUWhNIl+z8oaHgyEKXJcDcgdQTN3tP4eYAVg drAWvB8MeTbSuQVbQOtVR83fOHoiD+g7MUCTVwBNg0hV4QhBMlywKvJ0NUOrxvR77y8j LQoWDXctiY/serBOj+Nn8zh9LuZZLZMqDXUoObC5xSM5Txe+R1SyH336pqaYgIv0xgCR PJ8O8KMI98XTDvSqZf6iC3WSQFu8QGZvs8s8MQnMK+j56CWtgsI4ulNoJV7eqw6IkO33 J5/w== X-Gm-Message-State: APjAAAWwi7H2ZAG705i10R0TqTZ+wd7SiZsSbj/a3EoGt1XhwjfVbmg0 mO0bz60vCn5mq6SL86UXIUmoQw== X-Google-Smtp-Source: APXvYqwv/GRukQkosxZ7cpaW6GcBU3k62AANwM34GjysyWdny74wMa+dJxalNE63Lk3JYrigCgl7ZQ== X-Received: by 2002:adf:90e7:: with SMTP id i94mr11221398wri.213.1559751808088; Wed, 05 Jun 2019 09:23:28 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Wed, 5 Jun 2019 17:23:23 +0100 Message-Id: <20190605162326.13896-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190605162326.13896-1-alex.bennee@linaro.org> References: <20190605162326.13896-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 Subject: [Qemu-devel] [PATCH v1 1/4] cputlb: use uint64_t for interim values for unaligned load X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson , Laszlo Ersek , Paolo Bonzini , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) When running on 32 bit TCG backends a wide unaligned load ends up truncating data before returning to the guest. We specifically have the return type as uint64_t to avoid any premature truncation so we should use the same for the interim types. Fixes: https://bugs.launchpad.net/qemu/+bug/1830872 Fixes: eed5664238e Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Tested-by: Laszlo Ersek Tested-by: Igor Mammedov --- accel/tcg/cputlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index cdcc377102..b796ab1cbe 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1303,7 +1303,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCG= MemOpIdx oi, && unlikely((addr & ~TARGET_PAGE_MASK) + size - 1 >=3D TARGET_PAGE_SIZE)) { target_ulong addr1, addr2; - tcg_target_ulong r1, r2; + uint64_t r1, r2; unsigned shift; do_unaligned_access: addr1 =3D addr & ~(size - 1); --=20 2.20.1 From nobody Mon May 6 13:22:20 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1559751967; cv=none; d=zoho.com; s=zohoarc; b=Qwfi1ggZ7XPGFBG8dck3XG/vW97YcSCJm/T7MIOz0AXCoBpFx/MCjS3r0O4KlnslJHlHBebH6+qXOsNJ7JGmgeOwHVpflqhj4QZz9RyL3uwFo3pAXjEmT8/f5BdEiIL7Gt3KaO5wtNrDybQzcee+5eFjTOx4YLHB6qS4CH1yrvc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1559751967; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=rgBvXlBNWOdKdXf6eUYyvBxYKbwloU7UKvzHljRF0GU=; b=IHDe+G0tcE22woiWOiozwvb+rFq3reigcL+Qg+oB/p5zsVNtiKDGcAXF4/bQVAE1an2i3H4Oyof8hzB26tpeFGTTT6EMPdDAO7DvVlyExITOdG5yraHwM34Hu6Tjpa40bJUTa67cErROBNb/80tnhWpcCn3jBTo+BoeZ1Nabg8Q= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1559751967988994.8175873023422; Wed, 5 Jun 2019 09:26:07 -0700 (PDT) Received: from localhost ([127.0.0.1]:45976 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hYYjm-0000sI-Vd for importer@patchew.org; Wed, 05 Jun 2019 12:26:06 -0400 Received: from eggs.gnu.org ([209.51.188.92]:36302) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hYYhH-0007Mj-DE for qemu-devel@nongnu.org; Wed, 05 Jun 2019 12:23:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hYYhG-0008RJ-0t for qemu-devel@nongnu.org; Wed, 05 Jun 2019 12:23:31 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:36782) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hYYhF-0008ON-Pe for qemu-devel@nongnu.org; Wed, 05 Jun 2019 12:23:29 -0400 Received: by mail-wr1-x441.google.com with SMTP id n4so17088806wrs.3 for ; Wed, 05 Jun 2019 09:23:29 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id l18sm18893090wrv.38.2019.06.05.09.23.27 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 05 Jun 2019 09:23:27 -0700 (PDT) Received: from zen.linaroharston. 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X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PATCH v1 2/4] tests/tcg: better detect truncated reads X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) If we've truncated a wider read we can detect the condition earlier by looking at the number of zeros we've read. So we don't trip up on cases where we have written zeros to the start of the buffer we also ensure we only start each offset read from the right address. Signed-off-by: Alex Benn=C3=A9e --- tests/tcg/multiarch/system/memory.c | 36 +++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/tests/tcg/multiarch/system/memory.c b/tests/tcg/multiarch/syst= em/memory.c index dc1d8a98ff..d124502d73 100644 --- a/tests/tcg/multiarch/system/memory.c +++ b/tests/tcg/multiarch/system/memory.c @@ -208,6 +208,7 @@ static bool read_test_data_u32(int offset) =20 for (i =3D 0; i < max; i++) { uint8_t b1, b2, b3, b4; + int zeros =3D 0; word =3D *ptr++; =20 b1 =3D word >> 24 & 0xff; @@ -215,6 +216,16 @@ static bool read_test_data_u32(int offset) b3 =3D word >> 8 & 0xff; b4 =3D word & 0xff; =20 + zeros +=3D (b1 =3D=3D 0 ? 1 : 0); + zeros +=3D (b2 =3D=3D 0 ? 1 : 0); + zeros +=3D (b3 =3D=3D 0 ? 1 : 0); + zeros +=3D (b4 =3D=3D 0 ? 1 : 0); + if (zeros > 1) { + ml_printf("Error @ %p, more zeros than expected: %d, %d, %d, %= d", + ptr - 1, b1, b2, b3, b4); + return false; + } + if ((b1 < b2 && b1 !=3D 0) || (b2 < b3 && b2 !=3D 0) || (b3 < b4 && b3 !=3D 0)) { @@ -238,6 +249,7 @@ static bool read_test_data_u64(int offset) =20 for (i =3D 0; i < max; i++) { uint8_t b1, b2, b3, b4, b5, b6, b7, b8; + int zeros =3D 0; word =3D *ptr++; =20 b1 =3D ((uint64_t) (word >> 56)) & 0xff; @@ -249,6 +261,20 @@ static bool read_test_data_u64(int offset) b7 =3D (word >> 8) & 0xff; b8 =3D (word >> 0) & 0xff; =20 + zeros +=3D (b1 =3D=3D 0 ? 1 : 0); + zeros +=3D (b2 =3D=3D 0 ? 1 : 0); + zeros +=3D (b3 =3D=3D 0 ? 1 : 0); + zeros +=3D (b4 =3D=3D 0 ? 1 : 0); + zeros +=3D (b5 =3D=3D 0 ? 1 : 0); + zeros +=3D (b6 =3D=3D 0 ? 1 : 0); + zeros +=3D (b7 =3D=3D 0 ? 1 : 0); + zeros +=3D (b8 =3D=3D 0 ? 1 : 0); + if (zeros > 1) { + ml_printf("Error @ %p, more zeros than expected: %d, %d, %d, %= d, %d, %d, %d, %d", + ptr - 1, b1, b2, b3, b4, b5, b6, b7, b8); + return false; + } + if ((b1 < b2 && b1 !=3D 0) || (b2 < b3 && b2 !=3D 0) || (b3 < b4 && b3 !=3D 0) || @@ -272,7 +298,7 @@ read_ufn read_ufns[] =3D { read_test_data_u16, read_test_data_u32, read_test_data_u64 }; =20 -bool do_unsigned_reads(void) +bool do_unsigned_reads(int start_off) { int i; bool ok =3D true; @@ -280,11 +306,11 @@ bool do_unsigned_reads(void) for (i =3D 0; i < ARRAY_SIZE(read_ufns) && ok; i++) { #if CHECK_UNALIGNED int off; - for (off =3D 0; off < 8 && ok; off++) { + for (off =3D start_off; off < 8 && ok; off++) { ok =3D read_ufns[i](off); } #else - ok =3D read_ufns[i](0); + ok =3D read_ufns[i](start_off); #endif } =20 @@ -298,11 +324,11 @@ static bool do_unsigned_test(init_ufn fn) int i; for (i =3D 0; i < 8 && ok; i++) { fn(i); - ok =3D do_unsigned_reads(); + ok =3D do_unsigned_reads(i); } #else fn(0); - return do_unsigned_reads(); + return do_unsigned_reads(0); #endif } =20 --=20 2.20.1 From nobody Mon May 6 13:22:20 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1559752076; cv=none; d=zoho.com; s=zohoarc; b=gq3p5N49hqP9byZK8bxmcM+TV1oLrLZdWQU4276qf/ggEZ84tSZdESlfn2e8btKQ36KW+KB05aiacd90JsqaPBY8J7+VaGodiqZieb7nONmm0jlaC8YaoubIAzDOxy9OdZrl4+vtVSjclSVE2ZxUOJWANatAqwm9PXbEwFRqk54= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1559752076; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=rcKOmyd4ZaJmv55WtxWWnJZ8WFn3ij4YBnIuaHka/0g=; b=JAnG+cte5ZPRVFoD9g5go0Ly/VutXDRBHD9S8P+tgXVsCVGEr28UyZdt08tGebwinvzC5yDQa5zxHBLDzhktcO7c8LlAxTQC4yraHYFmxxQ3NSkiAubDgRPTJ0bUvsMAZcJpQ3/9xfhQrRVviPZt7AX0Cob9U4T+kJ6JXWdXMng= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1559752076689720.4050269638714; Wed, 5 Jun 2019 09:27:56 -0700 (PDT) Received: from localhost ([127.0.0.1]:45997 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hYYlU-0002KZ-GF for importer@patchew.org; Wed, 05 Jun 2019 12:27:52 -0400 Received: from eggs.gnu.org ([209.51.188.92]:36315) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hYYhH-0007N1-RS for qemu-devel@nongnu.org; Wed, 05 Jun 2019 12:23:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hYYhG-0008Rl-Jm for qemu-devel@nongnu.org; Wed, 05 Jun 2019 12:23:31 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:35638) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hYYhG-0008Py-Ad for qemu-devel@nongnu.org; Wed, 05 Jun 2019 12:23:30 -0400 Received: by mail-wr1-x444.google.com with SMTP id m3so4297671wrv.2 for ; Wed, 05 Jun 2019 09:23:30 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id o1sm36394944wre.76.2019.06.05.09.23.27 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 05 Jun 2019 09:23:27 -0700 (PDT) Received: from zen.linaroharston. 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X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PATCH v1 3/4] tests/tcg: clean-up VPATH/TESTS for i386 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Eduardo Habkost , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Since we only run build the multiarch tests and we use a fully resolved path for the crt object we don't need the wildcard or VPATH messing about. Signed-off-by: Alex Benn=C3=A9e --- tests/tcg/i386/Makefile.softmmu-target | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/tests/tcg/i386/Makefile.softmmu-target b/tests/tcg/i386/Makefi= le.softmmu-target index e1f98177aa..e1d880f9b5 100644 --- a/tests/tcg/i386/Makefile.softmmu-target +++ b/tests/tcg/i386/Makefile.softmmu-target @@ -8,15 +8,10 @@ =20 I386_SYSTEM_SRC=3D$(SRC_PATH)/tests/tcg/i386/system X64_SYSTEM_SRC=3D$(SRC_PATH)/tests/tcg/x86_64/system -# Set search path for all sources -VPATH+=3D$(I386_SYSTEM_SRC) =20 # These objects provide the basic boot code and helper functions for all t= ests CRT_OBJS=3Dboot.o =20 -X86_TEST_SRCS=3D$(wildcard $(I386_SYSTEM_SRC)/*.c) -X86_TESTS =3D $(patsubst $(I386_SYSTEM_SRC)/%.c, %, $(X86_TEST_SRCS)) - ifeq ($(TARGET_X86_64), y) CRT_PATH=3D$(X64_SYSTEM_SRC) LINK_SCRIPT=3D$(X64_SYSTEM_SRC)/kernel.ld @@ -26,12 +21,12 @@ CRT_PATH=3D$(I386_SYSTEM_SRC) CFLAGS+=3D-m32 LINK_SCRIPT=3D$(I386_SYSTEM_SRC)/kernel.ld LDFLAGS=3D-Wl,-T$(LINK_SCRIPT) -Wl,-melf_i386 -# FIXME: move to common once x86_64 is bootstrapped -TESTS+=3D$(X86_TESTS) $(MULTIARCH_TESTS) endif CFLAGS+=3D-nostdlib -ggdb -O0 $(MINILIB_INC) LDFLAGS+=3D-static -nostdlib $(CRT_OBJS) $(MINILIB_OBJS) -lgcc =20 +TESTS+=3D$(MULTIARCH_TESTS) + # building head blobs .PRECIOUS: $(CRT_OBJS) =20 --=20 2.20.1 From nobody Mon May 6 13:22:20 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1559751912; cv=none; d=zoho.com; s=zohoarc; b=dqJ+7FqiqTKtBI3L+sMfd+NUFyaBiAoe14gzsjVPdMIq/59QPJR1y4jNqzIoA2JtOqZZyL4WPGeM16d8vFePJfcXhKGPtVJ7fQ54Q5cI2OzE+W6NYgJ3R+pKYH4ZW6sh1YbDwXRYdWlMzlbeXw8X5asIQ0FBq15lheRW5s9a2PI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1559751912; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=4Ee9ZhjKvcfYmapaxJyez6mkhczGkE7VcynuJt1VLRI=; b=VK18W2uPPHg9/3CsveyGSPFkVBCo4b6Axi4k6XwQ7zioeJVZXN2dljN1UXQ6Z/JhKhgyuBZ7UrR7ecgsqYSm9/VucQS3sCDR+o5kUBm4W0bxfHefYWsZM+BNl0ynB9FmTNMAA5qzzJ76cyAZ3G2UNUwnxrMtKgm62Gl9RgYqfS8= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1559751912323698.9284120222865; Wed, 5 Jun 2019 09:25:12 -0700 (PDT) Received: from localhost ([127.0.0.1]:45929 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hYYio-0008Jd-7K for importer@patchew.org; Wed, 05 Jun 2019 12:25:06 -0400 Received: from eggs.gnu.org ([209.51.188.92]:36336) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hYYhJ-0007Nt-45 for qemu-devel@nongnu.org; Wed, 05 Jun 2019 12:23:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hYYhH-0008Se-FP for qemu-devel@nongnu.org; Wed, 05 Jun 2019 12:23:33 -0400 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:38740) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hYYhH-0008Rg-7E for qemu-devel@nongnu.org; Wed, 05 Jun 2019 12:23:31 -0400 Received: by mail-wm1-x341.google.com with SMTP id t5so2942286wmh.3 for ; Wed, 05 Jun 2019 09:23:31 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id y2sm33717141wra.58.2019.06.05.09.23.27 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 05 Jun 2019 09:23:27 -0700 (PDT) Received: from zen.linaroharston. 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X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH v1 4/4] tests/tcg/x86_64: add a PVHVM crt.o for x86_64 system tests X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Eduardo Habkost , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Instead of doing the full real to 64 bit dance we are attempting to leverage Xen's PVHVM boot spec to go from 32 bit to 64 bit. Signed-off-by: Alex Benn=C3=A9e --- tests/tcg/i386/Makefile.softmmu-target | 1 + tests/tcg/x86_64/system/boot.S | 277 +++++++++++++++++++++++++ tests/tcg/x86_64/system/kernel.ld | 33 +++ 3 files changed, 311 insertions(+) create mode 100644 tests/tcg/x86_64/system/boot.S create mode 100644 tests/tcg/x86_64/system/kernel.ld diff --git a/tests/tcg/i386/Makefile.softmmu-target b/tests/tcg/i386/Makefi= le.softmmu-target index e1d880f9b5..0a4364868c 100644 --- a/tests/tcg/i386/Makefile.softmmu-target +++ b/tests/tcg/i386/Makefile.softmmu-target @@ -14,6 +14,7 @@ CRT_OBJS=3Dboot.o =20 ifeq ($(TARGET_X86_64), y) CRT_PATH=3D$(X64_SYSTEM_SRC) +CFLAGS=3D-march=3Dx86-64 LINK_SCRIPT=3D$(X64_SYSTEM_SRC)/kernel.ld LDFLAGS=3D-Wl,-T$(LINK_SCRIPT) -Wl,-melf_x86_64 else diff --git a/tests/tcg/x86_64/system/boot.S b/tests/tcg/x86_64/system/boot.S new file mode 100644 index 0000000000..205cfbd398 --- /dev/null +++ b/tests/tcg/x86_64/system/boot.S @@ -0,0 +1,277 @@ +/* + * x86_64 boot and support code + * + * Copyright 2019 Linaro + * + * This work is licensed under the terms of the GNU GPL, version 3 or late= r. + * See the COPYING file in the top-level directory. + * + * Unlike the i386 version we instead use Xen's PVHVM booting header + * which should drop us automatically into 32 bit mode ready to go. I've + * nabbed bits of the Linux kernel setup to achieve this. + * + * SPDX-License-Identifier: GPL-3.0-or-later + */ + + .section .head + +#define ELFNOTE_START(name, type, flags) \ +.pushsection .note.name, flags,@note ; \ + .balign 4 ; \ + .long 2f - 1f /* namesz */ ; \ + .long 4484f - 3f /* descsz */ ; \ + .long type ; \ +1:.asciz #name ; \ +2:.balign 4 ; \ +3: + +#define ELFNOTE_END \ +4484:.balign 4 ; \ +.popsection ; + +#define ELFNOTE(name, type, desc) \ + ELFNOTE_START(name, type, "") \ + desc ; \ + ELFNOTE_END + +#define XEN_ELFNOTE_ENTRY 1 +#define XEN_ELFNOTE_HYPERCALL_PAGE 2 +#define XEN_ELFNOTE_VIRT_BASE 3 +#define XEN_ELFNOTE_PADDR_OFFSET 4 +#define XEN_ELFNOTE_PHYS32_ENTRY 18 + +#define __ASM_FORM(x) x +#define __ASM_FORM_RAW(x) x +#define __ASM_FORM_COMMA(x) x, +#define __ASM_SEL(a,b) __ASM_FORM(b) +#define __ASM_SEL_RAW(a,b) __ASM_FORM_RAW(b) +#define _ASM_PTR __ASM_SEL(.long, .quad) + + ELFNOTE(Xen, XEN_ELFNOTE_VIRT_BASE, _ASM_PTR 0x100000) + ELFNOTE(Xen, XEN_ELFNOTE_ENTRY, _ASM_PTR _start) + ELFNOTE(Xen, XEN_ELFNOTE_PHYS32_ENTRY, _ASM_PTR _start) /* entry =3D= =3D virtbase */ + ELFNOTE(Xen, XEN_ELFNOTE_PADDR_OFFSET, _ASM_PTR 0) + + /* + * Entry point for PVH guests. + * + * Xen ABI specifies the following register state when we come here: + * + * - `ebx`: contains the physical memory address where the loader has plac= ed + * the boot start info structure. + * - `cr0`: bit 0 (PE) must be set. All the other writeable bits are clear= ed. + * - `cr4`: all bits are cleared. + * - `cs `: must be a 32-bit read/execute code segment with a base of =E2= =80=980=E2=80=99 + * and a limit of =E2=80=980xFFFFFFFF=E2=80=99. The selector valu= e is unspecified. + * - `ds`, `es`: must be a 32-bit read/write data segment with a base of + * =E2=80=980=E2=80=99 and a limit of =E2=80=980xFFFFFFFF=E2= =80=99. The selector values are all + * unspecified. + * - `tr`: must be a 32-bit TSS (active) with a base of '0' and a limit + * of '0x67'. + * - `eflags`: bit 17 (VM) must be cleared. Bit 9 (IF) must be cleared. + * Bit 8 (TF) must be cleared. Other bits are all unspecified. + * + * All other processor registers and flag bits are unspecified. The OS is = in + * charge of setting up it's own stack, GDT and IDT. + */ + .code32 + .section .text + +.global _start +_start: + cld + lgdt gdtr + + ljmp $0x8,$.Lloadcs +.Lloadcs: + mov $0x10,%eax + mov %eax,%ds + mov %eax,%es + mov %eax,%fs + mov %eax,%gs + mov %eax,%ss + + /* Enable PAE mode (bit 5). */ + mov %cr4, %eax + btsl $5, %eax + mov %eax, %cr4 + +#define MSR_EFER 0xc0000080 /* extended feature register */ + + /* Enable Long mode. */ + mov $MSR_EFER, %ecx + rdmsr + btsl $8, %eax + wrmsr + + /* Enable paging */ + mov $.Lpml4, %ecx + mov %ecx, %cr3 + + mov %cr0, %eax + btsl $31, %eax + mov %eax, %cr0 + + /* Jump to 64-bit mode. */ + lgdt gdtr64 + ljmp $0x8,$.Lenter64 + + .code64 + .section .text +.Lenter64: + + + // Setup stack ASAP + movq $stack_end,%rsp + + /* don't worry about stack frame, assume everthing is garbage when= we return */ + call main + + /* output any non-zero result in eax to isa-debug-exit device */ + test %al, %al + jz 1f + out %ax, $0xf4 + +1: /* QEMU ACPI poweroff */ + mov $0x604,%edx + mov $0x2000,%eax + out %ax,%dx + hlt + jmp 1b + + /* + * Helper Functions + * + * x86_64 calling convention is rdi, rsi, rdx, rcx, r8, r9 + */ + + /* Output a single character to serial port */ + .global __sys_outc +__sys_outc: + pushq %rax + mov %rax, %rdx + out %al,$0xE9 + popq %rax + ret + + /* Interrupt Descriptor Table */ + + .section .data + .align 16 + +idt_00: .int 0, 0 +idt_01: .int 0, 0 +idt_02: .int 0, 0 +idt_03: .int 0, 0 +idt_04: .int 0, 0 +idt_05: .int 0, 0 +idt_06: .int 0, 0 /* intr_6_opcode, Invalid Opcode */ +idt_07: .int 0, 0 +idt_08: .int 0, 0 +idt_09: .int 0, 0 +idt_0A: .int 0, 0 +idt_0B: .int 0, 0 +idt_0C: .int 0, 0 +idt_0D: .int 0, 0 +idt_0E: .int 0, 0 +idt_0F: .int 0, 0 +idt_10: .int 0, 0 +idt_11: .int 0, 0 +idt_12: .int 0, 0 +idt_13: .int 0, 0 +idt_14: .int 0, 0 +idt_15: .int 0, 0 +idt_16: .int 0, 0 +idt_17: .int 0, 0 +idt_18: .int 0, 0 +idt_19: .int 0, 0 +idt_1A: .int 0, 0 +idt_1B: .int 0, 0 +idt_1C: .int 0, 0 +idt_1D: .int 0, 0 +idt_1E: .int 0, 0 +idt_1F: .int 0, 0 + + + /* + * Global Descriptor Table (GDT) + * + * This describes various memory areas (segments) through + * segment descriptors. In 32 bit mode each segment each + * segement is associated with segment registers which are + * implicitly (or explicitly) referenced depending on the + * instruction. However in 64 bit mode selectors are flat and + * segmented addressing isn't used. + */ +gdt: + .short 0 +gdtr: + .short gdt_en - gdt - 1 + .int gdt + + // Code cs: + .short 0xFFFF + .short 0 + .byte 0 + .byte 0x9b + .byte 0xCF + .byte 0 + + // Data ds:, ss:, es:, fs:, and gs: + .short 0xFFFF + .short 0 + .byte 0 + .byte 0x93 + .byte 0xCF + .byte 0 +gdt_en: + +gdt64: + .short 0 +gdtr64: + .short gdt64_en - gdt64 - 1 + .int gdt64 + + // Code + .short 0xFFFF + .short 0 + .byte 0 + .byte 0x9b + .byte 0xAF + .byte 0 + + // Data + .short 0xFFFF + .short 0 + .byte 0 + .byte 0x93 + .byte 0xCF + .byte 0 +gdt64_en: + + .section .bss + .align 16 + +stack: .space 65536 +stack_end: + + .section .data + +.align 4096 +.Lpd: +i =3D 0 + .rept 512 * 4 + .quad 0x1e7 | (i << 21) + i =3D i + 1 + .endr + +.align 4096 +.Lpdp: + .quad .Lpd + 7 + 0 * 4096 /* 0-1 GB */ + .quad .Lpd + 7 + 1 * 4096 /* 1-2 GB */ + .quad .Lpd + 7 + 2 * 4096 /* 2-3 GB */ + .quad .Lpd + 7 + 3 * 4096 /* 3-4 GB */ + +.align 4096 +.Lpml4: + .quad .Lpdp + 7 /* 0-512 GB */ diff --git a/tests/tcg/x86_64/system/kernel.ld b/tests/tcg/x86_64/system/ke= rnel.ld new file mode 100644 index 0000000000..49c12b04ae --- /dev/null +++ b/tests/tcg/x86_64/system/kernel.ld @@ -0,0 +1,33 @@ +PHDRS { + text PT_LOAD FLAGS(5); /* R_E */ + note PT_NOTE FLAGS(0); /* ___ */ +} + +SECTIONS { + . =3D 0x100000; + + .text : { + __load_st =3D .; + *(.head) + *(.text) + } :text + + .rodata : { + *(.rodata) + } :text + + /* Keep build ID and PVH notes in same section */ + .notes : { + *(.note.*) + } :note + + .data : { + *(.data) + __load_en =3D .; + } :text + + .bss : { + *(.bss) + __bss_en =3D .; + } +} --=20 2.20.1