From nobody Mon Nov 10 22:26:32 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1559299845; cv=none; d=zoho.com; s=zohoarc; b=Nb/qmyNgRqXupkrF3CJvkdxqSKKwjsBa2OAKqVQGn9bVO9c2SMiZa8KNLospBQCocwM+v72jVn9+bdlU0GPIEVDR2Xg6EFqDrFsGtrDQo4NRtpC5u70x+bIgaU/3tN2NC/4rxiQnPQ8qO6IMtr0GopuwfWyWyds5NZGfxAU1duk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1559299845; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=7S8w7ggZX1eJwLb9g00Jc7vOQpl21JecnAp0wI6n16o=; b=FZNCFRYSLeW76lgRicGTvgVT4vCPTkcIsnbYh1kpgNUSlY7Z4+Q7UXKZUegQvRs1zATeIEVAkJP65YL1diCL0GrqL66RXfdqqv5BFr2LUtkq65qb+SivL4vo0+NY3IyFyCqGgsgswdEkOqnGRJCwzIvSaeTIyHWgIDr2LKOnlSg= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1559299845652294.9266903788374; Fri, 31 May 2019 03:50:45 -0700 (PDT) Received: from localhost ([127.0.0.1]:40858 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hWf7P-0002iD-J7 for importer@patchew.org; Fri, 31 May 2019 06:50:39 -0400 Received: from eggs.gnu.org ([209.51.188.92]:56021) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hWf1n-0006qC-Qb for qemu-devel@nongnu.org; Fri, 31 May 2019 06:44:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hWf1m-0001Lg-3f for qemu-devel@nongnu.org; Fri, 31 May 2019 06:44:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37718) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hWf1l-0001Ir-QJ for qemu-devel@nongnu.org; Fri, 31 May 2019 06:44:49 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 18E6A308339E; Fri, 31 May 2019 10:44:48 +0000 (UTC) Received: from t460s.redhat.com (ovpn-116-233.ams2.redhat.com [10.36.116.233]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0AA1B271AE; Fri, 31 May 2019 10:44:46 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 31 May 2019 12:44:16 +0200 Message-Id: <20190531104432.29379-8-david@redhat.com> In-Reply-To: <20190531104432.29379-1-david@redhat.com> References: <20190531104432.29379-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Fri, 31 May 2019 10:44:48 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v1 07/23] s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BIT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Borntraeger , Denys Vlasenko , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" 1. We'll reuse op_vcdg() for similar instructions later, prepare for that. 2. We'll reuse vop64_2() later for other instructions. We have to mangle the erm (effective rounding mode) and the m4 into the simd_data(), and properly unmangle them again. Make sure to restore the erm before triggering an exception. Signed-off-by: David Hildenbrand Reviewed-by: Richard Henderson --- target/s390x/helper.h | 2 ++ target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 25 ++++++++++++++++++ target/s390x/vec_fpu_helper.c | 47 +++++++++++++++++++++++++++++++++ 4 files changed, 76 insertions(+) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 33d3bacf74..a60f4c49fc 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -266,6 +266,8 @@ DEF_HELPER_FLAGS_5(gvec_vfche64, TCG_CALL_NO_WG, void, = ptr, cptr, cptr, env, i32 DEF_HELPER_FLAGS_5(gvec_vfche64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, e= nv, i32) DEF_HELPER_5(gvec_vfche64_cc, void, ptr, cptr, cptr, env, i32) DEF_HELPER_5(gvec_vfche64s_cc, void, ptr, cptr, cptr, env, i32) +DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) +DEF_HELPER_FLAGS_4(gvec_vcdg64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) =20 #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 446552f251..d3386024c8 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1218,6 +1218,8 @@ F(0xe7eb, VFCH, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC) /* VECTOR FP COMPARE HIGH OR EQUAL */ F(0xe7ea, VFCHE, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC) +/* VECTOR FP CONVERT FROM FIXED 64-BIT */ + F(0xe7c3, VCDG, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC) =20 #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.in= c.c index 5571a71e1a..6741b707cc 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -2639,3 +2639,28 @@ static DisasJumpType op_vfc(DisasContext *s, DisasOp= s *o) } return DISAS_NEXT; } + +static DisasJumpType op_vcdg(DisasContext *s, DisasOps *o) +{ + const uint8_t fpf =3D get_field(s->fields, m3); + const uint8_t m4 =3D get_field(s->fields, m4); + const uint8_t erm =3D get_field(s->fields, m5); + const bool se =3D extract32(m4, 3, 1); + gen_helper_gvec_2_ptr *fn; + + if (fpf !=3D FPF_LONG || extract32(m4, 0, 2) || erm > 7 || erm =3D=3D = 2) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + switch (s->fields->op2) { + case 0xc3: + fn =3D se ? gen_helper_gvec_vcdg64s : gen_helper_gvec_vcdg64; + break; + default: + g_assert_not_reached(); + } + gen_gvec_2_ptr(get_field(s->fields, v1), get_field(s->fields, v2), cpu= _env, + deposit32(m4, 4, 4, erm), fn); + return DISAS_NEXT; +} diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c index 1c4d4661ba..488895efdc 100644 --- a/target/s390x/vec_fpu_helper.c +++ b/target/s390x/vec_fpu_helper.c @@ -78,6 +78,30 @@ static void handle_ieee_exc(CPUS390XState *env, uint8_t = vxc, uint8_t vec_exc, } } =20 +typedef uint64_t (*vop64_2_fn)(uint64_t a, float_status *s); +static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *e= nv, + bool s, bool XxC, uint8_t erm, vop64_2_fn fn, + uintptr_t retaddr) +{ + uint8_t vxc, vec_exc =3D 0; + S390Vector tmp =3D {}; + int i, old_mode; + + old_mode =3D s390_swap_bfp_rounding_mode(env, erm); + for (i =3D 0; i < 2; i++) { + const uint64_t a =3D s390_vec_read_element64(v2, i); + + s390_vec_write_element64(&tmp, i, fn(a, &env->fpu_status)); + vxc =3D check_ieee_exc(env, i, XxC, &vec_exc); + if (s || vxc) { + break; + } + } + s390_restore_bfp_rounding_mode(env, old_mode); + handle_ieee_exc(env, vxc, vec_exc, retaddr); + *v1 =3D tmp; +} + typedef uint64_t (*vop64_3_fn)(uint64_t a, uint64_t b, float_status *s); static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector= *v3, CPUS390XState *env, bool s, vop64_3_fn fn, @@ -256,3 +280,26 @@ void HELPER(gvec_vfche64s_cc)(void *v1, const void *v2= , const void *v3, { env->cc_op =3D vfc64(v1, v2, v3, env, true, true, true, GETPC()); } + +static uint64_t vcdg64(uint64_t a, float_status *s) +{ + return float64_val(int64_to_float64(a, s)); +} + +void HELPER(gvec_vcdg64)(void *v1, const void *v2, CPUS390XState *env, + uint32_t desc) +{ + const uint8_t erm =3D extract32(simd_data(desc), 4, 4); + const bool XxC =3D extract32(simd_data(desc), 2, 1); + + vop64_2(v1, v2, env, false, XxC, erm, vcdg64, GETPC()); +} + +void HELPER(gvec_vcdg64s)(void *v1, const void *v2, CPUS390XState *env, + uint32_t desc) +{ + const uint8_t erm =3D extract32(simd_data(desc), 4, 4); + const bool XxC =3D extract32(simd_data(desc), 2, 1); + + vop64_2(v1, v2, env, true, XxC, erm, vcdg64, GETPC()); +} --=20 2.20.1