From nobody Tue Feb 10 01:35:28 2026 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1558798420; cv=none; d=zoho.com; s=zohoarc; b=LnMjszweBvv42ezzkZsx5/1WSOiR3/CZtN5cJtbE8F/I6Y2ofIzZieiKiqjUym+IX8GwOtIwohID28T5HT1f0VhqPyjwNiJJKOQq0x/mYNkb11pfp/R7je8B2/UWmbxCos34ZNYZVkJ9/cJ54KK0nbl1mlwXy8ni+/HfiHGZ0ZM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558798420; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=aaF56VrexTd8aBCkv42xmQs8yjkLjyZTodXVA5XvS14=; b=oRFh3exe2Q9i6zWY0ivfF/1Yo/EB3qvVI1UjmDO8Utz0qL9aNh73oc+n4einQq6HHfSx86IxljFEn5okmRIpGT8lNv9c74zjxIKmsZv++i+IxACr7cmwzUSj6AvhRLHP/9rEOGo4Q7GAoxTi5JxJQ6T18HA1zS9cY3jbwkuJ15Q= ARC-Authentication-Results: i=1; mx.zoho.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558798420341439.36823215057404; Sat, 25 May 2019 08:33:40 -0700 (PDT) Received: from localhost ([127.0.0.1]:43452 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hUYfl-0000XF-CP for importer@patchew.org; Sat, 25 May 2019 11:33:25 -0400 Received: from eggs.gnu.org ([209.51.188.92]:35912) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hUYdm-0007i4-Du for qemu-devel@nongnu.org; Sat, 25 May 2019 11:31:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hUYNt-0003CR-KZ for qemu-devel@nongnu.org; Sat, 25 May 2019 11:14:58 -0400 Received: from 4.mo7.mail-out.ovh.net ([178.32.122.254]:39295) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hUYNs-0003Ar-Rz for qemu-devel@nongnu.org; Sat, 25 May 2019 11:14:57 -0400 Received: from player698.ha.ovh.net (unknown [10.108.42.142]) by mo7.mail-out.ovh.net (Postfix) with ESMTP id 7B65A11C41A for ; Sat, 25 May 2019 17:14:55 +0200 (CEST) Received: from kaod.org (lfbn-1-10649-41.w90-89.abo.wanadoo.fr [90.89.235.41]) (Authenticated sender: clg@kaod.org) by player698.ha.ovh.net (Postfix) with ESMTPSA id 0F4CA625A8E4; Sat, 25 May 2019 15:14:49 +0000 (UTC) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: Peter Maydell Date: Sat, 25 May 2019 17:12:40 +0200 Message-Id: <20190525151241.5017-19-clg@kaod.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190525151241.5017-1-clg@kaod.org> References: <20190525151241.5017-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 6624513580534565649 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduuddruddukedgkeejucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 178.32.122.254 Subject: [Qemu-devel] [PATCH 18/19] aspeed/smc: inject errors in DMA checksum X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Joel Stanley Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Emulate read errors in the DMA Checksum Register for high frequencies and optimistic settings of the Read Timing Compensation Register. This will help in tuning the SPI timing calibration algorithm. The values below are those to expect from the first flash device of the FMC controller of a palmetto-bmc machine. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Joel Stanley --- hw/ssi/aspeed_smc.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 406c30c60b3f..4c162912cf62 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -866,6 +866,30 @@ static void aspeed_smc_dma_calibration(AspeedSMCState = *s) s->regs[s->r_ctrl0 + cs] |=3D CE_CTRL_CLOCK_FREQ(hclk_div); } =20 +static bool aspeed_smc_inject_read_failure(AspeedSMCState *s) +{ + uint8_t delay =3D + (s->regs[R_DMA_CTRL] >> DMA_CTRL_DELAY_SHIFT) & DMA_CTRL_DELAY_MAS= K; + uint8_t hclk_mask =3D + (s->regs[R_DMA_CTRL] >> DMA_CTRL_FREQ_SHIFT) & DMA_CTRL_FREQ_MASK; + + /* + * Typical values of a palmetto-bmc machine. + */ + switch (aspeed_smc_hclk_divisor(hclk_mask)) { + case 4 ... 16: + return false; + case 3: /* at least one HCLK cycle delay */ + return (delay & 0x7) < 1; + case 2: /* at least two HCLK cycle delay */ + return (delay & 0x7) < 2; + case 1: /* (> 100MHz) is above the max freq of the controller */ + return true; + default: + g_assert_not_reached(); + } +} + /* * Accumulate the result of the reads to provide a checksum that will * be used to validate the read timing settings. @@ -903,6 +927,11 @@ static void aspeed_smc_dma_checksum(AspeedSMCState *s) s->regs[R_DMA_FLASH_ADDR] +=3D 4; s->regs[R_DMA_LEN] -=3D 4; } + + if (aspeed_smc_inject_read_failure(s)) { + s->regs[R_DMA_CHECKSUM] =3D 0xbadc0de; + } + } =20 static void aspeed_smc_dma_rw(AspeedSMCState *s) --=20 2.20.1