From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680066; cv=none; d=zoho.com; s=zohoarc; b=VqrhNYzaqw69U29w0EqLEfiQF+xhb+jr5Titktn8/groxUeT+x2oIDUQSoLF3oA76E02uh20t8gLheoDw3D+AlSegkj6y4OkRiq8GfaRa9K08tNnnn20WTt629Xd9ZeEOFRZ9PadYZHiGKa4ZIfqEn/PqN8r4rkiAR64tVSsLd0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680066; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=/wgO1WZAhISo0eARRYEDb+uLA5Z1xiZ/LYJif3pz5Ow=; b=g5BfoPBh3YUqKwEyAklehO0/1RzQiC5ATRiGMH7s/MS6K+Zgs5SpjkTggr4wLSawH+s6iIKQhdxNVFr5Noa3oqPN0339riIOhFQxPZNvL/Q5T94VeloFIp+mO5N11g9KAmdlRjHtrfUs9VgStJ0HQ+CpJnlfNeg6ffRlEtHlTMk= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558680066278989.0446214428225; Thu, 23 May 2019 23:41:06 -0700 (PDT) Received: from localhost ([127.0.0.1]:49761 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3sr-0005dX-6Z for importer@patchew.org; Fri, 24 May 2019 02:40:53 -0400 Received: from eggs.gnu.org ([209.51.188.92]:40557) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3oc-0002gj-28 for qemu-devel@nongnu.org; Fri, 24 May 2019 02:36:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3oa-0002kL-Vb for qemu-devel@nongnu.org; Fri, 24 May 2019 02:36:29 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36658) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3oa-0002iI-Qh for qemu-devel@nongnu.org; Fri, 24 May 2019 02:36:28 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 390F3C0578FA; Fri, 24 May 2019 06:36:15 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D51165B68B; Fri, 24 May 2019 06:36:06 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:34 +0200 Message-Id: <20190524063553.5339-2-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Fri, 24 May 2019 06:36:20 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 01/20] hw/i386/pc: Use unsigned type to index arrays X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Li Qiang --- hw/i386/pc.c | 5 +++-- include/hw/i386/pc.h | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2632b73f80..fc38b59d2d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -870,7 +870,7 @@ static void handle_a20_line_change(void *opaque, int ir= q, int level) =20 int e820_add_entry(uint64_t address, uint64_t length, uint32_t type) { - int index =3D le32_to_cpu(e820_reserve.count); + unsigned int index =3D le32_to_cpu(e820_reserve.count); struct e820_entry *entry; =20 if (type !=3D E820_RAM) { @@ -902,7 +902,8 @@ int e820_get_num_entries(void) return e820_entries; } =20 -bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *l= ength) +bool e820_get_entry(unsigned int idx, uint32_t type, + uint64_t *address, uint64_t *length) { if (idx < e820_entries && e820_table[idx].type =3D=3D cpu_to_le32(type= )) { *address =3D le64_to_cpu(e820_table[idx].address); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 43df7230a2..ad3a75d8fa 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -291,7 +291,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, =20 int e820_add_entry(uint64_t, uint64_t, uint32_t); int e820_get_num_entries(void); -bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); +bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *); =20 extern GlobalProperty pc_compat_4_0[]; extern const size_t pc_compat_4_0_len; --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Fri, 24 May 2019 06:36:23 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id DB5E05B695; Fri, 24 May 2019 06:36:15 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:35 +0200 Message-Id: <20190524063553.5339-3-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Fri, 24 May 2019 06:36:28 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 02/20] hw/i386/pc: Use size_t type to hold/return a size of array X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Li Qiang --- hw/i386/pc.c | 4 ++-- include/hw/i386/pc.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index fc38b59d2d..df8600ac24 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -104,7 +104,7 @@ struct e820_table { =20 static struct e820_table e820_reserve; static struct e820_entry *e820_table; -static unsigned e820_entries; +static size_t e820_entries; struct hpet_fw_config hpet_cfg =3D {.count =3D UINT8_MAX}; =20 /* Physical Address of PVH entry point read from kernel ELF NOTE */ @@ -897,7 +897,7 @@ int e820_add_entry(uint64_t address, uint64_t length, u= int32_t type) return e820_entries; } =20 -int e820_get_num_entries(void) +size_t e820_get_num_entries(void) { return e820_entries; } diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index ad3a75d8fa..28b19173b0 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -290,7 +290,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, #define E820_UNUSABLE 5 =20 int e820_add_entry(uint64_t, uint64_t, uint32_t); -int e820_get_num_entries(void); +size_t e820_get_num_entries(void); bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *); =20 extern GlobalProperty pc_compat_4_0[]; --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Fri, 24 May 2019 06:36:32 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D8C6C5B689; Fri, 24 May 2019 06:36:23 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:36 +0200 Message-Id: <20190524063553.5339-4-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 24 May 2019 06:36:32 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 03/20] hw/i386/pc: Let e820_add_entry() return a ssize_t type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" e820_add_entry() returns an array size on success, or a negative value on error. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Li Qiang --- hw/i386/pc.c | 2 +- include/hw/i386/pc.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index df8600ac24..1245028dd6 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -868,7 +868,7 @@ static void handle_a20_line_change(void *opaque, int ir= q, int level) x86_cpu_set_a20(cpu, level); } =20 -int e820_add_entry(uint64_t address, uint64_t length, uint32_t type) +ssize_t e820_add_entry(uint64_t address, uint64_t length, uint32_t type) { unsigned int index =3D le32_to_cpu(e820_reserve.count); struct e820_entry *entry; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 28b19173b0..2bc48c03c6 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -289,7 +289,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, #define E820_NVS 4 #define E820_UNUSABLE 5 =20 -int e820_add_entry(uint64_t, uint64_t, uint32_t); +ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t); size_t e820_get_num_entries(void); bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *); =20 --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680406; cv=none; d=zoho.com; s=zohoarc; b=Mp3y8ZzP13phc3nLc2DMIphUg95V36T76IqprQFhxJgaRhDWNbMb3pWWMmR4zGYVZVjm6fsPoHe2GqBSF8xo9++5pJLYYTmMqyReh1sMqzcAhngMporyOGrmXpwqWCOS/AdWcDmSEg9FW4syXSIJL4NZTBgkWZDBnF5Tw5UkGjA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680406; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Fri, 24 May 2019 06:36:37 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 04/20] hw/i386/pc: Add the E820Type enum type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" This ensure we won't use an incorrect value. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 12 +++++++----- include/hw/i386/pc.h | 16 ++++++++++------ 2 files changed, 17 insertions(+), 11 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 1245028dd6..ac8343c728 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -868,9 +868,10 @@ static void handle_a20_line_change(void *opaque, int i= rq, int level) x86_cpu_set_a20(cpu, level); } =20 -ssize_t e820_add_entry(uint64_t address, uint64_t length, uint32_t type) +ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type) { unsigned int index =3D le32_to_cpu(e820_reserve.count); + uint32_t utype =3D (uint32_t)type; struct e820_entry *entry; =20 if (type !=3D E820_RAM) { @@ -882,7 +883,7 @@ ssize_t e820_add_entry(uint64_t address, uint64_t lengt= h, uint32_t type) =20 entry->address =3D cpu_to_le64(address); entry->length =3D cpu_to_le64(length); - entry->type =3D cpu_to_le32(type); + entry->type =3D cpu_to_le32(utype); =20 e820_reserve.count =3D cpu_to_le32(index); } @@ -891,7 +892,7 @@ ssize_t e820_add_entry(uint64_t address, uint64_t lengt= h, uint32_t type) e820_table =3D g_renew(struct e820_entry, e820_table, e820_entries + 1= ); e820_table[e820_entries].address =3D cpu_to_le64(address); e820_table[e820_entries].length =3D cpu_to_le64(length); - e820_table[e820_entries].type =3D cpu_to_le32(type); + e820_table[e820_entries].type =3D cpu_to_le32(utype); e820_entries++; =20 return e820_entries; @@ -902,10 +903,11 @@ size_t e820_get_num_entries(void) return e820_entries; } =20 -bool e820_get_entry(unsigned int idx, uint32_t type, +bool e820_get_entry(unsigned int idx, E820Type type, uint64_t *address, uint64_t *length) { - if (idx < e820_entries && e820_table[idx].type =3D=3D cpu_to_le32(type= )) { + uint32_t utype =3D (uint32_t)type; + if (idx < e820_entries && e820_table[idx].type =3D=3D cpu_to_le32(utyp= e)) { *address =3D le64_to_cpu(e820_table[idx].address); *length =3D le64_to_cpu(e820_table[idx].length); return true; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 2bc48c03c6..10e77a40ce 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -282,12 +282,16 @@ void pc_system_firmware_init(PCMachineState *pcms, Me= moryRegion *rom_memory); void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry); =20 -/* e820 types */ -#define E820_RAM 1 -#define E820_RESERVED 2 -#define E820_ACPI 3 -#define E820_NVS 4 -#define E820_UNUSABLE 5 +/** + * E820Type: Type of the e820 address range. + */ +typedef enum { + E820_RAM =3D 1, + E820_RESERVED =3D 2, + E820_ACPI =3D 3, + E820_NVS =3D 4, + E820_UNUSABLE =3D 5 +} E820Type; =20 ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t); size_t e820_get_num_entries(void); --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Fri, 24 May 2019 06:36:48 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9A5B15B689; Fri, 24 May 2019 06:36:38 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:38 +0200 Message-Id: <20190524063553.5339-6-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Fri, 24 May 2019 06:36:48 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 05/20] hw/i386/pc: Add documentation to the e820_*() functions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/i386/pc.h | 37 +++++++++++++++++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 10e77a40ce..95bf3278f2 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -293,9 +293,42 @@ typedef enum { E820_UNUSABLE =3D 5 } E820Type; =20 -ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t); +/** + * e820_add_entry: Add an #e820_entry to the @e820_table. + * + * Returns the number of entries of the e820_table on success, + * or a negative errno otherwise. + * + * @address: The base address of the structure which the BIOS is to fill i= n. + * @length: The length in bytes of the structure passed to the BIOS. + * @type: The #E820Type of the address range. + */ +ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type); + +/** + * e820_get_num_entries: The number of entries of the @e820_table. + * + * Returns the number of entries of the e820_table. + */ size_t e820_get_num_entries(void); -bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *); + +/** + * e820_get_entry: Get the address/length of an #e820_entry. + * + * If the #e820_entry stored at @index is of #E820Type @type, fills @addre= ss + * and @length with the #e820_entry values and return @true. + * Return @false otherwise. + * + * @index: The index of the #e820_entry to get values. + * @type: The @E820Type of the address range expected. + * @address: Pointer to the base address of the #e820_entry structure to + * be filled. + * @length: Pointer to the length (in bytes) of the #e820_entry structure + * to be filled. + * @return: true if the entry was found, false otherwise. + */ +bool e820_get_entry(unsigned int index, E820Type type, + uint64_t *address, uint64_t *length); =20 extern GlobalProperty pc_compat_4_0[]; extern const size_t pc_compat_4_0_len; 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Fri, 24 May 2019 02:36:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3p0-0002wX-7x for qemu-devel@nongnu.org; Fri, 24 May 2019 02:36:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42014) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3oz-0002w6-WD for qemu-devel@nongnu.org; Fri, 24 May 2019 02:36:54 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 328CD307CDE7; Fri, 24 May 2019 06:36:53 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 87E1E5B689; Fri, 24 May 2019 06:36:49 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:39 +0200 Message-Id: <20190524063553.5339-7-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Fri, 24 May 2019 06:36:53 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 06/20] hw/i386/pc: Use e820_get_num_entries() to access e820_entries X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" To be able to extract the e820* code out of this file (in the next patch), access e820_entries with its correct helper. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Li Qiang --- hw/i386/pc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index ac8343c728..2e195049a5 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1022,7 +1022,7 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, = PCMachineState *pcms) fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, &e820_reserve, sizeof(e820_reserve)); fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, - sizeof(struct e820_entry) * e820_entries); + sizeof(struct e820_entry) * e820_get_num_entries()); =20 fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg)); /* allocate memory for the NUMA channel: one (64bit) word for the numb= er --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680244; cv=none; d=zoho.com; s=zohoarc; b=LDCEl2XA33bDpWicK+LvsfAAoAXYdNYYdIpdwgTXLo2DGkk49mz+zca4h9aLB5Yi0gmECjmvYre4DwOZ18Vmh2P8bL/x2/yN1WM786xelelL4rVMgeHIAWlqSL/OWiNSG8yTUdddlI0m50FtaOJc7Go9mvoSyzxfpBHys2c2Vco= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680244; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=aKA2CBsRfcV0oMBZ7g0FuihRfmZzzqSxmh4TyINKG8w=; b=E3BJlwphxTGzk54zu45TNzLqo65B7RB0NgPRiVcvzdtEqPYaGcGXCLXSq76u6V1nH0VmuKM+U0aO/NZIFfGsaTTGsG6a/p7MI0pIbp+87x84r4Xbjq7s34Yeo0dL8lY+Y00bndEl4Bo6QPbFnxcmuOhW+yAok3I1hTE2SUpp5m4= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558680244820918.3611655540104; Thu, 23 May 2019 23:44:04 -0700 (PDT) Received: from localhost ([127.0.0.1]:49787 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3vq-0008GC-NM for importer@patchew.org; Fri, 24 May 2019 02:43:58 -0400 Received: from eggs.gnu.org ([209.51.188.92]:40700) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3p7-00030v-Sc for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3p6-00030m-8a for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:01 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57716) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3p6-000309-0d for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:00 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 275CA30C1AFB; Fri, 24 May 2019 06:36:59 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C02BF5B689; Fri, 24 May 2019 06:36:53 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:40 +0200 Message-Id: <20190524063553.5339-8-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Fri, 24 May 2019 06:36:59 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 07/20] hw/i386/pc: Extract e820 memory layout code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , "open list:X86" , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Li Qiang --- hw/i386/Makefile.objs | 2 +- hw/i386/e820_memory_layout.c | 62 +++++++++++++++++++++++++++++ hw/i386/e820_memory_layout.h | 76 ++++++++++++++++++++++++++++++++++++ hw/i386/pc.c | 64 +----------------------------- include/hw/i386/pc.h | 48 ----------------------- target/i386/kvm.c | 1 + 6 files changed, 141 insertions(+), 112 deletions(-) create mode 100644 hw/i386/e820_memory_layout.c create mode 100644 hw/i386/e820_memory_layout.h diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs index 5d9c9efd5f..d3374e0831 100644 --- a/hw/i386/Makefile.objs +++ b/hw/i386/Makefile.objs @@ -1,5 +1,5 @@ obj-$(CONFIG_KVM) +=3D kvm/ -obj-y +=3D multiboot.o +obj-y +=3D e820_memory_layout.o multiboot.o obj-y +=3D pc.o obj-$(CONFIG_I440FX) +=3D pc_piix.o obj-$(CONFIG_Q35) +=3D pc_q35.o diff --git a/hw/i386/e820_memory_layout.c b/hw/i386/e820_memory_layout.c new file mode 100644 index 0000000000..b9be08536c --- /dev/null +++ b/hw/i386/e820_memory_layout.c @@ -0,0 +1,62 @@ +/* + * QEMU BIOS e820 routines + * + * Copyright (c) 2003-2004 Fabrice Bellard + * + * SPDX-License-Identifier: MIT + */ + +#include "qemu/osdep.h" +#include "qemu/bswap.h" +#include "e820_memory_layout.h" + +static size_t e820_entries; +struct e820_table e820_reserve; +struct e820_entry *e820_table; + +ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type) +{ + unsigned int index =3D le32_to_cpu(e820_reserve.count); + uint32_t utype =3D (uint32_t)type; + struct e820_entry *entry; + + if (type !=3D E820_RAM) { + /* old FW_CFG_E820_TABLE entry -- reservations only */ + if (index >=3D E820_NR_ENTRIES) { + return -EBUSY; + } + entry =3D &e820_reserve.entry[index++]; + + entry->address =3D cpu_to_le64(address); + entry->length =3D cpu_to_le64(length); + entry->type =3D cpu_to_le32(utype); + + e820_reserve.count =3D cpu_to_le32(index); + } + + /* new "etc/e820" file -- include ram too */ + e820_table =3D g_renew(struct e820_entry, e820_table, e820_entries + 1= ); + e820_table[e820_entries].address =3D cpu_to_le64(address); + e820_table[e820_entries].length =3D cpu_to_le64(length); + e820_table[e820_entries].type =3D cpu_to_le32(utype); + e820_entries++; + + return e820_entries; +} + +size_t e820_get_num_entries(void) +{ + return e820_entries; +} + +bool e820_get_entry(unsigned int idx, E820Type type, + uint64_t *address, uint64_t *length) +{ + uint32_t utype =3D (uint32_t)type; + if (idx < e820_entries && e820_table[idx].type =3D=3D cpu_to_le32(utyp= e)) { + *address =3D le64_to_cpu(e820_table[idx].address); + *length =3D le64_to_cpu(e820_table[idx].length); + return true; + } + return false; +} diff --git a/hw/i386/e820_memory_layout.h b/hw/i386/e820_memory_layout.h new file mode 100644 index 0000000000..64e88e4772 --- /dev/null +++ b/hw/i386/e820_memory_layout.h @@ -0,0 +1,76 @@ +/* + * QEMU BIOS e820 routines + * + * Copyright (c) 2003-2004 Fabrice Bellard + * + * SPDX-License-Identifier: MIT + */ + +#ifndef HW_I386_E820_H +#define HW_I386_E820_H + +/** + * E820Type: Type of the e820 address range. + */ +typedef enum { + E820_RAM =3D 1, + E820_RESERVED =3D 2, + E820_ACPI =3D 3, + E820_NVS =3D 4, + E820_UNUSABLE =3D 5 +} E820Type; + +#define E820_NR_ENTRIES 16 + +struct e820_entry { + uint64_t address; + uint64_t length; + uint32_t type; +} QEMU_PACKED __attribute((__aligned__(4))); + +struct e820_table { + uint32_t count; + struct e820_entry entry[E820_NR_ENTRIES]; +} QEMU_PACKED __attribute((__aligned__(4))); + +extern struct e820_table e820_reserve; +extern struct e820_entry *e820_table; + +/** + * e820_add_entry: Add an #e820_entry to the @e820_table. + * + * Returns the number of entries of the e820_table on success, + * or a negative errno otherwise. + * + * @address: The base address of the structure which the BIOS is to fill i= n. + * @length: The length in bytes of the structure passed to the BIOS. + * @type: The #E820Type of the address range. + */ +ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type); + +/** + * e820_get_num_entries: The number of entries of the @e820_table. + * + * Returns the number of entries of the e820_table. + */ +size_t e820_get_num_entries(void); + +/** + * e820_get_entry: Get the address/length of an #e820_entry. + * + * If the #e820_entry stored at @index is of #E820Type @type, fills @addre= ss + * and @length with the #e820_entry values and return @true. + * Return @false otherwise. + * + * @index: The index of the #e820_entry to get values. + * @type: The @E820Type of the address range expected. + * @address: Pointer to the base address of the #e820_entry structure to + * be filled. + * @length: Pointer to the length (in bytes) of the #e820_entry structure + * to be filled. + * @return: true if the entry was found, false otherwise. + */ +bool e820_get_entry(unsigned int index, E820Type type, + uint64_t *address, uint64_t *length); + +#endif diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2e195049a5..fc22779ac1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -78,6 +78,7 @@ #include "hw/i386/intel_iommu.h" #include "hw/net/ne2000-isa.h" #include "standard-headers/asm-x86/bootparam.h" +#include "e820_memory_layout.h" =20 /* debug PC/ISA interrupts */ //#define DEBUG_IRQ @@ -89,22 +90,6 @@ #define DPRINTF(fmt, ...) #endif =20 -#define E820_NR_ENTRIES 16 - -struct e820_entry { - uint64_t address; - uint64_t length; - uint32_t type; -} QEMU_PACKED __attribute((__aligned__(4))); - -struct e820_table { - uint32_t count; - struct e820_entry entry[E820_NR_ENTRIES]; -} QEMU_PACKED __attribute((__aligned__(4))); - -static struct e820_table e820_reserve; -static struct e820_entry *e820_table; -static size_t e820_entries; struct hpet_fw_config hpet_cfg =3D {.count =3D UINT8_MAX}; =20 /* Physical Address of PVH entry point read from kernel ELF NOTE */ @@ -868,53 +853,6 @@ static void handle_a20_line_change(void *opaque, int i= rq, int level) x86_cpu_set_a20(cpu, level); } =20 -ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type) -{ - unsigned int index =3D le32_to_cpu(e820_reserve.count); - uint32_t utype =3D (uint32_t)type; - struct e820_entry *entry; - - if (type !=3D E820_RAM) { - /* old FW_CFG_E820_TABLE entry -- reservations only */ - if (index >=3D E820_NR_ENTRIES) { - return -EBUSY; - } - entry =3D &e820_reserve.entry[index++]; - - entry->address =3D cpu_to_le64(address); - entry->length =3D cpu_to_le64(length); - entry->type =3D cpu_to_le32(utype); - - e820_reserve.count =3D cpu_to_le32(index); - } - - /* new "etc/e820" file -- include ram too */ - e820_table =3D g_renew(struct e820_entry, e820_table, e820_entries + 1= ); - e820_table[e820_entries].address =3D cpu_to_le64(address); - e820_table[e820_entries].length =3D cpu_to_le64(length); - e820_table[e820_entries].type =3D cpu_to_le32(utype); - e820_entries++; - - return e820_entries; -} - -size_t e820_get_num_entries(void) -{ - return e820_entries; -} - -bool e820_get_entry(unsigned int idx, E820Type type, - uint64_t *address, uint64_t *length) -{ - uint32_t utype =3D (uint32_t)type; - if (idx < e820_entries && e820_table[idx].type =3D=3D cpu_to_le32(utyp= e)) { - *address =3D le64_to_cpu(e820_table[idx].address); - *length =3D le64_to_cpu(e820_table[idx].length); - return true; - } - return false; -} - /* Enables contiguous-apic-ID mode, for compatibility */ static bool compat_apic_id_mode; =20 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 95bf3278f2..0f1bf667ae 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -282,54 +282,6 @@ void pc_system_firmware_init(PCMachineState *pcms, Mem= oryRegion *rom_memory); void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry); =20 -/** - * E820Type: Type of the e820 address range. - */ -typedef enum { - E820_RAM =3D 1, - E820_RESERVED =3D 2, - E820_ACPI =3D 3, - E820_NVS =3D 4, - E820_UNUSABLE =3D 5 -} E820Type; - -/** - * e820_add_entry: Add an #e820_entry to the @e820_table. - * - * Returns the number of entries of the e820_table on success, - * or a negative errno otherwise. - * - * @address: The base address of the structure which the BIOS is to fill i= n. - * @length: The length in bytes of the structure passed to the BIOS. - * @type: The #E820Type of the address range. - */ -ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type); - -/** - * e820_get_num_entries: The number of entries of the @e820_table. - * - * Returns the number of entries of the e820_table. - */ -size_t e820_get_num_entries(void); - -/** - * e820_get_entry: Get the address/length of an #e820_entry. - * - * If the #e820_entry stored at @index is of #E820Type @type, fills @addre= ss - * and @length with the #e820_entry values and return @true. - * Return @false otherwise. - * - * @index: The index of the #e820_entry to get values. - * @type: The @E820Type of the address range expected. - * @address: Pointer to the base address of the #e820_entry structure to - * be filled. - * @length: Pointer to the length (in bytes) of the #e820_entry structure - * to be filled. - * @return: true if the entry was found, false otherwise. - */ -bool e820_get_entry(unsigned int index, E820Type type, - uint64_t *address, uint64_t *length); - extern GlobalProperty pc_compat_4_0[]; extern const size_t pc_compat_4_0_len; =20 diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 3b29ce5c0d..dbf890005e 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -39,6 +39,7 @@ #include "hw/i386/apic-msidef.h" #include "hw/i386/intel_iommu.h" #include "hw/i386/x86-iommu.h" +#include "hw/i386/e820_memory_layout.h" =20 #include "hw/pci/pci.h" #include "hw/pci/msi.h" --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 24 May 2019 02:37:10 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 015FDC05D266; Fri, 24 May 2019 06:37:10 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C6A335B689; Fri, 24 May 2019 06:36:59 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:41 +0200 Message-Id: <20190524063553.5339-9-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Fri, 24 May 2019 06:37:10 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 08/20] hw/i386/pc: Use address_space_memory in place X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The address_space_memory variable is used once. Use it in place and remove the argument. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Li Qiang --- hw/i386/pc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index fc22779ac1..a3936bb29d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -928,7 +928,7 @@ static void pc_build_smbios(PCMachineState *pcms) } } =20 -static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms) +static FWCfgState *bochs_bios_init(PCMachineState *pcms) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; @@ -936,7 +936,8 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PC= MachineState *pcms) const CPUArchIdList *cpus; MachineClass *mc =3D MACHINE_GET_CLASS(pcms); =20 - fw_cfg =3D fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, as); + fw_cfg =3D fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, + &address_space_memory); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); =20 /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: @@ -1761,7 +1762,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); =20 - fw_cfg =3D bochs_bios_init(&address_space_memory, pcms); + fw_cfg =3D bochs_bios_init(pcms); =20 rom_set_fw(fw_cfg); =20 --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680395; cv=none; d=zoho.com; s=zohoarc; b=hrnBonQue4UkPoubX4LJUqVr/8WGQcsX8gXiG0ZWcwFEduuXS+e9k+8gMmRsj7vFexyYuNYLJHYeNW/v0D8awh7CZUlOHcJsREehoyFVwEJel24+uKKr5/+ofJdyVpkFAOuG1H0DqHy4Ifd3tR8/96GLCViTS0jhMK2yumsO1x8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680395; 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Fri, 24 May 2019 06:37:10 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:42 +0200 Message-Id: <20190524063553.5339-10-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 24 May 2019 06:37:14 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 09/20] hw/i386/pc: Rename bochs_bios_init() more generic as x86_create_fw_cfg() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The bochs_bios_init() is not restricted to the Bochs BIOS and is useful to other BIOS. Rename it to be more generic. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Li Qiang --- hw/i386/pc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a3936bb29d..264074489b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -928,7 +928,7 @@ static void pc_build_smbios(PCMachineState *pcms) } } =20 -static FWCfgState *bochs_bios_init(PCMachineState *pcms) +static FWCfgState *x86_create_fw_cfg(PCMachineState *pcms) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; @@ -1508,7 +1508,7 @@ void pc_cpus_init(PCMachineState *pcms) * Limit for the APIC ID value, so that all * CPU APIC IDs are < pcms->apic_id_limit. * - * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init(). + * This is used for FW_CFG_MAX_CPUS. See comments on x86_create_fw_cfg= (). */ pcms->apic_id_limit =3D x86_cpu_apic_id_from_index(max_cpus - 1) + 1; possible_cpus =3D mc->possible_cpu_arch_ids(ms); @@ -1762,7 +1762,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); =20 - fw_cfg =3D bochs_bios_init(pcms); + fw_cfg =3D x86_create_fw_cfg(pcms); =20 rom_set_fw(fw_cfg); =20 --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680666; cv=none; d=zoho.com; s=zohoarc; b=ISpFGNeW7bhD3gogdJ88IZaGpm4ykIlRUmtzIRrkzF8b4IHb2f86KboNDXjd9vAJ+XJMX5BguMjeaD7O1u2Rg6cG0ER7puqVb6wmC26T7j+BXcpifjM6+ckvk7+dbb8cTU+c9G1Fy7pkGvNvVvbzLLv7qM16EsfaUv8EWYUw770= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680666; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=RvDi/vuww4d6sC+kJ506XAYHlGTnHeh5X2IWnZOgMIk=; b=jwDKnPe27kFef/rxqerjF7wcvsMb9ePaX6AjZaJD9bUxxDmT72EQffvLb/cteM4c2b7exbn/xYsvAwWtQktzZjKIS9f+aZR4dHjEl7/+UXYvOS/WulG4wIV/jg4ufi8ICExS34860wet5IkUZxDxiz8OlWf4bLbKS3zt6m5ePgc= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558680666707352.08994433854286; Thu, 23 May 2019 23:51:06 -0700 (PDT) Received: from localhost ([127.0.0.1]:49911 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU42b-0005qU-FE for importer@patchew.org; Fri, 24 May 2019 02:50:57 -0400 Received: from eggs.gnu.org ([209.51.188.92]:40768) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3pT-0003H6-Lg for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3pS-0003Cd-Po for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34312) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3pS-0003CI-IX for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:22 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D614E3082E1E; Fri, 24 May 2019 06:37:21 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 89BDE5B689; Fri, 24 May 2019 06:37:15 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:43 +0200 Message-Id: <20190524063553.5339-11-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.46]); Fri, 24 May 2019 06:37:21 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 10/20] hw/i386/pc: Pass the boot_cpus value by argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The boot_cpus is used once. Pass it by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 264074489b..01894b9875 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -928,7 +928,7 @@ static void pc_build_smbios(PCMachineState *pcms) } } =20 -static FWCfgState *x86_create_fw_cfg(PCMachineState *pcms) +static FWCfgState *x86_create_fw_cfg(PCMachineState *pcms, uint16_t boot_c= pus) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; @@ -938,7 +938,7 @@ static FWCfgState *x86_create_fw_cfg(PCMachineState *pc= ms) =20 fw_cfg =3D fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, &address_space_memory); - fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); + fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus); =20 /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: * @@ -1762,7 +1762,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); =20 - fw_cfg =3D x86_create_fw_cfg(pcms); + fw_cfg =3D x86_create_fw_cfg(pcms, pcms->boot_cpus); =20 rom_set_fw(fw_cfg); =20 --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680059; cv=none; d=zoho.com; s=zohoarc; b=FN0wOzDwQVxTku0macODpBSX3kDLm0UaqdCOf2pzVNJHzKxAzzVBfvWijArmmefquiZiqsV5WRKn7/B+MlfuMJLNWg2ifFRf1rMu4yPsS778W4PCqm/DqhRIugf2eXSYvOfel75vxPN0KGg091KQsb7N6eRizGS5aXyKsK0iRik= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680059; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Fri, 24 May 2019 02:37:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3pc-0003HR-RH for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37132) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3pc-0003H5-ME for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:32 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id F1700C0586C4; Fri, 24 May 2019 06:37:31 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 52EE55B68E; Fri, 24 May 2019 06:37:22 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:44 +0200 Message-Id: <20190524063553.5339-12-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Fri, 24 May 2019 06:37:32 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 11/20] hw/i386/pc: Pass the apic_id_limit value by argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Pass the apic_id_limit value by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 01894b9875..fe07baeb1d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -928,7 +928,8 @@ static void pc_build_smbios(PCMachineState *pcms) } } =20 -static FWCfgState *x86_create_fw_cfg(PCMachineState *pcms, uint16_t boot_c= pus) +static FWCfgState *x86_create_fw_cfg(PCMachineState *pcms, + uint16_t boot_cpus, uint16_t apic_id_= limit) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; @@ -1762,7 +1763,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); =20 - fw_cfg =3D x86_create_fw_cfg(pcms, pcms->boot_cpus); + fw_cfg =3D x86_create_fw_cfg(pcms, pcms->boot_cpus, pcms->apic_id_limi= t); =20 rom_set_fw(fw_cfg); =20 --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680139; cv=none; d=zoho.com; s=zohoarc; b=S8rO+rqc6+GmK1fuZSRNm3ipJ109a8b1532rIxRa2kotiXOs/bCUkGOZngdLfKYUPgVioMxKgRiVpLPWkTXxmVi0HMTtRAADHWaXT0TWjEGpUKzcws9uW1rulzrS/3QzzxOElcIG+H8u2nZ9OLK36v/wkLaV04UTZgQzPJFVZ/I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680139; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=3UPuV3tMWRU6ME1OIRg5TWYNzhcd+CfdRuVRmcEzBrU=; b=b4bcH9WEFuzSDm1YAacumAWT/Fuj9hEKAuGUorhosrRoRuj1kwuxp0KhVyEdPI4KBWitxO56GY7D4Y3qP9If55La/6jNbAtagrH0Q2WWCXCMY0CATMnUoitTdQfH0dXz7TeI9F8+iedtuPQMOWEMYxHxTEYfpDwLFmDyzvZ0kfE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558680139689901.2576494642656; Thu, 23 May 2019 23:42:19 -0700 (PDT) Received: from localhost ([127.0.0.1]:49769 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3u8-0006kR-KO for importer@patchew.org; Fri, 24 May 2019 02:42:12 -0400 Received: from eggs.gnu.org ([209.51.188.92]:40855) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3ph-0003R2-Uc for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3ph-0003Jw-0E for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:37 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37156) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3pg-0003JZ-P1 for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:36 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0E6A8C0578C4; Fri, 24 May 2019 06:37:36 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 758F65B689; Fri, 24 May 2019 06:37:32 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:45 +0200 Message-Id: <20190524063553.5339-13-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Fri, 24 May 2019 06:37:36 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 12/20] hw/i386/pc: Pass the CPUArchIdList array by argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Pass the CPUArchIdList array by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index fe07baeb1d..6cfdb09f34 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -928,14 +928,12 @@ static void pc_build_smbios(PCMachineState *pcms) } } =20 -static FWCfgState *x86_create_fw_cfg(PCMachineState *pcms, +static FWCfgState *x86_create_fw_cfg(PCMachineState *pcms, const CPUArchId= List *cpus, uint16_t boot_cpus, uint16_t apic_id_= limit) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; int i; - const CPUArchIdList *cpus; - MachineClass *mc =3D MACHINE_GET_CLASS(pcms); =20 fw_cfg =3D fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, &address_space_memory); @@ -953,7 +951,7 @@ static FWCfgState *x86_create_fw_cfg(PCMachineState *pc= ms, * So for compatibility reasons with old BIOSes we are stuck with * "etc/max-cpus" actually being apic_id_limit */ - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)pcms->apic_id_limit); + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, acpi_tables, acpi_tables_len); @@ -969,20 +967,19 @@ static FWCfgState *x86_create_fw_cfg(PCMachineState *= pcms, * of nodes, one word for each VCPU->node and one word for each node to * hold the amount of memory. */ - numa_fw_cfg =3D g_new0(uint64_t, 1 + pcms->apic_id_limit + nb_numa_nod= es); + numa_fw_cfg =3D g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes); numa_fw_cfg[0] =3D cpu_to_le64(nb_numa_nodes); - cpus =3D mc->possible_cpu_arch_ids(MACHINE(pcms)); for (i =3D 0; i < cpus->len; i++) { unsigned int apic_id =3D cpus->cpus[i].arch_id; - assert(apic_id < pcms->apic_id_limit); + assert(apic_id < apic_id_limit); numa_fw_cfg[apic_id + 1] =3D cpu_to_le64(cpus->cpus[i].props.node_= id); } for (i =3D 0; i < nb_numa_nodes; i++) { - numa_fw_cfg[pcms->apic_id_limit + 1 + i] =3D + numa_fw_cfg[apic_id_limit + 1 + i] =3D cpu_to_le64(numa_info[i].node_mem); } fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg, - (1 + pcms->apic_id_limit + nb_numa_nodes) * + (1 + apic_id_limit + nb_numa_nodes) * sizeof(*numa_fw_cfg)); =20 return fw_cfg; @@ -1763,7 +1760,8 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); =20 - fw_cfg =3D x86_create_fw_cfg(pcms, pcms->boot_cpus, pcms->apic_id_limi= t); + fw_cfg =3D x86_create_fw_cfg(pcms, mc->possible_cpu_arch_ids(machine), + pcms->boot_cpus, pcms->apic_id_limit); =20 rom_set_fw(fw_cfg); =20 --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Fri, 24 May 2019 06:37:41 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9D4525B689; Fri, 24 May 2019 06:37:36 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:46 +0200 Message-Id: <20190524063553.5339-14-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 24 May 2019 06:37:42 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 13/20] hw/i386/pc: Let fw_cfg_init() use the generic MachineState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We removed the PCMachineState access, we can now let the fw_cfg_init() function to take a generic MachineState object. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 6cfdb09f34..e8813ef2b6 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -928,7 +928,7 @@ static void pc_build_smbios(PCMachineState *pcms) } } =20 -static FWCfgState *x86_create_fw_cfg(PCMachineState *pcms, const CPUArchId= List *cpus, +static FWCfgState *x86_create_fw_cfg(MachineState *ms, const CPUArchIdList= *cpus, uint16_t boot_cpus, uint16_t apic_id_= limit) { FWCfgState *fw_cfg; @@ -1664,6 +1664,7 @@ void pc_memory_init(PCMachineState *pcms, MemoryRegion *ram_below_4g, *ram_above_4g; FWCfgState *fw_cfg; MachineState *machine =3D MACHINE(pcms); + MachineClass *mc =3D MACHINE_GET_CLASS(machine); PCMachineClass *pcmc =3D PC_MACHINE_GET_CLASS(pcms); =20 assert(machine->ram_size =3D=3D pcms->below_4g_mem_size + @@ -1760,7 +1761,7 @@ void pc_memory_init(PCMachineState *pcms, option_rom_mr, 1); =20 - fw_cfg =3D x86_create_fw_cfg(pcms, mc->possible_cpu_arch_ids(machine), + fw_cfg =3D x86_create_fw_cfg(machine, mc->possible_cpu_arch_ids(machin= e), pcms->boot_cpus, pcms->apic_id_limit); =20 rom_set_fw(fw_cfg); --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680461; cv=none; d=zoho.com; s=zohoarc; b=Rgn2weQ/u3sEw5p+d5t9mryDPmm7zX4VZJCNPyleXeA/nct6ZnYcj1fzio9iqNC1UM1t/mpAccAvFQtY6XKEiOk4fAMf10NMok4VWD425gxQ7hwxGjJ66fGrz2K/nEHvYmOflbcQTxnctp66RidDppFckl4NYQf3hzvHXleOCi4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680461; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Fri, 24 May 2019 02:37:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3px-0003UH-3d for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:54 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42354) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3pw-0003Ta-Ul for qemu-devel@nongnu.org; Fri, 24 May 2019 02:37:53 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 35AC33086275; Fri, 24 May 2019 06:37:52 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6BB625B689; Fri, 24 May 2019 06:37:42 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:47 +0200 Message-Id: <20190524063553.5339-15-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Fri, 24 May 2019 06:37:52 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 14/20] hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Pass the FWCfgState object by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index e8813ef2b6..b029aee6c7 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -886,7 +886,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int= cpu_index) } } =20 -static void pc_build_smbios(PCMachineState *pcms) +static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg) { uint8_t *smbios_tables, *smbios_anchor; size_t smbios_tables_len, smbios_anchor_len; @@ -900,7 +900,7 @@ static void pc_build_smbios(PCMachineState *pcms) =20 smbios_tables =3D smbios_get_table_legacy(&smbios_tables_len); if (smbios_tables) { - fw_cfg_add_bytes(pcms->fw_cfg, FW_CFG_SMBIOS_ENTRIES, + fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, smbios_tables, smbios_tables_len); } =20 @@ -921,9 +921,9 @@ static void pc_build_smbios(PCMachineState *pcms) g_free(mem_array); =20 if (smbios_anchor) { - fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-tables", + fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables", smbios_tables, smbios_tables_len); - fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-anchor", + fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor", smbios_anchor, smbios_anchor_len); } } @@ -1587,7 +1587,7 @@ void pc_machine_done(Notifier *notifier, void *data) =20 acpi_setup(); if (pcms->fw_cfg) { - pc_build_smbios(pcms); + pc_build_smbios(pcms, pcms->fw_cfg); pc_build_feature_control_file(pcms); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Fri, 24 May 2019 06:37:56 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BB92A5B689; Fri, 24 May 2019 06:37:52 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:48 +0200 Message-Id: <20190524063553.5339-16-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 24 May 2019 06:37:56 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 15/20] hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let the pc_build_smbios() function take a generic MachineState argument. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index b029aee6c7..a79b344eb5 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -886,13 +886,12 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned i= nt cpu_index) } } =20 -static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg) +static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg) { uint8_t *smbios_tables, *smbios_anchor; size_t smbios_tables_len, smbios_anchor_len; struct smbios_phys_mem_area *mem_array; unsigned i, array_count; - MachineState *ms =3D MACHINE(pcms); X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); =20 /* tell smbios about cpuid version and features */ @@ -1587,7 +1586,7 @@ void pc_machine_done(Notifier *notifier, void *data) =20 acpi_setup(); if (pcms->fw_cfg) { - pc_build_smbios(pcms, pcms->fw_cfg); + pc_build_smbios(MACHINE(pcms), pcms->fw_cfg); pc_build_feature_control_file(pcms); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680787; cv=none; d=zoho.com; s=zohoarc; b=QCMHx994GBewc6/ejUAEDQwLmhLyrzMz+RnMk7xHPg8JajLXOEc68J0T7vwg50Q22G87UJ7jw9zncElwALDh+7Foil3lP119MISvNZUxkhXA2mDcOnhAGGdt6sDNck5G0BlFP3VsqbeUHZNZCsaPxOYVTMkmX22+yrVnxZmeIOE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680787; 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Fri, 24 May 2019 06:37:56 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:49 +0200 Message-Id: <20190524063553.5339-17-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 24 May 2019 06:38:00 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 16/20] hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Now that the pc_build_smbios() function has been refactored to not depend of PC specific types, rename it to a more generic name. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a79b344eb5..2804c4dc1b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -886,7 +886,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int= cpu_index) } } =20 -static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg) +static void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg) { uint8_t *smbios_tables, *smbios_anchor; size_t smbios_tables_len, smbios_anchor_len; @@ -1586,7 +1586,7 @@ void pc_machine_done(Notifier *notifier, void *data) =20 acpi_setup(); if (pcms->fw_cfg) { - pc_build_smbios(MACHINE(pcms), pcms->fw_cfg); + fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg); pc_build_feature_control_file(pcms); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680860; cv=none; d=zoho.com; s=zohoarc; b=f0hwg8v+unDo9jRSpBGE4qAPNeIA6alu2qcOitCm0BI6gijRscDp7ue4yBGniyU+5rOOCLvsn/tnWyoGRsb6r+1wscV+KSQmrFLK7kiTC0+rFqTtZdKt6NXPyDNEbBhL/oP7JKcU062R+CrCz+cuYHF+AHlUFnaS1mvWkTo7Z7U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680860; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=P0iWkC3XaD8qSxs2m2Wu0jaUCFuEkizJ9/DjFa3X8qk=; b=B/RSKTdOW1lN7Gw2PcXpng4ZrpSVPkdrE/7jpSzsb6FGvzdZFuzPbIGmUICB/D4Yy27oZA2JCoNX5Q6SMt04W79F/UUwtN+aq41FMwO1jpDLijISrGGdPuyKbL+IjGKs9fWrHZRSBA4K5DHBe0LA00NDKJjEmeAR7sw6jCBVYJI= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558680860294128.76110259920142; Thu, 23 May 2019 23:54:20 -0700 (PDT) Received: from localhost ([127.0.0.1]:49942 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU45e-00087H-R0 for importer@patchew.org; Fri, 24 May 2019 02:54:06 -0400 Received: from eggs.gnu.org ([209.51.188.92]:40957) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3qA-0003pL-Ek for qemu-devel@nongnu.org; Fri, 24 May 2019 02:38:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3q9-0003j0-Hx for qemu-devel@nongnu.org; Fri, 24 May 2019 02:38:06 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49076) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3q9-0003iL-C6 for qemu-devel@nongnu.org; Fri, 24 May 2019 02:38:05 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A849C8830F; Fri, 24 May 2019 06:38:04 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B8CB75B68E; Fri, 24 May 2019 06:38:00 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:50 +0200 Message-Id: <20190524063553.5339-18-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 24 May 2019 06:38:04 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 17/20] hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Pass the FWCfgState object by argument, this will allow us to remove the PCMachineState argument later. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2804c4dc1b..0db0ba3893 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1515,7 +1515,8 @@ void pc_cpus_init(PCMachineState *pcms) } } =20 -static void pc_build_feature_control_file(PCMachineState *pcms) +static void pc_build_feature_control_file(PCMachineState *pcms, + FWCfgState *fw_cfg) { MachineState *ms =3D MACHINE(pcms); X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); @@ -1541,7 +1542,7 @@ static void pc_build_feature_control_file(PCMachineSt= ate *pcms) =20 val =3D g_malloc(sizeof(*val)); *val =3D cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED); - fw_cfg_add_file(pcms->fw_cfg, "etc/msr_feature_control", val, sizeof(*= val)); + fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val)); } =20 static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count) @@ -1587,7 +1588,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (pcms->fw_cfg) { fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg); - pc_build_feature_control_file(pcms); + pc_build_feature_control_file(pcms, pcms->fw_cfg); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); } --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680927; cv=none; d=zoho.com; s=zohoarc; b=IE6q7t3Elka1Pkeoarr0hCtBx75cclMPORFhf4IcRCvfC6qMHYstFx5M+S6vTxdCkIDd4iN/APu+P1/mVaBRJJl/2wz7vPCrr7DxXj+ejNu5cFN3Z9wnsuQxXcFzMRxHFVxgrQfMzY4nwXvQUIGnTy+JN2UQPS7WOFYpG0lIojQ= ARC-Message-Signature: i=1; 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Fri, 24 May 2019 06:38:04 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:51 +0200 Message-Id: <20190524063553.5339-19-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 24 May 2019 06:38:14 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 18/20] hw/i386/pc: Let pc_build_feature_control() take a MachineState argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let the pc_build_feature_control_file() function take a generic MachineState argument. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 0db0ba3893..0ff2cea1ee 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1515,10 +1515,9 @@ void pc_cpus_init(PCMachineState *pcms) } } =20 -static void pc_build_feature_control_file(PCMachineState *pcms, +static void pc_build_feature_control_file(MachineState *ms, FWCfgState *fw_cfg) { - MachineState *ms =3D MACHINE(pcms); X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); CPUX86State *env =3D &cpu->env; uint32_t unused, ecx, edx; @@ -1588,7 +1587,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (pcms->fw_cfg) { fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg); - pc_build_feature_control_file(pcms, pcms->fw_cfg); + pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); } --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680998; cv=none; d=zoho.com; s=zohoarc; b=T26PxBIgoHQUkdeSS6PPQW4UZu2r7phGwQoxh1nv/efnKAhWNG5dIfOzwad/3lsPBDgfyTRkHhpLz1r/jnUP23b0kpjJFV05Ed5GY27tt6mTKNNMbVQEs59lX2iLXiukVFQ7OOCzAhCiWhOqkotKcbKgT3hYss3GJcugDcIcn9A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680998; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=wBGpvh30WT03i1dtU6gOPJe1MeUd6H4VmtZSSq6kUhc=; b=HYOQPjJJTUAHWSJ2mAJ4Cz3EIqvTvjd7XtsDpOkHhyraimoffoLx0Ln2lTy2RqekSyxg8nTyKBn9an+DNHtcB/C1XKMlGGXHNuRRdjqoEdvqzc+ucApqIliOwhcZd8hvgWxBna+9oxkW1AGcAtfHpCnSO7LuxDzAMIStVzbEc5c= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558680998309866.7757818949719; Thu, 23 May 2019 23:56:38 -0700 (PDT) Received: from localhost ([127.0.0.1]:49984 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU480-00011O-8Q for importer@patchew.org; Fri, 24 May 2019 02:56:32 -0400 Received: from eggs.gnu.org ([209.51.188.92]:41056) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3qS-00043s-HY for qemu-devel@nongnu.org; Fri, 24 May 2019 02:38:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3qQ-0003xX-Hf for qemu-devel@nongnu.org; Fri, 24 May 2019 02:38:24 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43942) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3qQ-0003x8-C8 for qemu-devel@nongnu.org; Fri, 24 May 2019 02:38:22 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A995F3079B60; Fri, 24 May 2019 06:38:21 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3015A5B689; Fri, 24 May 2019 06:38:14 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:52 +0200 Message-Id: <20190524063553.5339-20-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Fri, 24 May 2019 06:38:21 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 19/20] hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Now that the pc_build_feature_control_file() function has been refactored to not depend of PC specific types, rename it to a more generic name. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 0ff2cea1ee..4d333aba82 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1515,8 +1515,8 @@ void pc_cpus_init(PCMachineState *pcms) } } =20 -static void pc_build_feature_control_file(MachineState *ms, - FWCfgState *fw_cfg) +static void fw_cfg_build_feature_control(MachineState *ms, + FWCfgState *fw_cfg) { X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); CPUX86State *env =3D &cpu->env; @@ -1587,7 +1587,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (pcms->fw_cfg) { fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg); - pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg); + fw_cfg_build_feature_control(MACHINE(pcms), pcms->fw_cfg); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); } --=20 2.20.1 From nobody Mon Apr 29 04:29:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1558680216; cv=none; d=zoho.com; s=zohoarc; b=IGMOahuGUDhRKHheMlb6cw3KFrH2G0av1T7GPTNvZl7p+0+k9PLlU41h+Fz7+lvkZJ5vSAQpS0mHMman6ee3PwitJwZRebk0D7ipha7DhDjkHZqw4k4dzpJcS/ixqmQ+px7z6qL1GH8DJ+GiqpqvePHapdQM/l3xbshvaytdsqU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558680216; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=2Cov2lAXaTvHlPJ8XCzW+KbMnmmZkVHzS9sYGqO958c=; b=CDFb+hEZP1acjMCYDRf1IHHyCmk2vYrOUqouqwHYtLyxW1Vc2D4TlLEwTUrKRaTA216kVltWjMtTa6UUTw9LdI2ICT4XBoV4QRiWYR0MrupYrIFbsgOjxmKu9LjmHIHMYvdGjRNkYN/Yj/IyMaCpDTjPbhHaYUCOZS2vlU7XR40= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558680216906464.6896998767512; Thu, 23 May 2019 23:43:36 -0700 (PDT) Received: from localhost ([127.0.0.1]:49779 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3vN-0007pI-PT for importer@patchew.org; Fri, 24 May 2019 02:43:29 -0400 Received: from eggs.gnu.org ([209.51.188.92]:41103) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hU3qX-00045y-Oj for qemu-devel@nongnu.org; Fri, 24 May 2019 02:38:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hU3qW-00040S-1p for qemu-devel@nongnu.org; Fri, 24 May 2019 02:38:29 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48070) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hU3qV-0003zf-GJ for qemu-devel@nongnu.org; Fri, 24 May 2019 02:38:27 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C685A308FBA9; Fri, 24 May 2019 06:38:26 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-235.brq.redhat.com [10.40.204.235]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 247C3546F1; Fri, 24 May 2019 06:38:21 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 24 May 2019 08:35:53 +0200 Message-Id: <20190524063553.5339-21-philmd@redhat.com> In-Reply-To: <20190524063553.5339-1-philmd@redhat.com> References: <20190524063553.5339-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 24 May 2019 06:38:26 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 20/20] hw/i386/pc: Extract the x86 generic fw_cfg code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , Eduardo Habkost , Rob Bradford , "Michael S. Tsirkin" , Marcelo Tosatti , Paolo Bonzini , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Samuel Ortiz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Extract all the functions that are not PC-machine specific into the (arch-specific) fw_cfg.c file. This will allow other X86-machine to re-use these functions. Suggested-by: Samuel Ortiz Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/fw_cfg.c | 135 +++++++++++++++++++++++++++++++++++++++++++++++ hw/i386/fw_cfg.h | 6 +++ hw/i386/pc.c | 128 +------------------------------------------- 3 files changed, 142 insertions(+), 127 deletions(-) diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index 380a819230..bdd744c040 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -13,8 +13,15 @@ */ =20 #include "qemu/osdep.h" +#include "sysemu/numa.h" +#include "hw/acpi/acpi.h" +#include "hw/firmware/smbios.h" +#include "hw/i386/pc.h" #include "hw/i386/fw_cfg.h" +#include "hw/timer/hpet.h" #include "hw/nvram/fw_cfg.h" +#include "e820_memory_layout.h" +#include "kvm_i386.h" =20 const char *fw_cfg_arch_key_name(uint16_t key) { @@ -36,3 +43,131 @@ const char *fw_cfg_arch_key_name(uint16_t key) } return NULL; } + +void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg) +{ + uint8_t *smbios_tables, *smbios_anchor; + size_t smbios_tables_len, smbios_anchor_len; + struct smbios_phys_mem_area *mem_array; + unsigned i, array_count; + X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); + + /* tell smbios about cpuid version and features */ + smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]= ); + + smbios_tables =3D smbios_get_table_legacy(&smbios_tables_len); + if (smbios_tables) { + fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, + smbios_tables, smbios_tables_len); + } + + /* build the array of physical mem area from e820 table */ + mem_array =3D g_malloc0(sizeof(*mem_array) * e820_get_num_entries()); + for (i =3D 0, array_count =3D 0; i < e820_get_num_entries(); i++) { + uint64_t addr, len; + + if (e820_get_entry(i, E820_RAM, &addr, &len)) { + mem_array[array_count].address =3D addr; + mem_array[array_count].length =3D len; + array_count++; + } + } + smbios_get_tables(mem_array, array_count, + &smbios_tables, &smbios_tables_len, + &smbios_anchor, &smbios_anchor_len); + g_free(mem_array); + + if (smbios_anchor) { + fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables", + smbios_tables, smbios_tables_len); + fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor", + smbios_anchor, smbios_anchor_len); + } +} + +void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg) +{ + X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); + CPUX86State *env =3D &cpu->env; + uint32_t unused, ecx, edx; + uint64_t feature_control_bits =3D 0; + uint64_t *val; + + cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx); + if (ecx & CPUID_EXT_VMX) { + feature_control_bits |=3D FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SM= X; + } + + if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) =3D=3D + (CPUID_EXT2_MCE | CPUID_EXT2_MCA) && + (env->mcg_cap & MCG_LMCE_P)) { + feature_control_bits |=3D FEATURE_CONTROL_LMCE; + } + + if (!feature_control_bits) { + return; + } + + val =3D g_malloc(sizeof(*val)); + *val =3D cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED); + fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val)); +} + +FWCfgState *x86_create_fw_cfg(MachineState *ms, const CPUArchIdList *cpus, + uint16_t boot_cpus, uint16_t apic_id_limit) +{ + FWCfgState *fw_cfg; + uint64_t *numa_fw_cfg; + int i; + + fw_cfg =3D fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, + &address_space_memory); + fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus); + + /* + * FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: + * + * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for + * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table, + * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface + * for CPU hotplug also uses APIC ID and not "CPU index". + * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs", + * but the "limit to the APIC ID values SeaBIOS may see". + * + * So for compatibility reasons with old BIOSes we are stuck with + * "etc/max-cpus" actually being apic_id_limit + */ + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit); + fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); + fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, + acpi_tables, acpi_tables_len); + fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override(= )); + + fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, + &e820_reserve, sizeof(e820_reserve)); + fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, + sizeof(struct e820_entry) * e820_get_num_entries()); + + fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg)); + /* + * allocate memory for the NUMA channel: one (64bit) word for the numb= er + * of nodes, one word for each VCPU->node and one word for each node to + * hold the amount of memory. + */ + numa_fw_cfg =3D g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes); + numa_fw_cfg[0] =3D cpu_to_le64(nb_numa_nodes); + for (i =3D 0; i < cpus->len; i++) { + unsigned int apic_id =3D cpus->cpus[i].arch_id; + assert(apic_id < apic_id_limit); + numa_fw_cfg[apic_id + 1] =3D cpu_to_le64(cpus->cpus[i].props.node_= id); + } + for (i =3D 0; i < nb_numa_nodes; i++) { + numa_fw_cfg[apic_id_limit + 1 + i] =3D + cpu_to_le64(numa_info[i].node_mem); + } + fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg, + (1 + apic_id_limit + nb_numa_nodes) * + sizeof(*numa_fw_cfg)); + + return fw_cfg; +} diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h index 17a4bc32f2..14a9223374 100644 --- a/hw/i386/fw_cfg.h +++ b/hw/i386/fw_cfg.h @@ -9,6 +9,7 @@ #ifndef HW_I386_FW_CFG_H #define HW_I386_FW_CFG_H =20 +#include "hw/boards.h" #include "hw/nvram/fw_cfg.h" =20 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) @@ -17,4 +18,9 @@ #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3) #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4) =20 +FWCfgState *x86_create_fw_cfg(MachineState *ms, const CPUArchIdList *cpus, + uint16_t boot_cpus, uint16_t apic_id_limit); +void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg); +void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg); + #endif diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 4d333aba82..0e59756ed5 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -79,6 +79,7 @@ #include "hw/net/ne2000-isa.h" #include "standard-headers/asm-x86/bootparam.h" #include "e820_memory_layout.h" +#include "fw_cfg.h" =20 /* debug PC/ISA interrupts */ //#define DEBUG_IRQ @@ -886,104 +887,6 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned i= nt cpu_index) } } =20 -static void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg) -{ - uint8_t *smbios_tables, *smbios_anchor; - size_t smbios_tables_len, smbios_anchor_len; - struct smbios_phys_mem_area *mem_array; - unsigned i, array_count; - X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); - - /* tell smbios about cpuid version and features */ - smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]= ); - - smbios_tables =3D smbios_get_table_legacy(&smbios_tables_len); - if (smbios_tables) { - fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES, - smbios_tables, smbios_tables_len); - } - - /* build the array of physical mem area from e820 table */ - mem_array =3D g_malloc0(sizeof(*mem_array) * e820_get_num_entries()); - for (i =3D 0, array_count =3D 0; i < e820_get_num_entries(); i++) { - uint64_t addr, len; - - if (e820_get_entry(i, E820_RAM, &addr, &len)) { - mem_array[array_count].address =3D addr; - mem_array[array_count].length =3D len; - array_count++; - } - } - smbios_get_tables(mem_array, array_count, - &smbios_tables, &smbios_tables_len, - &smbios_anchor, &smbios_anchor_len); - g_free(mem_array); - - if (smbios_anchor) { - fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables", - smbios_tables, smbios_tables_len); - fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor", - smbios_anchor, smbios_anchor_len); - } -} - -static FWCfgState *x86_create_fw_cfg(MachineState *ms, const CPUArchIdList= *cpus, - uint16_t boot_cpus, uint16_t apic_id_= limit) -{ - FWCfgState *fw_cfg; - uint64_t *numa_fw_cfg; - int i; - - fw_cfg =3D fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, - &address_space_memory); - fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus); - - /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: - * - * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for - * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table, - * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface - * for CPU hotplug also uses APIC ID and not "CPU index". - * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs", - * but the "limit to the APIC ID values SeaBIOS may see". - * - * So for compatibility reasons with old BIOSes we are stuck with - * "etc/max-cpus" actually being apic_id_limit - */ - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit); - fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); - fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, - acpi_tables, acpi_tables_len); - fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override(= )); - - fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, - &e820_reserve, sizeof(e820_reserve)); - fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, - sizeof(struct e820_entry) * e820_get_num_entries()); - - fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg)); - /* allocate memory for the NUMA channel: one (64bit) word for the numb= er - * of nodes, one word for each VCPU->node and one word for each node to - * hold the amount of memory. - */ - numa_fw_cfg =3D g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes); - numa_fw_cfg[0] =3D cpu_to_le64(nb_numa_nodes); - for (i =3D 0; i < cpus->len; i++) { - unsigned int apic_id =3D cpus->cpus[i].arch_id; - assert(apic_id < apic_id_limit); - numa_fw_cfg[apic_id + 1] =3D cpu_to_le64(cpus->cpus[i].props.node_= id); - } - for (i =3D 0; i < nb_numa_nodes; i++) { - numa_fw_cfg[apic_id_limit + 1 + i] =3D - cpu_to_le64(numa_info[i].node_mem); - } - fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg, - (1 + apic_id_limit + nb_numa_nodes) * - sizeof(*numa_fw_cfg)); - - return fw_cfg; -} - static long get_file_size(FILE *f) { long where, size; @@ -1515,35 +1418,6 @@ void pc_cpus_init(PCMachineState *pcms) } } =20 -static void fw_cfg_build_feature_control(MachineState *ms, - FWCfgState *fw_cfg) -{ - X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); - CPUX86State *env =3D &cpu->env; - uint32_t unused, ecx, edx; - uint64_t feature_control_bits =3D 0; - uint64_t *val; - - cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx); - if (ecx & CPUID_EXT_VMX) { - feature_control_bits |=3D FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SM= X; - } - - if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) =3D=3D - (CPUID_EXT2_MCE | CPUID_EXT2_MCA) && - (env->mcg_cap & MCG_LMCE_P)) { - feature_control_bits |=3D FEATURE_CONTROL_LMCE; - } - - if (!feature_control_bits) { - return; - } - - val =3D g_malloc(sizeof(*val)); - *val =3D cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED); - fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val)); -} - static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count) { if (cpus_count > 0xff) { --=20 2.20.1