From nobody Mon Nov 10 19:44:25 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1558421851; cv=none; d=zoho.com; s=zohoarc; b=cCNK603VyExvzomwuZ+Zn3WG0jkgeLtxW87qxNHD8XCLM8TwBr/1GmuxokmGDcRfJdVkssJk2yeTkCJwr+UTKUfuFpQAJ8CYa/9S5QRmhrgsk5+ZfwIhNQfyrT3DyXs5h1QJUXwDx4RFHLDiNCRxURnVYtYm0kMaDyEI9L6JpCk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558421851; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=Wc/aFDb75cj7wPP2sXON9bdvHFNZeVVDMnlu5xZ4sD0=; b=GwW/tAaTNMVMP7RRur6TZkNy3utO6obbm7q4ZkVOXT6suWdIg+0RZDTr5Sg8d+6yY2M5OeECI9Rqf74DTC8i6u3qiIHAVHY2sxQoB0cBgBLk5TI+RUTUvW1fMUWNpEhF0m4Vl3cd6BYGDGxNQUFUNoYt4XKUa+wyJ6eK0WM8YrY= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558421851428788.4277108159012; Mon, 20 May 2019 23:57:31 -0700 (PDT) Received: from localhost ([127.0.0.1]:47759 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSyiI-0005fi-EI for importer@patchew.org; Tue, 21 May 2019 02:57:30 -0400 Received: from eggs.gnu.org ([209.51.188.92]:49232) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSyHt-0006QE-SL for qemu-devel@nongnu.org; Tue, 21 May 2019 02:30:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hSyHr-0008JO-RV for qemu-devel@nongnu.org; Tue, 21 May 2019 02:30:13 -0400 Received: from mga09.intel.com ([134.134.136.24]:50783) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hSyHk-0008AJ-A8; Tue, 21 May 2019 02:30:05 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 May 2019 23:30:03 -0700 Received: from richard.sh.intel.com (HELO localhost) ([10.239.159.54]) by orsmga001.jf.intel.com with ESMTP; 20 May 2019 23:30:00 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: Wei Yang To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Tue, 21 May 2019 14:28:36 +0800 Message-Id: <20190521062836.6541-3-richardw.yang@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190521062836.6541-1-richardw.yang@linux.intel.com> References: <20190521062836.6541-1-richardw.yang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.24 Subject: [Qemu-devel] [PATCH v6 2/2] acpi: pci: use build_append_foo() API to construct MCFG X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, thuth@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com, Wei Yang , imammedo@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" build_append_foo() API doesn't need explicit endianness conversions which eliminates a source of errors and it makes build_mcfg() look like declarative definition of MCFG table in ACPI spec, which makes it easy to review. Signed-off-by: Wei Yang Suggested-by: Igor Mammedov Reviewed-by: Igor Mammedov v3: * add some comment on the Configuration Space base address allocation structure v2: * miss the reserved[8] of MCFG in last version, add it back * drop SOBs and make sure bios-tables-test all OK --- hw/acpi/pci.c | 39 +++++++++++++++++++++++++------------ include/hw/acpi/acpi-defs.h | 18 ----------------- 2 files changed, 27 insertions(+), 30 deletions(-) diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c index fa0fa30bb9..9510597a19 100644 --- a/hw/acpi/pci.c +++ b/hw/acpi/pci.c @@ -30,17 +30,32 @@ =20 void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) { - AcpiTableMcfg *mcfg; - int len =3D sizeof(*mcfg) + sizeof(mcfg->allocation[0]); - - mcfg =3D acpi_data_push(table_data, len); - mcfg->allocation[0].address =3D cpu_to_le64(info->base); - - /* Only a single allocation so no need to play with segments */ - mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); - mcfg->allocation[0].start_bus_number =3D 0; - mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->size - 1); - - build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); + int mcfg_start =3D table_data->len; + + /* + * PCI Firmware Specification, Revision 3.0 + * 4.1.2 MCFG Table Description. + */ + acpi_data_push(table_data, sizeof(AcpiTableHeader)); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 8); + + /* + * Memory Mapped Enhanced Configuration Space Base Address Allocation + * Structure + */ + /* Base address, processor-relative */ + build_append_int_noprefix(table_data, info->base, 8); + /* PCI segment group number */ + build_append_int_noprefix(table_data, 0, 2); + /* Starting PCI Bus number */ + build_append_int_noprefix(table_data, 0, 1); + /* Final PCI Bus number */ + build_append_int_noprefix(table_data, PCIE_MMCFG_BUS(info->size - 1), = 1); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 4); + + build_header(linker, table_data, (void *)(table_data->data + mcfg_star= t), + "MCFG", table_data->len - mcfg_start, 1, NULL, NULL); } =20 diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h index f9aa4bd398..57a3f58b0c 100644 --- a/include/hw/acpi/acpi-defs.h +++ b/include/hw/acpi/acpi-defs.h @@ -449,24 +449,6 @@ struct AcpiSratProcessorGiccAffinity { =20 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity; =20 -/* PCI fw r3.0 MCFG table. */ -/* Subtable */ -struct AcpiMcfgAllocation { - uint64_t address; /* Base address, processor-relative */ - uint16_t pci_segment; /* PCI segment group number */ - uint8_t start_bus_number; /* Starting PCI Bus number */ - uint8_t end_bus_number; /* Final PCI Bus number */ - uint32_t reserved; -} QEMU_PACKED; -typedef struct AcpiMcfgAllocation AcpiMcfgAllocation; - -struct AcpiTableMcfg { - ACPI_TABLE_HEADER_DEF; - uint8_t reserved[8]; - AcpiMcfgAllocation allocation[0]; -} QEMU_PACKED; -typedef struct AcpiTableMcfg AcpiTableMcfg; - /* * TCPA Description Table * --=20 2.19.1