From nobody Tue May 14 10:28:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1558314201; cv=none; d=zoho.com; s=zohoarc; b=frjBa1Vp6uiIHXyRvi0esC2RumpVfOl2xw3uApH869rsUuT6CeK2a0TVPPmIbJVfI8noXmUrWpFJ7AVrRztlbUKCnipLCiSmU+DhmDhPFcVGf63PnfbkKvQZH1F9sNZrGs2tnjmQAd5a6/dg1nc6NIjUnFZmxed+k1eHQXOuHWE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558314201; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=au1CgXkiKkQOWuI13qLSzWwq2SQAAjPuBV90e5SAFTQ=; b=CWHNUIvtJ8mhiiPdldVOO3Nhu4hrvYjAEOxFdV7HwSOSV8qPbQtPp971w3ya5KGxVcOQftKTIsFi9Ln/pFDcxcqgIOUDFJjk5Gd5MuQUrhfBp3Dyag4AR20t8lQIMSLZ8z3CcI8IxX23C5DDKbfeYoL+ELE8Dq9XqvyBmlDtCaE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558314201493717.3551920994972; Sun, 19 May 2019 18:03:21 -0700 (PDT) Received: from localhost ([127.0.0.1]:55721 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSWhs-0002JX-3U for importer@patchew.org; Sun, 19 May 2019 21:03:12 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59536) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSWfd-0000fh-W8 for qemu-devel@nongnu.org; Sun, 19 May 2019 21:00:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hSWfd-0006cQ-0c for qemu-devel@nongnu.org; Sun, 19 May 2019 21:00:53 -0400 Received: from mga04.intel.com ([192.55.52.120]:13790) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hSWfa-0006aZ-Kk; Sun, 19 May 2019 21:00:50 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 May 2019 18:00:48 -0700 Received: from richard.sh.intel.com (HELO localhost) ([10.239.159.54]) by orsmga008.jf.intel.com with ESMTP; 19 May 2019 18:00:46 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: Wei Yang To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Mon, 20 May 2019 08:59:52 +0800 Message-Id: <20190520005957.6953-2-richardw.yang@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190520005957.6953-1-richardw.yang@linux.intel.com> References: <20190520005957.6953-1-richardw.yang@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.120 Subject: [Qemu-devel] [PATCH v5 1/6] q35: acpi: do not create dummy MCFG table X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, thuth@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com, Wei Yang , imammedo@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov Dummy table (with signature "QEMU") creation came from original SeaBIOS codebase. And QEMU would have to keep it around if there were Q35 machine that depended on keeping ACPI tables blob constant size. Luckily there were no versioned Q35 machine types before commit: (since 2.3) a1666142db acpi-build: make ROMs RAM blocks resizeable which obsoleted need to keep ACPI tables blob the same size on source/desti= nation. Considering the 1st versioned machine is pc-q35-2.4, the dummy table is not really necessary and it's safe to drop it without breaking cross version migration in both directions unconditionally. Signed-off-by: Igor Mammedov Signed-off-by: Wei Yang Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/acpi-build.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index b4ec14e349..4fb6184cbc 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2413,7 +2413,6 @@ static void build_mcfg_q35(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) { AcpiTableMcfg *mcfg; - const char *sig; int len =3D sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); =20 mcfg =3D acpi_data_push(table_data, len); @@ -2423,19 +2422,7 @@ build_mcfg_q35(GArray *table_data, BIOSLinker *linke= r, AcpiMcfgInfo *info) mcfg->allocation[0].start_bus_number =3D 0; mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->mcfg_size = - 1); =20 - /* MCFG is used for ECAM which can be enabled or disabled by guest. - * To avoid table size changes (which create migration issues), - * always create the table even if there are no allocations, - * but set the signature to a reserved value in this case. - * ACPI spec requires OSPMs to ignore such tables. - */ - if (info->mcfg_base =3D=3D PCIE_BASE_ADDR_UNMAPPED) { - /* Reserved signature: ignored by OSPM */ - sig =3D "QEMU"; - } else { - sig =3D "MCFG"; - } - build_header(linker, table_data, (void *)mcfg, sig, len, 1, NULL, NULL= ); + build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); } =20 /* @@ -2604,6 +2591,9 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) } mcfg->mcfg_base =3D qnum_get_uint(qobject_to(QNum, o)); qobject_unref(o); + if (mcfg->mcfg_base =3D=3D PCIE_BASE_ADDR_UNMAPPED) { + return false; + } =20 o =3D object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL); assert(o); --=20 2.19.1 From nobody Tue May 14 10:28:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; 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Sun, 19 May 2019 18:03:32 -0700 (PDT) Received: from localhost ([127.0.0.1]:55725 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSWhz-0002Mt-8C for importer@patchew.org; Sun, 19 May 2019 21:03:19 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59548) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSWff-0000if-3U for qemu-devel@nongnu.org; Sun, 19 May 2019 21:00:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hSWfd-0006ci-UD for qemu-devel@nongnu.org; Sun, 19 May 2019 21:00:55 -0400 Received: from mga04.intel.com ([192.55.52.120]:13790) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hSWfb-0006aZ-QQ; Sun, 19 May 2019 21:00:52 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 May 2019 18:00:51 -0700 Received: from richard.sh.intel.com (HELO localhost) ([10.239.159.54]) by orsmga008.jf.intel.com with ESMTP; 19 May 2019 18:00:49 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: Wei Yang To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Mon, 20 May 2019 08:59:53 +0800 Message-Id: <20190520005957.6953-3-richardw.yang@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190520005957.6953-1-richardw.yang@linux.intel.com> References: <20190520005957.6953-1-richardw.yang@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.120 Subject: [Qemu-devel] [PATCH v5 2/6] hw/arm/virt-acpi-build: remove unnecessary variable mcfg_start X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, thuth@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com, Wei Yang , imammedo@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" mcfg_start points to the start of MCFG table and is used in build_header. While this information could be derived from mcfg. This patch removes the unnecessary variable mcfg_start. Signed-off-by: Wei Yang Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/virt-acpi-build.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index bf9c0bc2f4..12dbaf3846 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -552,7 +552,6 @@ build_mcfg(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) const MemMapEntry *memmap =3D vms->memmap; int ecam_id =3D VIRT_ECAM_ID(vms->highmem_ecam); int len =3D sizeof(*mcfg) + sizeof(mcfg->allocation[0]); - int mcfg_start =3D table_data->len; =20 mcfg =3D acpi_data_push(table_data, len); mcfg->allocation[0].address =3D cpu_to_le64(memmap[ecam_id].base); @@ -563,8 +562,7 @@ build_mcfg(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(memmap[ecam_id].size - 1); =20 - build_header(linker, table_data, (void *)(table_data->data + mcfg_star= t), - "MCFG", table_data->len - mcfg_start, 1, NULL, NULL); + build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); } =20 /* GTDT */ --=20 2.19.1 From nobody Tue May 14 10:28:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1558314372; cv=none; d=zoho.com; s=zohoarc; b=MXsYTr0r0c9So4/8EiT9EaGtfcuKa+JwhX7corc0TQqzGAOd1wPmvKZLKPzX0VffRHtldKugwtzCQB2ZFucLKYNPqzjNXx7E2nT/OVSx4w1GqvSuWfksd23CQD+4M3m9s9nvbOzGTIKRs/3Ywxg5iGIpJoeLUqXHZm0Xq2p0las= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558314372; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=fvhpZwENK2wkF5DZ+CI3Wu1g101T7AeYbxJfc9JqRH0=; b=EfeNinNmrMGXpRCG3mFA2Obmkp9lcC75Ql3ty0ayUGUfk9WG2bMQwUaWas2oUk5vR06RDWxnJwmrBXG6XsAtflM+E2uCyBwbsHBCG121z8Q9aGZFQL9s1fETGLnZPOQoCkwW9XD/1QopNN14e63sWAw769jqiJ+Uh1amJCCQuHE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558314372127250.38243899906104; Sun, 19 May 2019 18:06:12 -0700 (PDT) Received: from localhost ([127.0.0.1]:55790 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSWkg-0004du-3D for importer@patchew.org; Sun, 19 May 2019 21:06:06 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59571) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSWfh-0000tx-PL for qemu-devel@nongnu.org; Sun, 19 May 2019 21:00:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hSWfg-0006eB-Rc for qemu-devel@nongnu.org; Sun, 19 May 2019 21:00:57 -0400 Received: from mga04.intel.com ([192.55.52.120]:13790) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hSWfe-0006aZ-IU; Sun, 19 May 2019 21:00:54 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 May 2019 18:00:54 -0700 Received: from richard.sh.intel.com (HELO localhost) ([10.239.159.54]) by orsmga008.jf.intel.com with ESMTP; 19 May 2019 18:00:51 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: Wei Yang To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Mon, 20 May 2019 08:59:54 +0800 Message-Id: <20190520005957.6953-4-richardw.yang@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190520005957.6953-1-richardw.yang@linux.intel.com> References: <20190520005957.6953-1-richardw.yang@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.120 Subject: [Qemu-devel] [PATCH v5 3/6] i386, acpi: remove mcfg_ prefix in AcpiMcfgInfo members X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, thuth@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com, Wei Yang , imammedo@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" This is obvious the member in AcpiMcfgInfo describe MCFG's property. Remove the mcfg_ prefix. Signed-off-by: Wei Yang Suggested-by: Igor Mammedov Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/acpi-build.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 4fb6184cbc..9c1152c819 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -88,8 +88,8 @@ #define ACPI_BUILD_IOAPIC_ID 0x0 =20 typedef struct AcpiMcfgInfo { - uint64_t mcfg_base; - uint32_t mcfg_size; + uint64_t base; + uint32_t size; } AcpiMcfgInfo; =20 typedef struct AcpiPmInfo { @@ -2416,11 +2416,11 @@ build_mcfg_q35(GArray *table_data, BIOSLinker *link= er, AcpiMcfgInfo *info) int len =3D sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); =20 mcfg =3D acpi_data_push(table_data, len); - mcfg->allocation[0].address =3D cpu_to_le64(info->mcfg_base); + mcfg->allocation[0].address =3D cpu_to_le64(info->base); /* Only a single allocation so no need to play with segments */ mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); mcfg->allocation[0].start_bus_number =3D 0; - mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->mcfg_size = - 1); + mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->size - 1); =20 build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); } @@ -2589,15 +2589,15 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) if (!o) { return false; } - mcfg->mcfg_base =3D qnum_get_uint(qobject_to(QNum, o)); + mcfg->base =3D qnum_get_uint(qobject_to(QNum, o)); qobject_unref(o); - if (mcfg->mcfg_base =3D=3D PCIE_BASE_ADDR_UNMAPPED) { + if (mcfg->base =3D=3D PCIE_BASE_ADDR_UNMAPPED) { return false; } =20 o =3D object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL); assert(o); - mcfg->mcfg_size =3D qnum_get_uint(qobject_to(QNum, o)); + mcfg->size =3D qnum_get_uint(qobject_to(QNum, o)); qobject_unref(o); return true; } --=20 2.19.1 From nobody Tue May 14 10:28:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Sun, 19 May 2019 21:00:57 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 May 2019 18:00:56 -0700 Received: from richard.sh.intel.com (HELO localhost) ([10.239.159.54]) by orsmga008.jf.intel.com with ESMTP; 19 May 2019 18:00:54 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: Wei Yang To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Mon, 20 May 2019 08:59:55 +0800 Message-Id: <20190520005957.6953-5-richardw.yang@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190520005957.6953-1-richardw.yang@linux.intel.com> References: <20190520005957.6953-1-richardw.yang@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.120 Subject: [Qemu-devel] [PATCH v5 4/6] hw/arm/virt-acpi-build: pass AcpiMcfgInfo to build_mcfg() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, thuth@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com, Wei Yang , imammedo@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" To build MCFG, two information is necessary: * bus number * base address Abstract these two information to AcpiMcfgInfo so that build_mcfg and build_mcfg_q35 will have the same declaration. Signed-off-by: Wei Yang Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Igor Mammedov --- v4: * rebase on latest master v3: * move AcpiMcfgInfo to pci.h v2: * for arm platform, construct a AcpiMcfgInfo directly --- hw/arm/virt-acpi-build.c | 18 +++++++++++------- hw/i386/acpi-build.c | 6 +----- include/hw/acpi/pci.h | 33 +++++++++++++++++++++++++++++++++ 3 files changed, 45 insertions(+), 12 deletions(-) create mode 100644 include/hw/acpi/pci.h diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 12dbaf3846..e7c96d658e 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -40,6 +40,7 @@ #include "hw/loader.h" #include "hw/hw.h" #include "hw/acpi/aml-build.h" +#include "hw/acpi/pci.h" #include "hw/pci/pcie_host.h" #include "hw/pci/pci.h" #include "hw/arm/virt.h" @@ -546,21 +547,18 @@ build_srat(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) } =20 static void -build_mcfg(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) +build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) { AcpiTableMcfg *mcfg; - const MemMapEntry *memmap =3D vms->memmap; - int ecam_id =3D VIRT_ECAM_ID(vms->highmem_ecam); int len =3D sizeof(*mcfg) + sizeof(mcfg->allocation[0]); =20 mcfg =3D acpi_data_push(table_data, len); - mcfg->allocation[0].address =3D cpu_to_le64(memmap[ecam_id].base); + mcfg->allocation[0].address =3D cpu_to_le64(info->base); =20 /* Only a single allocation so no need to play with segments */ mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); mcfg->allocation[0].start_bus_number =3D 0; - mcfg->allocation[0].end_bus_number =3D - PCIE_MMCFG_BUS(memmap[ecam_id].size - 1); + mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->size - 1); =20 build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); } @@ -801,7 +799,13 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildT= ables *tables) build_gtdt(tables_blob, tables->linker, vms); =20 acpi_add_table(table_offsets, tables_blob); - build_mcfg(tables_blob, tables->linker, vms); + { + AcpiMcfgInfo mcfg =3D { + .base =3D vms->memmap[VIRT_ECAM_ID(vms->highmem_ecam)].base, + .size =3D vms->memmap[VIRT_ECAM_ID(vms->highmem_ecam)].size, + }; + build_mcfg(tables_blob, tables->linker, &mcfg); + } =20 acpi_add_table(table_offsets, tables_blob); build_spcr(tables_blob, tables->linker, vms); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 9c1152c819..0d78d73894 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -59,6 +59,7 @@ #include "hw/i386/x86-iommu.h" =20 #include "hw/acpi/aml-build.h" +#include "hw/acpi/pci.h" =20 #include "qom/qom-qobject.h" #include "hw/i386/amd_iommu.h" @@ -87,11 +88,6 @@ /* Default IOAPIC ID */ #define ACPI_BUILD_IOAPIC_ID 0x0 =20 -typedef struct AcpiMcfgInfo { - uint64_t base; - uint32_t size; -} AcpiMcfgInfo; - typedef struct AcpiPmInfo { bool s3_disabled; bool s4_disabled; diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h new file mode 100644 index 0000000000..124af7d32a --- /dev/null +++ b/include/hw/acpi/pci.h @@ -0,0 +1,33 @@ +/* + * Support for generating PCI related ACPI tables and passing them to Gues= ts + * + * Copyright (C) 2006 Fabrice Bellard + * Copyright (C) 2008-2010 Kevin O'Connor + * Copyright (C) 2013-2019 Red Hat Inc + * Copyright (C) 2019 Intel Corporation + * + * Author: Wei Yang + * Author: Michael S. Tsirkin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ +#ifndef HW_ACPI_PCI_H +#define HW_ACPI_PCI_H + +typedef struct AcpiMcfgInfo { + uint64_t base; + uint32_t size; +} AcpiMcfgInfo; + +#endif --=20 2.19.1 From nobody Tue May 14 10:28:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1558314420; cv=none; d=zoho.com; s=zohoarc; b=oOEg1ZMtMTaSrgxpHpPdQNyl5owhK1QZGJg1bffh0U6JXj8XDZjwZqtPp3l/uFc3EWEkcaihn/MKw6avjZbxkXZCMqrL7KZsAHkMWA7kTkD/uqRUMGGVpt/+z4EKqvIPouxJxqAjB+NQSz8SnnkY9v1yrw0jizZoL4XGdYWeMQo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558314420; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=svDM8IRE7bdFgp1RJ44UZpAvHGGIx9JnzjRJyVv9/6k=; b=ljMtriZbz8Y5+o4O7ynxMbVGvYUufKlPQ9GWTkXbXOyfyU+ItSUtCitdyIRkJgWfhtQ3nEJB+do+B2hZd3A01aTJIryhSx4NgzYPcFszND9WViQN9a7uW3SdHwMbb3yN6enJfEDjnRBExVdxXd7kon4yUKeDCvvxfYeuiHGTtJY= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1558314420184636.2639343293141; Sun, 19 May 2019 18:07:00 -0700 (PDT) Received: from localhost ([127.0.0.1]:55792 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSWlS-0005Hm-1N for importer@patchew.org; Sun, 19 May 2019 21:06:54 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59656) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSWfp-00019d-V0 for qemu-devel@nongnu.org; Sun, 19 May 2019 21:01:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hSWfo-0006jF-7g for qemu-devel@nongnu.org; Sun, 19 May 2019 21:01:05 -0400 Received: from mga04.intel.com ([192.55.52.120]:13790) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hSWfk-0006aZ-Fw; Sun, 19 May 2019 21:01:00 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 May 2019 18:00:59 -0700 Received: from richard.sh.intel.com (HELO localhost) ([10.239.159.54]) by orsmga008.jf.intel.com with ESMTP; 19 May 2019 18:00:57 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: Wei Yang To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Mon, 20 May 2019 08:59:56 +0800 Message-Id: <20190520005957.6953-6-richardw.yang@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190520005957.6953-1-richardw.yang@linux.intel.com> References: <20190520005957.6953-1-richardw.yang@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.120 Subject: [Qemu-devel] [PATCH v5 5/6] hw/acpi: Consolidate build_mcfg to pci.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, thuth@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com, Wei Yang , imammedo@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Now we have two identical build_mcfg functions. Consolidate them in acpi/pci.c. Signed-off-by: Wei Yang Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Igor Mammedov --- v4: * ACPI_PCI depends on both ACPI and PCI * rebase on latest master, adjust arm Kconfig v3: * adjust changelog based on Igor's suggestion --- default-configs/i386-softmmu.mak | 1 + hw/acpi/Kconfig | 4 +++ hw/acpi/Makefile.objs | 1 + hw/acpi/pci.c | 46 ++++++++++++++++++++++++++++++++ hw/arm/Kconfig | 1 + hw/arm/virt-acpi-build.c | 17 ------------ hw/i386/acpi-build.c | 18 +------------ include/hw/acpi/pci.h | 1 + 8 files changed, 55 insertions(+), 34 deletions(-) create mode 100644 hw/acpi/pci.c diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmm= u.mak index ba3fb3ff50..cd5ea391e8 100644 --- a/default-configs/i386-softmmu.mak +++ b/default-configs/i386-softmmu.mak @@ -25,3 +25,4 @@ CONFIG_ISAPC=3Dy CONFIG_I440FX=3Dy CONFIG_Q35=3Dy +CONFIG_ACPI_PCI=3Dy diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig index eca3beed75..7c59cf900b 100644 --- a/hw/acpi/Kconfig +++ b/hw/acpi/Kconfig @@ -23,6 +23,10 @@ config ACPI_NVDIMM bool depends on ACPI =20 +config ACPI_PCI + bool + depends on ACPI && PCI + config ACPI_VMGENID bool default y diff --git a/hw/acpi/Makefile.objs b/hw/acpi/Makefile.objs index 2d46e3789a..661a9b8c2f 100644 --- a/hw/acpi/Makefile.objs +++ b/hw/acpi/Makefile.objs @@ -11,6 +11,7 @@ common-obj-$(call lnot,$(CONFIG_ACPI_X86)) +=3D acpi-stub= .o common-obj-y +=3D acpi_interface.o common-obj-y +=3D bios-linker-loader.o common-obj-y +=3D aml-build.o +common-obj-$(CONFIG_ACPI_PCI) +=3D pci.o common-obj-$(CONFIG_TPM) +=3D tpm.o =20 common-obj-$(CONFIG_IPMI) +=3D ipmi.o diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c new file mode 100644 index 0000000000..fa0fa30bb9 --- /dev/null +++ b/hw/acpi/pci.c @@ -0,0 +1,46 @@ +/* + * Support for generating PCI related ACPI tables and passing them to Gues= ts + * + * Copyright (C) 2006 Fabrice Bellard + * Copyright (C) 2008-2010 Kevin O'Connor + * Copyright (C) 2013-2019 Red Hat Inc + * Copyright (C) 2019 Intel Corporation + * + * Author: Wei Yang + * Author: Michael S. Tsirkin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#include "qemu/osdep.h" +#include "hw/acpi/aml-build.h" +#include "hw/acpi/pci.h" +#include "hw/pci/pcie_host.h" + +void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) +{ + AcpiTableMcfg *mcfg; + int len =3D sizeof(*mcfg) + sizeof(mcfg->allocation[0]); + + mcfg =3D acpi_data_push(table_data, len); + mcfg->allocation[0].address =3D cpu_to_le64(info->base); + + /* Only a single allocation so no need to play with segments */ + mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); + mcfg->allocation[0].start_bus_number =3D 0; + mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->size - 1); + + build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); +} + diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index af8cffde9c..9aced9d54d 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -19,6 +19,7 @@ config ARM_VIRT select PLATFORM_BUS select SMBIOS select VIRTIO_MMIO + select ACPI_PCI =20 config CHEETAH bool diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index e7c96d658e..4a64f9985c 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -546,23 +546,6 @@ build_srat(GArray *table_data, BIOSLinker *linker, Vir= tMachineState *vms) "SRAT", table_data->len - srat_start, 3, NULL, NULL); } =20 -static void -build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) -{ - AcpiTableMcfg *mcfg; - int len =3D sizeof(*mcfg) + sizeof(mcfg->allocation[0]); - - mcfg =3D acpi_data_push(table_data, len); - mcfg->allocation[0].address =3D cpu_to_le64(info->base); - - /* Only a single allocation so no need to play with segments */ - mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); - mcfg->allocation[0].start_bus_number =3D 0; - mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->size - 1); - - build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); -} - /* GTDT */ static void build_gtdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 0d78d73894..85dc1640bc 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2405,22 +2405,6 @@ build_srat(GArray *table_data, BIOSLinker *linker, M= achineState *machine) table_data->len - srat_start, 1, NULL, NULL); } =20 -static void -build_mcfg_q35(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) -{ - AcpiTableMcfg *mcfg; - int len =3D sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); - - mcfg =3D acpi_data_push(table_data, len); - mcfg->allocation[0].address =3D cpu_to_le64(info->base); - /* Only a single allocation so no need to play with segments */ - mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); - mcfg->allocation[0].start_bus_number =3D 0; - mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->size - 1); - - build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); -} - /* * VT-d spec 8.1 DMA Remapping Reporting Structure * (version Oct. 2014 or later) @@ -2690,7 +2674,7 @@ void acpi_build(AcpiBuildTables *tables, MachineState= *machine) } if (acpi_get_mcfg(&mcfg)) { acpi_add_table(table_offsets, tables_blob); - build_mcfg_q35(tables_blob, tables->linker, &mcfg); + build_mcfg(tables_blob, tables->linker, &mcfg); } if (x86_iommu_get_default()) { IommuType IOMMUType =3D x86_iommu_get_type(); diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h index 124af7d32a..8bbd32cf45 100644 --- a/include/hw/acpi/pci.h +++ b/include/hw/acpi/pci.h @@ -30,4 +30,5 @@ typedef struct AcpiMcfgInfo { uint32_t size; } AcpiMcfgInfo; =20 +void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info= ); #endif --=20 2.19.1 From nobody Tue May 14 10:28:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1558314209; cv=none; d=zoho.com; s=zohoarc; b=CtqOmF/pKSr6uLy8VzfyEtnaDL97vZiyY3FrWXw+w+wBk11VW8i9acfbv8CGmnuWomKG8cYD/4fiCtxA8bObdFPbGQo2payLy1/5XmxEmrmxXE1xJ55/rgtEP4EYXgja8cBSudSqHGRy4frfKIrI2+j4WpPSMirngPqXmRCgtrw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558314209; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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X-Received-From: 192.55.52.120 Subject: [Qemu-devel] [PATCH v5 6/6] acpi: pci: use build_append_foo() API to construct MCFG X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, thuth@redhat.com, mst@redhat.com, shannon.zhaosl@gmail.com, Wei Yang , imammedo@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" build_append_foo() API doesn't need explicit endianness conversions which eliminates a source of errors and it makes build_mcfg() look like declarative definition of MCFG table in ACPI spec, which makes it easy to review. Signed-off-by: Wei Yang Suggested-by: Igor Mammedov Reviewed-by: Igor Mammedov --- v2: * miss the reserved[8] of MCFG in last version, add it back * drop SOBs and make sure bios-tables-test all OK --- hw/acpi/pci.c | 35 +++++++++++++++++++++++------------ include/hw/acpi/acpi-defs.h | 18 ------------------ 2 files changed, 23 insertions(+), 30 deletions(-) diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c index fa0fa30bb9..49df7b7d54 100644 --- a/hw/acpi/pci.c +++ b/hw/acpi/pci.c @@ -30,17 +30,28 @@ =20 void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) { - AcpiTableMcfg *mcfg; - int len =3D sizeof(*mcfg) + sizeof(mcfg->allocation[0]); - - mcfg =3D acpi_data_push(table_data, len); - mcfg->allocation[0].address =3D cpu_to_le64(info->base); - - /* Only a single allocation so no need to play with segments */ - mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); - mcfg->allocation[0].start_bus_number =3D 0; - mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->size - 1); - - build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); + int mcfg_start =3D table_data->len; + + acpi_data_push(table_data, sizeof(AcpiTableHeader)); + + /* + * PCI Firmware Specification, Revision 3.0 + * 4.1.2 MCFG Table Description. + */ + /* Reserved */ + build_append_int_noprefix(table_data, 0, 8); + /* Base address, processor-relative */ + build_append_int_noprefix(table_data, info->base, 8); + /* PCI segment group number */ + build_append_int_noprefix(table_data, 0, 2); + /* Starting PCI Bus number */ + build_append_int_noprefix(table_data, 0, 1); + /* Final PCI Bus number */ + build_append_int_noprefix(table_data, PCIE_MMCFG_BUS(info->size - 1), = 1); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 4); + + build_header(linker, table_data, (void *)(table_data->data + mcfg_star= t), + "MCFG", table_data->len - mcfg_start, 1, NULL, NULL); } =20 diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h index f9aa4bd398..57a3f58b0c 100644 --- a/include/hw/acpi/acpi-defs.h +++ b/include/hw/acpi/acpi-defs.h @@ -449,24 +449,6 @@ struct AcpiSratProcessorGiccAffinity { =20 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity; =20 -/* PCI fw r3.0 MCFG table. */ -/* Subtable */ -struct AcpiMcfgAllocation { - uint64_t address; /* Base address, processor-relative */ - uint16_t pci_segment; /* PCI segment group number */ - uint8_t start_bus_number; /* Starting PCI Bus number */ - uint8_t end_bus_number; /* Final PCI Bus number */ - uint32_t reserved; -} QEMU_PACKED; -typedef struct AcpiMcfgAllocation AcpiMcfgAllocation; - -struct AcpiTableMcfg { - ACPI_TABLE_HEADER_DEF; - uint8_t reserved[8]; - AcpiMcfgAllocation allocation[0]; -} QEMU_PACKED; -typedef struct AcpiTableMcfg AcpiTableMcfg; - /* * TCPA Description Table * --=20 2.19.1