From nobody Sun May 19 12:00:51 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1557279333; cv=none; d=zoho.com; s=zohoarc; b=l/yI16K414xRkOJS7yYtiV8lBZD2F2VhytaRw2v8BbVc87dr+7RAKKgrHpB3dvhzsLkXi/W3kJIdbtVeggA/Aya6RCmlsIuXxb1utauWRFV/btAfhOZJ97mp+SodXl21bpT46v7GhaSZ+GBypXLjq2MrxwZjhFjlYLP2RScrezY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557279333; h=Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:Sender:Subject:To:ARC-Authentication-Results; bh=/tQz7QlkGbeHUo10pIO0FhrVfAT+rILCvMygiODtfvw=; b=HwsWOpH+KrnFTWpgkYsfVisjqyuJusl5wSJeAyKgUjNc9UBn1kSGjLG77gY6szvxIGTyzX78ojz0vNyK5coizeZfg4PTK8+o8Lqy8FS2wTf2LbmotWA0uwzDZgBwimmckkGADsq1o9hom03a29q9ll7BPEgb5z+CbFI9Vo1o//w= ARC-Authentication-Results: i=1; mx.zoho.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557279333473195.21286759313125; Tue, 7 May 2019 18:35:33 -0700 (PDT) Received: from localhost ([127.0.0.1]:57315 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hOBUL-0001X6-Ff for importer@patchew.org; Tue, 07 May 2019 21:35:17 -0400 Received: from eggs.gnu.org ([209.51.188.92]:54295) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hOBTS-0001Ds-L8 for qemu-devel@nongnu.org; Tue, 07 May 2019 21:34:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hOBTR-000431-Hb for qemu-devel@nongnu.org; Tue, 07 May 2019 21:34:22 -0400 Received: from mga02.intel.com ([134.134.136.20]:15351) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hOBTR-0003uS-9m for qemu-devel@nongnu.org; Tue, 07 May 2019 21:34:21 -0400 Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 May 2019 18:34:17 -0700 Received: from tao-optiplex-7060.sh.intel.com ([10.239.13.92]) by orsmga007.jf.intel.com with ESMTP; 07 May 2019 18:34:15 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: Tao Xu To: berrange@redhat.com, eblake@redhat.com, ehabkost@redhat.com Date: Wed, 8 May 2019 09:31:53 +0800 Message-Id: <20190508013153.15412-1-tao3.xu@intel.com> X-Mailer: git-send-email 2.17.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.20 Subject: [Qemu-devel] [PATCH v3] i386: Add some MSR based features on Cascadelake-Server CPU model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tao3.xu@intel.com, xiaoyao.li@intel.com, qemu-devel@nongnu.org, robert.hu@intel.com, pbonzini@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As noted in "c7a88b52f6 i386: Add new model of Cascadelake-Server" Because MSR based feature has been supported by QEMU, we add CPUID_7_0_EDX_ARCH_CAPABILITIES on Cascadelake-Server CPU model, and add IA32_ARCH_CAPABILITIES MSR based features (RDCL_NO, IBRS_ALL and SKIP_L1DFL_VMENTRY). And "014018e19b i386: Make arch_capabilities migratable" has been in QEMU upstream, the CPUID_7_0_EDX_ARCH_CAPABILITIES can be safely added into CPU Model. Signed-off-by: Tao Xu Reviewed-by: Daniel P. Berrang=C3=A9 --- Changes in v3 -> v2: - improve the commit message [Daniel and Eric] Changes in v2: - rebased patch to latest qemu base --- hw/i386/pc.c | 7 ++++++- target/i386/cpu.c | 6 +++++- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index d98b737b8f..27c3d25436 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -115,7 +115,12 @@ struct hpet_fw_config hpet_cfg =3D {.count =3D UINT8_M= AX}; /* Physical Address of PVH entry point read from kernel ELF NOTE */ static size_t pvh_start_addr; =20 -GlobalProperty pc_compat_4_0[] =3D {}; +GlobalProperty pc_compat_4_0[] =3D { + { "Cascadelake-Server" "-" TYPE_X86_CPU, "arch-capabilities", "off" }, + { "Cascadelake-Server" "-" TYPE_X86_CPU, "rdctl-no", "off" }, + { "Cascadelake-Server" "-" TYPE_X86_CPU, "ibrs-all", "off" }, + { "Cascadelake-Server" "-" TYPE_X86_CPU, "skip-l1dfl-vmentry", "off" }, +}; const size_t pc_compat_4_0_len =3D G_N_ELEMENTS(pc_compat_4_0); =20 GlobalProperty pc_compat_3_1[] =3D { diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 722c5514d4..2aa0a8f9ba 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2536,7 +2536,8 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_AVX512VNNI, .features[FEAT_7_0_EDX] =3D - CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, + CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD | + CPUID_7_0_EDX_ARCH_CAPABILITIES, /* Missing: XSAVES (not supported by some Linux versions, * including v4.1 to v4.12). * KVM doesn't yet expose any XSAVES state save component, @@ -2548,6 +2549,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_XSAVE_XGETBV1, .features[FEAT_6_EAX] =3D CPUID_6_EAX_ARAT, + .features[FEAT_ARCH_CAPABILITIES] =3D + MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL | + MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY, .xlevel =3D 0x80000008, .model_id =3D "Intel Xeon Processor (Cascadelake)", }, --=20 2.17.1