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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.14 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=kMoTHcm1UDtivn+Jb4RW2U3g3XSUPQ7nsrsWmhvbMsU=; b=r/qPJ2mvBwOFOMGcxj7xTubhCYTowIS7Devv6RhXTPX1YT3Vb74Tu+VkgJk2dkQnDZ pFqbRPRqGz12pYRXBDJVUIEK7aXaN2ryOFPVQ1Y/BW7TLqq0he+gNzw9YSgnMkhW5pdE mdVv9/p7/84AcILl29/DaXBDdZpn4Tqq5SRtAhVPh7m9wdbs9qoPNKfMcOxOjGftlPjJ 9zG8y6w8pxajuZcFRtwvvmYtLLicCEd1er17TqlqK17KtwJCTGZkNkbTN+SYlmzjsuyI yof1CYjzsO7/g+7jbxCxZm7H/pS8V6XKR3V/w0lh7xORiT42mY6AxRvAZdroBSzCaGBN Ru2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kMoTHcm1UDtivn+Jb4RW2U3g3XSUPQ7nsrsWmhvbMsU=; b=cFG3UZSC+RBc8wH4wQe+Bcgar+lv7uqzEWp0GQ+X3g+OK1MAEPzv3tT7Vyz8tYTk/O sLtuRqrcsSDUpdiSi3WG6ALVTRSO6JZhGjIz7P7eJKF02sOz5Oi5/GJHfyJtZUu9uvdV 1T8wCKfN4MlxZt5dStA9GklRjQ/a5MH7gsgQyHXpNy6ox+Y3BRAWutVH+UivpbcCNSMh G/5hzKE1+v8rHKJo5MQn5dSJTq0ucrTAA4JtSaO90ZHOELEKgVCYk0Z5oZ7OGo+hJb/C pC3CK5TsWzdd29PotaSRWh+ytvS7jPxsRHJUnI25z6sg6UBcq3rZJNm9qsT3Fi4IP1+Y Favg== X-Gm-Message-State: APjAAAXdtro/huRPiQHhWXCHvqD+606lIQopFeb2y5erAvcyz1HIZiqb 2UNCDjw+/yVN3sq7tcHrb0uRIO+61OI= X-Google-Smtp-Source: APXvYqxPSPGb8QV79tsMMrKTDhap2zgY9HfQNhY7u9Mh20/jZZceqrvD7uHD11Niondy7BNBcSuncA== X-Received: by 2002:a1c:5f42:: with SMTP id t63mr19472384wmb.94.1557230415732; Tue, 07 May 2019 05:00:15 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 12:59:57 +0100 Message-Id: <20190507120011.18100-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 Subject: [Qemu-devel] [PULL 01/15] pc: Rearrange pc_system_firmware_init()'s legacy -drive loop X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Markus Armbruster The loop does two things: map legacy -drive to properties, and collect all the backends for use after the loop. The next patch will factor out the former for reuse in hw/arm/virt.c. To make that easier, rearrange the loop so it does the first thing first, and the second thing second. Signed-off-by: Markus Armbruster Reviewed-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20190416091348.26075-2-armbru@redhat.com Signed-off-by: Peter Maydell --- hw/i386/pc_sysfw.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index c6285407748..75925f5d3f7 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -280,21 +280,19 @@ void pc_system_firmware_init(PCMachineState *pcms, =20 /* Map legacy -drive if=3Dpflash to machine properties */ for (i =3D 0; i < ARRAY_SIZE(pcms->flash); i++) { - pflash_blk[i] =3D pflash_cfi01_get_blk(pcms->flash[i]); pflash_drv =3D drive_get(IF_PFLASH, 0, i); - if (!pflash_drv) { - continue; + if (pflash_drv) { + loc_push_none(&loc); + qemu_opts_loc_restore(pflash_drv->opts); + if (pflash_cfi01_get_blk(pcms->flash[i])) { + error_report("clashes with -machine"); + exit(1); + } + qdev_prop_set_drive(DEVICE(pcms->flash[i]), "drive", + blk_by_legacy_dinfo(pflash_drv), &error_fa= tal); + loc_pop(&loc); } - loc_push_none(&loc); - qemu_opts_loc_restore(pflash_drv->opts); - if (pflash_blk[i]) { - error_report("clashes with -machine"); - exit(1); - } - pflash_blk[i] =3D blk_by_legacy_dinfo(pflash_drv); - qdev_prop_set_drive(DEVICE(pcms->flash[i]), - "drive", pflash_blk[i], &error_fatal); - loc_pop(&loc); + pflash_blk[i] =3D pflash_cfi01_get_blk(pcms->flash[i]); } =20 /* Reject gaps */ --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557230775; cv=none; d=zoho.com; s=zohoarc; b=XdSLMTmRDWjjicxgXMC9RTZ+geGJHpwAQ6jJsapqewncBdWyEPVITdWg9MYMTrf/iJHOzfvaV7mKC+EtDQLizcgG9Ivq6wCbfefXGS5Dr2AYYru6xjsY8pd4zN/ql09wVkKQzpWQ+vGamSCkN/yNGLcrRilBd75KDutBZWhrmis= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557230775; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=cukpgcV1j7F/Z6mZritMbWeaif27ugZHIZtYyXsN4A8=; b=Fik2G8ddC/wXxDGKw6ukqu2eZqtEFIVYtV+b2/s/V/BHM5K0u6XShRiFxXrjX+7IaQRz1nVySAy/JjfWgk5KDIo7vgJ1YMqS69xjXhqhmXtLIrVjq6hcapPhHBJV5alFHvEH9/R74jAR+GU2P/drcIJXofDtVtOIcmOOCDQy6So= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557230775154659.6327624438288; Tue, 7 May 2019 05:06:15 -0700 (PDT) Received: from localhost ([127.0.0.1]:45660 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyrL-0002tt-21 for importer@patchew.org; Tue, 07 May 2019 08:06:11 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44746) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNylm-0007Sm-8t for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNylk-0003Vx-Uj for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:26 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:38531) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNylg-0003OI-Vv for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:23 -0400 Received: by mail-wr1-x432.google.com with SMTP id v11so1815858wru.5 for ; Tue, 07 May 2019 05:00:19 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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X-Received-From: 2a00:1450:4864:20::432 Subject: [Qemu-devel] [PULL 02/15] pflash_cfi01: New pflash_cfi01_legacy_drive() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Markus Armbruster Factored out of pc_system_firmware_init() so the next commit can reuse it in hw/arm/virt.c. Signed-off-by: Markus Armbruster Reviewed-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20190416091348.26075-3-armbru@redhat.com Signed-off-by: Peter Maydell --- include/hw/block/flash.h | 1 + hw/block/pflash_cfi01.c | 28 ++++++++++++++++++++++++++++ hw/i386/pc_sysfw.c | 16 ++-------------- 3 files changed, 31 insertions(+), 14 deletions(-) diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index a0f488732af..1acaf7de802 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -24,6 +24,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, int be); BlockBackend *pflash_cfi01_get_blk(PFlashCFI01 *fl); MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); +void pflash_cfi01_legacy_drive(PFlashCFI01 *dev, DriveInfo *dinfo); =20 /* pflash_cfi02.c */ =20 diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 16dfae14b80..333b7362771 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -44,9 +44,12 @@ #include "qapi/error.h" #include "qemu/timer.h" #include "qemu/bitops.h" +#include "qemu/error-report.h" #include "qemu/host-utils.h" #include "qemu/log.h" +#include "qemu/option.h" #include "hw/sysbus.h" +#include "sysemu/blockdev.h" #include "sysemu/sysemu.h" #include "trace.h" =20 @@ -968,6 +971,31 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl) return &fl->mem; } =20 +/* + * Handle -drive if=3Dpflash for machines that use properties. + * If @dinfo is null, do nothing. + * Else if @fl's property "drive" is already set, fatal error. + * Else set it to the BlockBackend with @dinfo. + */ +void pflash_cfi01_legacy_drive(PFlashCFI01 *fl, DriveInfo *dinfo) +{ + Location loc; + + if (!dinfo) { + return; + } + + loc_push_none(&loc); + qemu_opts_loc_restore(dinfo->opts); + if (fl->blk) { + error_report("clashes with -machine"); + exit(1); + } + qdev_prop_set_drive(DEVICE(fl), "drive", + blk_by_legacy_dinfo(dinfo), &error_fatal); + loc_pop(&loc); +} + static void postload_update_cb(void *opaque, int running, RunState state) { PFlashCFI01 *pfl =3D opaque; diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 75925f5d3f7..751fcafa121 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -269,9 +269,7 @@ void pc_system_firmware_init(PCMachineState *pcms, { PCMachineClass *pcmc =3D PC_MACHINE_GET_CLASS(pcms); int i; - DriveInfo *pflash_drv; BlockBackend *pflash_blk[ARRAY_SIZE(pcms->flash)]; - Location loc; =20 if (!pcmc->pci_enabled) { old_pc_system_rom_init(rom_memory, true); @@ -280,18 +278,8 @@ void pc_system_firmware_init(PCMachineState *pcms, =20 /* Map legacy -drive if=3Dpflash to machine properties */ for (i =3D 0; i < ARRAY_SIZE(pcms->flash); i++) { - pflash_drv =3D drive_get(IF_PFLASH, 0, i); - if (pflash_drv) { - loc_push_none(&loc); - qemu_opts_loc_restore(pflash_drv->opts); - if (pflash_cfi01_get_blk(pcms->flash[i])) { - error_report("clashes with -machine"); - exit(1); - } - qdev_prop_set_drive(DEVICE(pcms->flash[i]), "drive", - blk_by_legacy_dinfo(pflash_drv), &error_fa= tal); - loc_pop(&loc); - } + pflash_cfi01_legacy_drive(pcms->flash[i], + drive_get(IF_PFLASH, 0, i)); pflash_blk[i] =3D pflash_cfi01_get_blk(pcms->flash[i]); } =20 --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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X-Received-From: 2a00:1450:4864:20::429 Subject: [Qemu-devel] [PULL 03/15] hw/arm/virt: Support firmware configuration with -blockdev X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Markus Armbruster The ARM virt machines put firmware in flash memory. To configure it, you use -drive if=3Dpflash,unit=3D0,... and optionally -drive if=3Dpflash,unit=3D1,... Why two -drive? This permits setting up one part of the flash memory read-only, and the other part read/write. It also makes upgrading firmware on the host easier. Below the hood, we get two separate flash devices, because we were too lazy to improve our flash device models to support sector protection. The problem at hand is to do the same with -blockdev somehow, as one more step towards deprecating -drive. We recently solved this problem for x86 PC machines, in commit ebc29e1beab. See the commit message for design rationale. This commit solves it for ARM virt basically the same way: new machine properties pflash0, pflash1 forward to the onboard flash devices' properties. Requires creating the onboard devices in the .instance_init() method virt_instance_init(). The existing code to pick up drives defined with -drive if=3Dpflash is replaced by code to desugar into the machine properties. There are a few behavioral differences, though: * The flash devices are always present (x86: only present if configured) * Flash base addresses and sizes are fixed (x86: sizes depend on images, mapped back to back below a fixed address) * -bios configures contents of first pflash (x86: -bios configures ROM contents) * -bios is rejected when first pflash is also configured with -machine pflash0=3D... (x86: bios is silently ignored then) * -machine pflash1=3D... does not require -machine pflash0=3D... (x86: it does). The actual code is a bit simpler than for x86 mostly due to the first two differences. Before the patch, all the action is in create_flash(), called from the machine's .init() method machvirt_init(): main() machine_run_board_init() machvirt_init() create_flash() create_one_flash() for flash[0] create configure includes obeying -drive if=3Dpflash,unit=3D0 realize map fall back to -bios create_one_flash() for flash[1] create configure includes obeying -drive if=3Dpflash,unit=3D1 realize map update FDT To make the machine properties work, we need to move device creation to its .instance_init() method virt_instance_init(). Another complication is machvirt_init()'s computation of @firmware_loaded: it predicts what create_flash() will do. Instead of predicting what create_flash()'s replacement virt_firmware_init() will do, I decided to have virt_firmware_init() return what it did. Requires calling it a bit earlier. Resulting call tree: main() current_machine =3D object_new() ... virt_instance_init() virt_flash_create() virt_flash_create1() for flash[0] create configure: set defaults become child of machine [NEW] add machine prop pflash0 as alias for drive [NE= W] virt_flash_create1() for flash[1] create configure: set defaults become child of machine [NEW] add machine prop pflash1 as alias for drive [NE= W] for all machine props from the command line: machine_set_property() ... property_set_alias() for machine props pflash0, pflash1 ... set_drive() for cfi.pflash01 prop drive this is how -machine pflash0=3D... etc set machine_run_board_init(current_machine); virt_firmware_init() pflash_cfi01_legacy_drive() legacy -drive if=3Dpflash,unit=3D0 and =3D1 [NEW] virt_flash_map() virt_flash_map1() for flash[0] configure: num-blocks realize map virt_flash_map1() for flash[1] configure: num-blocks realize map fall back to -bios virt_flash_fdt() update FDT You have L=C3=A1szl=C3=B3 to thank for making me explain this in detail. Signed-off-by: Markus Armbruster Acked-by: Laszlo Ersek Message-id: 20190416091348.26075-4-armbru@redhat.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/virt.h | 2 + hw/arm/virt.c | 202 +++++++++++++++++++++++++++--------------- 2 files changed, 132 insertions(+), 72 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 507517c603b..424070924ed 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -35,6 +35,7 @@ #include "qemu/notify.h" #include "hw/boards.h" #include "hw/arm/arm.h" +#include "hw/block/flash.h" #include "sysemu/kvm.h" #include "hw/intc/arm_gicv3_common.h" =20 @@ -113,6 +114,7 @@ typedef struct { Notifier machine_done; DeviceState *platform_bus_dev; FWCfgState *fw_cfg; + PFlashCFI01 *flash[2]; bool secure; bool highmem; bool highmem_ecam; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 16ba67f7a76..5331ab71e22 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -30,6 +30,7 @@ =20 #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/option.h" #include "qapi/error.h" #include "hw/sysbus.h" #include "hw/arm/arm.h" @@ -871,25 +872,19 @@ static void create_virtio_devices(const VirtMachineSt= ate *vms, qemu_irq *pic) } } =20 -static void create_one_flash(const char *name, hwaddr flashbase, - hwaddr flashsize, const char *file, - MemoryRegion *sysmem) +#define VIRT_FLASH_SECTOR_SIZE (256 * KiB) + +static PFlashCFI01 *virt_flash_create1(VirtMachineState *vms, + const char *name, + const char *alias_prop_name) { - /* Create and map a single flash device. We use the same - * parameters as the flash devices on the Versatile Express board. + /* + * Create a single flash device. We use the same parameters as + * the flash devices on the Versatile Express board. */ - DriveInfo *dinfo =3D drive_get_next(IF_PFLASH); DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); - SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); - const uint64_t sectorlength =3D 256 * 1024; =20 - if (dinfo) { - qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo), - &error_abort); - } - - qdev_prop_set_uint32(dev, "num-blocks", flashsize / sectorlength); - qdev_prop_set_uint64(dev, "sector-length", sectorlength); + qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 4); qdev_prop_set_uint8(dev, "device-width", 2); qdev_prop_set_bit(dev, "big-endian", false); @@ -898,41 +893,41 @@ static void create_one_flash(const char *name, hwaddr= flashbase, qdev_prop_set_uint16(dev, "id2", 0x00); qdev_prop_set_uint16(dev, "id3", 0x00); qdev_prop_set_string(dev, "name", name); - qdev_init_nofail(dev); - - memory_region_add_subregion(sysmem, flashbase, - sysbus_mmio_get_region(SYS_BUS_DEVICE(dev)= , 0)); - - if (file) { - char *fn; - int image_size; - - if (drive_get(IF_PFLASH, 0, 0)) { - error_report("The contents of the first flash device may be " - "specified with -bios or with -drive if=3Dpflash.= .. " - "but you cannot use both options at once"); - exit(1); - } - fn =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, file); - if (!fn) { - error_report("Could not find ROM image '%s'", file); - exit(1); - } - image_size =3D load_image_mr(fn, sysbus_mmio_get_region(sbd, 0)); - g_free(fn); - if (image_size < 0) { - error_report("Could not load ROM image '%s'", file); - exit(1); - } - } + object_property_add_child(OBJECT(vms), name, OBJECT(dev), + &error_abort); + object_property_add_alias(OBJECT(vms), alias_prop_name, + OBJECT(dev), "drive", &error_abort); + return PFLASH_CFI01(dev); } =20 -static void create_flash(const VirtMachineState *vms, - MemoryRegion *sysmem, - MemoryRegion *secure_sysmem) +static void virt_flash_create(VirtMachineState *vms) { - /* Create two flash devices to fill the VIRT_FLASH space in the memmap. - * Any file passed via -bios goes in the first of these. + vms->flash[0] =3D virt_flash_create1(vms, "virt.flash0", "pflash0"); + vms->flash[1] =3D virt_flash_create1(vms, "virt.flash1", "pflash1"); +} + +static void virt_flash_map1(PFlashCFI01 *flash, + hwaddr base, hwaddr size, + MemoryRegion *sysmem) +{ + DeviceState *dev =3D DEVICE(flash); + + assert(size % VIRT_FLASH_SECTOR_SIZE =3D=3D 0); + assert(size / VIRT_FLASH_SECTOR_SIZE <=3D UINT32_MAX); + qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); + qdev_init_nofail(dev); + + memory_region_add_subregion(sysmem, base, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), + 0)); +} + +static void virt_flash_map(VirtMachineState *vms, + MemoryRegion *sysmem, + MemoryRegion *secure_sysmem) +{ + /* + * Map two flash devices to fill the VIRT_FLASH space in the memmap. * sysmem is the system memory space. secure_sysmem is the secure view * of the system, and the first flash device should be made visible on= ly * there. The second flash device is visible to both secure and nonsec= ure. @@ -941,12 +936,20 @@ static void create_flash(const VirtMachineState *vms, */ hwaddr flashsize =3D vms->memmap[VIRT_FLASH].size / 2; hwaddr flashbase =3D vms->memmap[VIRT_FLASH].base; - char *nodename; =20 - create_one_flash("virt.flash0", flashbase, flashsize, - bios_name, secure_sysmem); - create_one_flash("virt.flash1", flashbase + flashsize, flashsize, - NULL, sysmem); + virt_flash_map1(vms->flash[0], flashbase, flashsize, + secure_sysmem); + virt_flash_map1(vms->flash[1], flashbase + flashsize, flashsize, + sysmem); +} + +static void virt_flash_fdt(VirtMachineState *vms, + MemoryRegion *sysmem, + MemoryRegion *secure_sysmem) +{ + hwaddr flashsize =3D vms->memmap[VIRT_FLASH].size / 2; + hwaddr flashbase =3D vms->memmap[VIRT_FLASH].base; + char *nodename; =20 if (sysmem =3D=3D secure_sysmem) { /* Report both flash devices as a single node in the DT */ @@ -959,7 +962,8 @@ static void create_flash(const VirtMachineState *vms, qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); g_free(nodename); } else { - /* Report the devices as separate nodes so we can mark one as + /* + * Report the devices as separate nodes so we can mark one as * only visible to the secure world. */ nodename =3D g_strdup_printf("/secflash@%" PRIx64, flashbase); @@ -982,6 +986,54 @@ static void create_flash(const VirtMachineState *vms, } } =20 +static bool virt_firmware_init(VirtMachineState *vms, + MemoryRegion *sysmem, + MemoryRegion *secure_sysmem) +{ + int i; + BlockBackend *pflash_blk0; + + /* Map legacy -drive if=3Dpflash to machine properties */ + for (i =3D 0; i < ARRAY_SIZE(vms->flash); i++) { + pflash_cfi01_legacy_drive(vms->flash[i], + drive_get(IF_PFLASH, 0, i)); + } + + virt_flash_map(vms, sysmem, secure_sysmem); + + pflash_blk0 =3D pflash_cfi01_get_blk(vms->flash[0]); + + if (bios_name) { + char *fname; + MemoryRegion *mr; + int image_size; + + if (pflash_blk0) { + error_report("The contents of the first flash device may be " + "specified with -bios or with -drive if=3Dpflash.= .. " + "but you cannot use both options at once"); + exit(1); + } + + /* Fall back to -bios */ + + fname =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); + if (!fname) { + error_report("Could not find ROM image '%s'", bios_name); + exit(1); + } + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(vms->flash[0]), 0); + image_size =3D load_image_mr(fname, mr); + g_free(fname); + if (image_size < 0) { + error_report("Could not load ROM image '%s'", bios_name); + exit(1); + } + } + + return pflash_blk0 || bios_name; +} + static FWCfgState *create_fw_cfg(const VirtMachineState *vms, AddressSpace= *as) { hwaddr base =3D vms->memmap[VIRT_FW_CFG].base; @@ -1421,7 +1473,7 @@ static void machvirt_init(MachineState *machine) MemoryRegion *secure_sysmem =3D NULL; int n, virt_max_cpus; MemoryRegion *ram =3D g_new(MemoryRegion, 1); - bool firmware_loaded =3D bios_name || drive_get(IF_PFLASH, 0, 0); + bool firmware_loaded; bool aarch64 =3D true; =20 /* @@ -1460,6 +1512,27 @@ static void machvirt_init(MachineState *machine) exit(1); } =20 + if (vms->secure) { + if (kvm_enabled()) { + error_report("mach-virt: KVM does not support Security extensi= ons"); + exit(1); + } + + /* + * The Secure view of the world is the same as the NonSecure, + * but with a few extra devices. Create it as a container region + * containing the system memory at low priority; any secure-only + * devices go in at higher priority and take precedence. + */ + secure_sysmem =3D g_new(MemoryRegion, 1); + memory_region_init(secure_sysmem, OBJECT(machine), "secure-memory", + UINT64_MAX); + memory_region_add_subregion_overlap(secure_sysmem, 0, sysmem, -1); + } + + firmware_loaded =3D virt_firmware_init(vms, sysmem, + secure_sysmem ?: sysmem); + /* If we have an EL3 boot ROM then the assumption is that it will * implement PSCI itself, so disable QEMU's internal implementation * so it doesn't get in the way. Instead of starting secondary @@ -1505,23 +1578,6 @@ static void machvirt_init(MachineState *machine) exit(1); } =20 - if (vms->secure) { - if (kvm_enabled()) { - error_report("mach-virt: KVM does not support Security extensi= ons"); - exit(1); - } - - /* The Secure view of the world is the same as the NonSecure, - * but with a few extra devices. Create it as a container region - * containing the system memory at low priority; any secure-only - * devices go in at higher priority and take precedence. - */ - secure_sysmem =3D g_new(MemoryRegion, 1); - memory_region_init(secure_sysmem, OBJECT(machine), "secure-memory", - UINT64_MAX); - memory_region_add_subregion_overlap(secure_sysmem, 0, sysmem, -1); - } - create_fdt(vms); =20 possible_cpus =3D mc->possible_cpu_arch_ids(machine); @@ -1610,7 +1666,7 @@ static void machvirt_init(MachineState *machine) &machine->device_memory->mr); } =20 - create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem); + virt_flash_fdt(vms, sysmem, secure_sysmem); =20 create_gic(vms, pic); =20 @@ -1956,6 +2012,8 @@ static void virt_instance_init(Object *obj) NULL); =20 vms->irqmap =3D a15irqmap; + + virt_flash_create(vms); } =20 static const TypeInfo virt_machine_info =3D { --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557230769; cv=none; d=zoho.com; s=zohoarc; b=Rw8XtXrp1ssR/RAdILpbLY70NgLGhhX8WqTOqb5zqj7U8Jjh+nOXEnys9p5WdY32U1DukoLj+ZVJaBaNFH9mVZz8NRTSQ7482lAzMGh+bOrYNrLSdAwp4qyPH8b9tQV7iQtFajg9oc6q3zsx9Uy95U7U9/gtzG1F12DRGs92VV8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557230769; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=rDd8j3zLrg/PkW3/m3AjSO85H/8lBtQfTCQzKKkNESw=; b=Q2wv2tGj14aOZ1dYwG/Jejdz4TV7bxfP9nup3qGgLJMl1r+8lUUn8b6Z41r18PvvRxZjBTkzSEUoSvqfVysn0E4AShtADQ6K/ip1WtfwYWAZSyngr7BuIQ+ZGT4NikilOITkvIIfS9roghwI+KORlQ1cfTmrWk185o1eCmjpxlw= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557230769795748.6025554686412; Tue, 7 May 2019 05:06:09 -0700 (PDT) Received: from localhost ([127.0.0.1]:45652 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyrF-0002lJ-Nk for importer@patchew.org; Tue, 07 May 2019 08:06:05 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44865) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNylq-0007ab-EF for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNyll-0003XP-7s for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:30 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:45181) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNyll-0003PJ-0o for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:25 -0400 Received: by mail-wr1-x441.google.com with SMTP id s15so21912548wra.12 for ; Tue, 07 May 2019 05:00:21 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.18 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=rDd8j3zLrg/PkW3/m3AjSO85H/8lBtQfTCQzKKkNESw=; b=JgJcs7K697m0+LElRqtx6dBE9S4ixMNTXwpCTaLfGp5WT3ZYVibgc0kWNRD1uwlvRT 4+6RPNSDUO5WG9h3ANXVbLKUKtKp+VjzA6lVXlhNjWrmTKfiyGqjkrPiRvskg4QTec61 dcBxDgEwsk0YMlz0GlWI84LJvnrUX7WLcVNh3kPAb2eYXid7iTpO1fVYHxvlltwLUoi8 MhNQ+Fs3XIJHGwAwBc7uIN8wRKfirNWo3yDAQK1vhQ1ByYmrHvoP8uTizY/DcaxIuHxg GR9G/Hfwh9sO+aIrmy/kX2LI5Pmtck0w5JM+7QuH9uav0IloQF/38MlqM92XYACMLhwx R5bw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rDd8j3zLrg/PkW3/m3AjSO85H/8lBtQfTCQzKKkNESw=; b=Q/5wILZ26GZP3uJN7Auq+ggbZ/l0YcZCC/IdcKneU6cZRyEYo+CBq4eTtvhJb/Pshw v5iB3mkzndh3Ev4aT7/PNp5Kz5hjVyq2JKbu9OWth46nKewh9XzuVxy3DX40WmPcPfXk NYEIfxroQiZ2EcLVf6hragTMbo1EMtnzGi4Q9GVq1CmUt6PK+BGi33H7AXdFL4PBsHt7 TcL7aNlGuUkU8f1CqUPjkWH2OAPHWzmOUzAN2loa0ryMMTmHF2wamB0PdDc9A6XxKRpQ O9/4nHkJez1sFRbBJDkcXHyE60Hf1+6e+ShPbECoQyNw3xh47rKuKSbe7ly810l+O8J5 tDJQ== X-Gm-Message-State: APjAAAWEKKGFRX9NL1I9tLnkRW/06+ApgLyv1Xd4/x8Tadd1187e//GD P+KzryFFiBQb4djLPBqGPVRpP2nYTvg= X-Google-Smtp-Source: APXvYqy3XkZpNZ0z4xM6d6fh5otSu7YFD3G+iEl6zM+vVYhEedXyQakO6DrqibTExkVVmLGEPC/bSw== X-Received: by 2002:adf:afcd:: with SMTP id y13mr6871079wrd.270.1557230420157; Tue, 07 May 2019 05:00:20 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:00 +0100 Message-Id: <20190507120011.18100-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PULL 04/15] hw/arm/raspi: Diagnose requests for too much RAM X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The Raspberry Pi boards have a physical memory map which does not allow for more than 1GB of RAM. Currently if the user tries to ask for more then we fail in a confusing way: $ qemu-system-aarch64 --machine raspi3 -m 8G Unexpected error in visit_type_uintN() at qapi/qapi-visit-core.c:164: qemu-system-aarch64: Parameter 'vcram-base' expects uint32_t Aborted (core dumped) Catch this earlier and diagnose it with a more friendly message: $ qemu-system-aarch64 --machine raspi3 -m 8G qemu-system-aarch64: Requested ram size is too large for this machine: maxi= mum is 1GB Fixes: https://bugs.launchpad.net/qemu/+bug/1794187 Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Wainer dos Santos Moschetta --- hw/arm/raspi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 66899c28dc1..fe2bb511b98 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -12,6 +12,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/units.h" #include "qapi/error.h" #include "qemu-common.h" #include "cpu.h" @@ -175,6 +176,12 @@ static void raspi_init(MachineState *machine, int vers= ion) BusState *bus; DeviceState *carddev; =20 + if (machine->ram_size > 1 * GiB) { + error_report("Requested ram size is too large for this machine: " + "maximum is 1GB"); + exit(1); + } + object_initialize(&s->soc, sizeof(s->soc), version =3D=3D 3 ? TYPE_BCM2837 : TYPE_BCM2836); object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557230913; cv=none; d=zoho.com; s=zohoarc; b=MID5ZqXd+eHGfjAotRPo2v8p0sX+yhYxhSl8l57IUUJwckez62uPfKnliRgAcpewTz9A87eUEY5UEbPGZsdaHoM2ow17TVvS90yA13P0gS6LURNj6zJPsXLLntLqQCRV9QUjC7anYW+w51JmOx6jKpvkj97kjQgwshNkfiDeaSM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557230913; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=3D9o4lpLLG1z7/od2Fd1VLuk47xpnXC+UL6uQauoS3c=; b=KcAAAfIWmlTctzbzQhdnxXDwQ4qu+LCtDKc+ngWZ7xd+oQYeiE963DCV7bOZNLn7Vtbc3PSO0v2KzTpiHfiaNgRPKCa7nhOEJCeeZ61l20sU+vAmpnv+cYcwbQzEhjhPsanaa8HDHlvSCGe/hYkHdp9Az5rTCLlsDGFnQyxz8Lw= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557230913217358.253751318284; Tue, 7 May 2019 05:08:33 -0700 (PDT) Received: from localhost ([127.0.0.1]:45709 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNytR-0004xa-6I for importer@patchew.org; Tue, 07 May 2019 08:08:21 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44785) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyln-0007VU-8X for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNyll-0003Xe-8c for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:27 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:34461) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNylk-0003S9-V0 for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:25 -0400 Received: by mail-wr1-x444.google.com with SMTP id f7so11637022wrq.1 for ; Tue, 07 May 2019 05:00:23 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=3D9o4lpLLG1z7/od2Fd1VLuk47xpnXC+UL6uQauoS3c=; b=nExsMyhPC7V7gwIkdr6kCCZ6ngSXCQXAhu0N2IDDhMQknGxR+cmCiP0vxuS5E8tTyw FDtSJfcR8LGEbb4rEWIuvmGEEs/A9y2ZhlpLwTFMBkNwyZIfNIQw7HrDrpG3cagWGcEf MTTwtUS8Mm7tdeNT9/iSYjBpQqgdK8udamw8fVCFOAsI/ztxmXqwTkqSsFFAwk2+gerZ xhMCh3hVSmkFofyobSIu3rn+zRt2wocXCqRL9N7gZ2NJl+EWeeno/+LvdiwR6EkZCTf2 JL+Yd/ayHYeecTS4+XAyNo5n7Yb1afeKT8N3HpZpB/IJfcxonpR9BN7HH+7lu8uHYZ1E kSMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3D9o4lpLLG1z7/od2Fd1VLuk47xpnXC+UL6uQauoS3c=; b=YAZ7liikzuiWZfpRs3B0aUSliJ1HR1K2Xoj9kv+8ezrIAF0C0MHC6BZH+l8OS4TLYW Jcd1fxlD9SDjywjJnzEY6bLh1+lcH1ZjQlnaH5JBu1Hy2kWgc/xgOa38/KWI5eSr0te+ 4PulOYoGQzoPhtbYcf1ap3elPoTLkRAKxtYRXASWI5FEhaXMtp4R0ytbzru5v69Bcv+m 8IbAaZEc5ftEY7X1BB/rp4Zsp0QvcrcgcjoJxDxRb3KMazxvWI2Y+tgRWgcagn+7ok6D T+ZAt1f8Sf3JzrK1Ggtw2DrhzlanhgTV2Os84OYM9PO5MW+o7D05CG1ZP3KUCAgUjERC KS/g== X-Gm-Message-State: APjAAAXJNs7U0tVh7GNlFS0FMYeFtdSB2kyjnjmAOeTUu7BrptdWTJMb uy83WqInABuTK+0CMhmw++oVHeIOiBI= X-Google-Smtp-Source: APXvYqyISecavTz0cYOlXGefqCCdh3dW/YIGtzg+5xgtaoMYePLchwAhWuEsuZ/QpRQzWGz7HQfWmg== X-Received: by 2002:a5d:6a47:: with SMTP id t7mr21325283wrw.307.1557230421933; Tue, 07 May 2019 05:00:21 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:01 +0100 Message-Id: <20190507120011.18100-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PULL 05/15] arm: Allow system registers for KVM guests to be changed by QEMU code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" At the moment the Arm implementations of kvm_arch_{get,put}_registers() don't support having QEMU change the values of system registers (aka coprocessor registers for AArch32). This is because although kvm_arch_get_registers() calls write_list_to_cpustate() to update the CPU state struct fields (so QEMU code can read the values in the usual way), kvm_arch_put_registers() does not call write_cpustate_to_list(), meaning that any changes to the CPU state struct fields will not be passed back to KVM. The rationale for this design is documented in a comment in the AArch32 kvm_arch_put_registers() -- writing the values in the cpregs list into the CPU state struct is "lossy" because the write of a register might not succeed, and so if we blindly copy the CPU state values back again we will incorrectly change register values for the guest. The assumption was that no QEMU code would need to write to the registers. However, when we implemented debug support for KVM guests, we broke that assumption: the code to handle "set the guest up to take a breakpoint exception" does so by updating various guest registers including ESR_EL1. Support this by making kvm_arch_put_registers() synchronize CPU state back into the list. We sync only those registers where the initial write succeeds, which should be sufficient. This commit is the same as commit 823e1b3818f9b10b824ddc which we had to revert in commit 942f99c825fc94c8b1a4, except that the bug which was preventing EDK2 guest firmware running has been fixed: kvm_arm_reset_vcpu() now calls write_list_to_cpustate(). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Tested-by: Eric Auger --- target/arm/cpu.h | 9 ++++++++- target/arm/helper.c | 27 +++++++++++++++++++++++++-- target/arm/kvm.c | 8 ++++++++ target/arm/kvm32.c | 20 ++------------------ target/arm/kvm64.c | 2 ++ target/arm/machine.c | 2 +- 6 files changed, 46 insertions(+), 22 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 22bc6e00ab9..0304ddd9f11 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2610,18 +2610,25 @@ bool write_list_to_cpustate(ARMCPU *cpu); /** * write_cpustate_to_list: * @cpu: ARMCPU + * @kvm_sync: true if this is for syncing back to KVM * * For each register listed in the ARMCPU cpreg_indexes list, write * its value from the ARMCPUState structure into the cpreg_values list. * This is used to copy info from TCG's working data structures into * KVM or for outbound migration. * + * @kvm_sync is true if we are doing this in order to sync the + * register state back to KVM. In this case we will only update + * values in the list if the previous list->cpustate sync actually + * successfully wrote the CPU state. Otherwise we will keep the value + * that is in the list. + * * Returns: true if all register values were read correctly, * false if some register was unknown or could not be read. * Note that we do not stop early on failure -- we will attempt * reading all registers in the list. */ -bool write_cpustate_to_list(ARMCPU *cpu); +bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_sync); =20 #define ARM_CPUID_TI915T 0x54029152 #define ARM_CPUID_TI925T 0x54029252 diff --git a/target/arm/helper.c b/target/arm/helper.c index 81a92ab4911..9b805d0e6bd 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -266,7 +266,7 @@ static bool raw_accessors_invalid(const ARMCPRegInfo *r= i) return true; } =20 -bool write_cpustate_to_list(ARMCPU *cpu) +bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_sync) { /* Write the coprocessor state from cpu->env to the (index,value) list= . */ int i; @@ -275,6 +275,7 @@ bool write_cpustate_to_list(ARMCPU *cpu) for (i =3D 0; i < cpu->cpreg_array_len; i++) { uint32_t regidx =3D kvm_to_cpreg_id(cpu->cpreg_indexes[i]); const ARMCPRegInfo *ri; + uint64_t newval; =20 ri =3D get_arm_cp_reginfo(cpu->cp_regs, regidx); if (!ri) { @@ -284,7 +285,29 @@ bool write_cpustate_to_list(ARMCPU *cpu) if (ri->type & ARM_CP_NO_RAW) { continue; } - cpu->cpreg_values[i] =3D read_raw_cp_reg(&cpu->env, ri); + + newval =3D read_raw_cp_reg(&cpu->env, ri); + if (kvm_sync) { + /* + * Only sync if the previous list->cpustate sync succeeded. + * Rather than tracking the success/failure state for every + * item in the list, we just recheck "does the raw write we mu= st + * have made in write_list_to_cpustate() read back OK" here. + */ + uint64_t oldval =3D cpu->cpreg_values[i]; + + if (oldval =3D=3D newval) { + continue; + } + + write_raw_cp_reg(&cpu->env, ri, oldval); + if (read_raw_cp_reg(&cpu->env, ri) !=3D oldval) { + continue; + } + + write_raw_cp_reg(&cpu->env, ri, newval); + } + cpu->cpreg_values[i] =3D newval; } return ok; } diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 79a79f01905..59956346126 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -497,6 +497,14 @@ void kvm_arm_reset_vcpu(ARMCPU *cpu) fprintf(stderr, "write_kvmstate_to_list failed\n"); abort(); } + /* + * Sync the reset values also into the CPUState. This is necessary + * because the next thing we do will be a kvm_arch_put_registers() + * which will update the list values from the CPUState before copying + * the list values back to KVM. It's OK to ignore failure returns here + * for the same reason we do so in kvm_arch_get_registers(). + */ + write_list_to_cpustate(cpu); } =20 /* diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c index 50327989dcc..327375f6252 100644 --- a/target/arm/kvm32.c +++ b/target/arm/kvm32.c @@ -384,24 +384,8 @@ int kvm_arch_put_registers(CPUState *cs, int level) return ret; } =20 - /* Note that we do not call write_cpustate_to_list() - * here, so we are only writing the tuple list back to - * KVM. This is safe because nothing can change the - * CPUARMState cp15 fields (in particular gdb accesses cannot) - * and so there are no changes to sync. In fact syncing would - * be wrong at this point: for a constant register where TCG and - * KVM disagree about its value, the preceding write_list_to_cpustate() - * would not have had any effect on the CPUARMState value (since the - * register is read-only), and a write_cpustate_to_list() here would - * then try to write the TCG value back into KVM -- this would either - * fail or incorrectly change the value the guest sees. - * - * If we ever want to allow the user to modify cp15 registers via - * the gdb stub, we would need to be more clever here (for instance - * tracking the set of registers kvm_arch_get_registers() successfully - * managed to update the CPUARMState with, and only allowing those - * to be written back up into the kernel). - */ + write_cpustate_to_list(cpu, true); + if (!write_list_to_kvmstate(cpu, level)) { return EINVAL; } diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 089af9c5f02..e3ba1492482 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -838,6 +838,8 @@ int kvm_arch_put_registers(CPUState *cs, int level) return ret; } =20 + write_cpustate_to_list(cpu, true); + if (!write_list_to_kvmstate(cpu, level)) { return EINVAL; } diff --git a/target/arm/machine.c b/target/arm/machine.c index 09567d4fc66..96d032f2a7e 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -646,7 +646,7 @@ static int cpu_pre_save(void *opaque) abort(); } } else { - if (!write_cpustate_to_list(cpu)) { + if (!write_cpustate_to_list(cpu, false)) { /* This should never fail. */ abort(); } --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557231008; cv=none; d=zoho.com; s=zohoarc; b=TnK62QBZlV9E19u+M6eegmwZZWA9Hsq6X4vbVyMszRPqOLDRhTDljL/aDMcZhiUkMJEybuwTWe+QDgzB+wDEYFaoHWVDp3QREkilyVKNTaUGXyn83Rc7lQzDHdz4joY8WsSSOl++uvwMEt5EXYrXDroJNL4iZpi/XM/xPd+HUa0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557231008; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=PrRjWEvXDJOpA+k1xEwYJM/zCv1rnAwRsRuPQ3BARac=; b=b1Wle1E2ETMTl4MuVf34DBeIAZoQT39wBHVfUphR6G/0PdVa+6eEVHZn+cRZtdWJ4ytGBKPkMlqem9aLx6ouRVPMS1k4IO1xiIjAwWtn8Q+IKTx3WDWK/BrVaNwkq0fMPw7MfV1gQE9WtBeuw/Z7ClD607yLpcSStT51+RitDE8= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557231008148833.7584201425722; Tue, 7 May 2019 05:10:08 -0700 (PDT) Received: from localhost ([127.0.0.1]:45727 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyv6-0006Se-6q for importer@patchew.org; Tue, 07 May 2019 08:10:04 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44843) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNylp-0007Yd-7p for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNyll-0003YT-AT for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:29 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:40732) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNyll-0003T3-3H for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:25 -0400 Received: by mail-wm1-x330.google.com with SMTP id h11so19612913wmb.5 for ; Tue, 07 May 2019 05:00:24 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.21 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=PrRjWEvXDJOpA+k1xEwYJM/zCv1rnAwRsRuPQ3BARac=; b=SEFkh4Ts8NUCcvJYgBZUTsIazOT9KxG7PjAHXR2MYYwWINybauAR/I/bEOA3CuqhQi OnM/G786BZbgwmaV+qWvUygG7y+IbwmieOUfNYELOygKYsCy3pZRucXwHCVFMtb6p9zS RBC3JyFNsU8ACbvWM+kpCUyEzkU11bGZzI0iAkTnwXCzYiRfzGKd0rMsKMblc485b7Z+ uzhU+L43WlrdiHeVFey04Z+/1z9wGkPjZY3j3mtjOVkhXxBnglG5rRNgpoqyGai4XfEf BbzUryJcMMqGhtmBBTLPEuZQBQ4b9PRa7WBSwV2LijGv4PT0oedkx5tXyqupA/NTvQIH NBxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PrRjWEvXDJOpA+k1xEwYJM/zCv1rnAwRsRuPQ3BARac=; b=Ujeduspx6vOLzKxuaZH1v4yKyPuAFZT7H3m6uyIO2PZE7VzpeJ8/KALtNesYbjBJ2M nXrNJb8eXtrEBoAfb6acap/NbfXZCb7Fu+wo/vTs2+CK9+mORMatbM2fseEdRacDyzDv +EY0848401LUFPOdYM5WIqWTNTRiMsFIKN7TW890PuLimPDqC+CZog1w+BDb3sFjJ/49 yCJXLvGgXFq7NNrzpKVo5l6OzVMt6O6I0tQMAAuMhs5Ga2HEQb3sO5bqsTPZiDdVHeVB r4x+Hwc01zivSraxiPPYl9clpMhxldRfM7soDcZEzl6N7QdfugpUQ7quK7GRFu78Fres 7JQQ== X-Gm-Message-State: APjAAAV3LpcktfJJyZruXtvT0FCJSmE9r91qdg6ePWKD5I8yb97p6bU7 C7BLyyNYue+syTtZI8kdge5ty2dF958= X-Google-Smtp-Source: APXvYqyENZCl8bjr1qVYft8KjoAvxuuZeCcdSAmR3AQqo1zbSKaXxv9h3vHQ825L++uh83Pu56R/lw== X-Received: by 2002:a1c:cc18:: with SMTP id h24mr20151738wmb.13.1557230423217; Tue, 07 May 2019 05:00:23 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:02 +0100 Message-Id: <20190507120011.18100-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::330 Subject: [Qemu-devel] [PULL 06/15] arm: aspeed: Set SDRAM size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Joel Stanley We currently use Qemu's default of 128MB. As we know how much ram each machine ships with, make it easier on users by setting a default. It can still be overridden with -m on the command line. Signed-off-by: Joel Stanley Reviewed-by: Andrew Jeffery Reviewed-by: Richard Henderson Message-id: 20190503022958.1394-1-joel@jms.id.au Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- include/hw/arm/aspeed.h | 1 + hw/arm/aspeed.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index 325c091d09e..02073a6b4d6 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -22,6 +22,7 @@ typedef struct AspeedBoardConfig { const char *spi_model; uint32_t num_cs; void (*i2c_init)(AspeedBoardState *bmc); + uint32_t ram; } AspeedBoardConfig; =20 #define TYPE_ASPEED_MACHINE MACHINE_TYPE_NAME("aspeed") diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 1c23ebd9925..29d225ed140 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -25,6 +25,7 @@ #include "sysemu/block-backend.h" #include "hw/loader.h" #include "qemu/error-report.h" +#include "qemu/units.h" =20 static struct arm_boot_info aspeed_board_binfo =3D { .board_id =3D -1, /* device-tree-only board */ @@ -331,6 +332,9 @@ static void aspeed_machine_class_init(ObjectClass *oc, = void *data) mc->no_floppy =3D 1; mc->no_cdrom =3D 1; mc->no_parallel =3D 1; + if (board->ram) { + mc->default_ram_size =3D board->ram; + } amc->board =3D board; } =20 @@ -352,6 +356,7 @@ static const AspeedBoardConfig aspeed_boards[] =3D { .spi_model =3D "mx25l25635e", .num_cs =3D 1, .i2c_init =3D palmetto_bmc_i2c_init, + .ram =3D 256 * MiB, }, { .name =3D MACHINE_TYPE_NAME("ast2500-evb"), .desc =3D "Aspeed AST2500 EVB (ARM1176)", @@ -361,6 +366,7 @@ static const AspeedBoardConfig aspeed_boards[] =3D { .spi_model =3D "mx25l25635e", .num_cs =3D 1, .i2c_init =3D ast2500_evb_i2c_init, + .ram =3D 512 * MiB, }, { .name =3D MACHINE_TYPE_NAME("romulus-bmc"), .desc =3D "OpenPOWER Romulus BMC (ARM1176)", @@ -370,6 +376,7 @@ static const AspeedBoardConfig aspeed_boards[] =3D { .spi_model =3D "mx66l1g45g", .num_cs =3D 2, .i2c_init =3D romulus_bmc_i2c_init, + .ram =3D 512 * MiB, }, { .name =3D MACHINE_TYPE_NAME("witherspoon-bmc"), .desc =3D "OpenPOWER Witherspoon BMC (ARM1176)", @@ -379,6 +386,7 @@ static const AspeedBoardConfig aspeed_boards[] =3D { .spi_model =3D "mx66l1g45g", .num_cs =3D 2, .i2c_init =3D witherspoon_bmc_i2c_init, + .ram =3D 512 * MiB, }, }; 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X-Received-From: 2a00:1450:4864:20::32f Subject: [Qemu-devel] [PULL 07/15] QEMU_PACKED: Remove gcc_struct attribute in Windows non x86 targets X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Cao Jiaxi gcc_struct is for x86 only, and it generates an warning on ARM64 Clang/MinG= W targets. Signed-off-by: Cao Jiaxi Reviewed-by: Thomas Huth Message-id: 20190503003618.10089-1-driver1998@foxmail.com [PMM: dropped the slirp change as slirp is now a submodule] Signed-off-by: Peter Maydell --- contrib/libvhost-user/libvhost-user.h | 2 +- include/qemu/compiler.h | 2 +- scripts/cocci-macro-file.h | 7 ++++++- 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/contrib/libvhost-user/libvhost-user.h b/contrib/libvhost-user/= libvhost-user.h index 414ceb0a2f9..78b33306e81 100644 --- a/contrib/libvhost-user/libvhost-user.h +++ b/contrib/libvhost-user/libvhost-user.h @@ -148,7 +148,7 @@ typedef struct VhostUserInflight { uint16_t queue_size; } VhostUserInflight; =20 -#if defined(_WIN32) +#if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__)) # define VU_PACKED __attribute__((gcc_struct, packed)) #else # define VU_PACKED __attribute__((packed)) diff --git a/include/qemu/compiler.h b/include/qemu/compiler.h index 296b2fd5727..09fc44cca45 100644 --- a/include/qemu/compiler.h +++ b/include/qemu/compiler.h @@ -28,7 +28,7 @@ =20 #define QEMU_SENTINEL __attribute__((sentinel)) =20 -#if defined(_WIN32) +#if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__)) # define QEMU_PACKED __attribute__((gcc_struct, packed)) #else # define QEMU_PACKED __attribute__((packed)) diff --git a/scripts/cocci-macro-file.h b/scripts/cocci-macro-file.h index e485cdccae8..c6bbc05ba3e 100644 --- a/scripts/cocci-macro-file.h +++ b/scripts/cocci-macro-file.h @@ -23,7 +23,12 @@ #define QEMU_NORETURN __attribute__ ((__noreturn__)) #define QEMU_WARN_UNUSED_RESULT __attribute__((warn_unused_result)) #define QEMU_SENTINEL __attribute__((sentinel)) -#define QEMU_PACKED __attribute__((gcc_struct, packed)) + +#if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__)) +# define QEMU_PACKED __attribute__((gcc_struct, packed)) +#else +# define QEMU_PACKED __attribute__((packed)) +#endif =20 #define cat(x,y) x ## y #define cat2(x,y) cat(x,y) --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557231114; cv=none; d=zoho.com; s=zohoarc; b=T67o1PIzPij3vTnVq/M/FB7UwzNuyduRh8Qng8rHmTmceZjaBdNaUpS7dsapfanyP4Oq/fZ0ew/7muHcvk5U6T6N0dnQMouhBe10i2xWfKgUMMZKYAOiNMUuwfg5pBLTWegzfJVpaHSWzOIr47EHg8qmunZxk7pz2zAftZIcO40= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557231114; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=X9+rr2bCSDZG/nCniXr98w168+IzhYcZne15QwzLe+E=; b=OBO5LYmNxB5eNK1MlcR21LJGWmNTQaEo4zHpNt3zcow4G0lHXvZJwYbJoHi2EZb9r3IY3fjICa8wN0YGgCm1id9YWjkEmda++jx2HTClthaMrMKP2wlQ5HQ56mxgqy8gS62+KdRcCM4OIA3hC24DE57oXy66fnLUGsQmKx1efXg= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557231114144641.8392554978508; Tue, 7 May 2019 05:11:54 -0700 (PDT) Received: from localhost ([127.0.0.1]:45781 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNywp-0008Fv-6i for importer@patchew.org; Tue, 07 May 2019 08:11:51 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44925) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyls-0007fM-Pv for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNyln-0003hq-DL for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:32 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:39864) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNyln-0003cx-3k for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:27 -0400 Received: by mail-wr1-x432.google.com with SMTP id v10so9675843wrt.6 for ; Tue, 07 May 2019 05:00:27 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.24 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=X9+rr2bCSDZG/nCniXr98w168+IzhYcZne15QwzLe+E=; b=P1TFtT+vueqVZhZXCKNUxnc8miDmySU0De8UEeP5b0fw1nOenYECcV96822hNpHXK1 QW25QBo0695Xp17ywA/Ud5TOz4ER0TnTx/btTItSZt94Zg/mNRtNbeVavkDHHIYUgRau 0neMhiOqyFdc1wJRwpT1G8qDtlvGNb8hWbrqiCHWDlaZYVEm/YQSyUuKkMYz6rl9s2AM Cjif2gaMiBv1nJJbXzYyTYggX1H6IQwcMD29eLLi3dtbDZ8x7wJ+uPIG9PiUqbDLETwg bXibwpkitSOSoKZztwgMI4o+yUQKNGssedPdSiYjgpJsHv4pg522Vd2Q7iGO6clFqm04 O+tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=X9+rr2bCSDZG/nCniXr98w168+IzhYcZne15QwzLe+E=; b=OxNyg56vQ0DtNhN6v5kTNKodRTKcjZ7TNnWch1iZMoxO2OxOG3YTVcV62XxWB39ugD w04PpxCjAJTQQfxTcPyR402qdnk/zHH4skWTwgQHZE82Lm9ivGQtcQFU5wGeFhxQynGl xmWRoZkzanilGY6E+Hd+tJnRFOwnMp50x8t781FiLHzRLm8ME2rkMNCJlQggsufkrMO3 MNJgAyfYBUiAsfOvluEwjE4YNAaSYX64hy+cxp0zD6aoeGdK2Dq32Foq3ygBkD3uNFNs du3d40VN771A4cr7FO6a4nyYI+ptPnnPhRds+5X8y4pmuXy8ZX653SYHnxTeIxgsJMSv gRXA== X-Gm-Message-State: APjAAAVBaU/mpsIOZUSlSCjYDuRi96veSmgsUWRAWoyUPVU2efLUtxEL LI9OQN5J7IKHaD8TD9Pae+33LDKN6pc= X-Google-Smtp-Source: APXvYqxkH1f93KMvq24eW/A7JpWv6O8Qi3FEdLyml9QM4OBIoqLgpxuI5hh9Nd2Z3sY0j/ysBdnd2g== X-Received: by 2002:adf:bc86:: with SMTP id g6mr14397539wrh.60.1557230425949; Tue, 07 May 2019 05:00:25 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:04 +0100 Message-Id: <20190507120011.18100-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 Subject: [Qemu-devel] [PULL 08/15] qga: Fix mingw compilation warnings on enum conversion X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Cao Jiaxi The win2qemu[] is supposed to be the conversion table to convert between STORAGE_BUS_TYPE in Windows SDK and GuestDiskBusType in qga. But it was incorrectly written that it forces to set a GuestDiskBusType value to STORAGE_BUS_TYPE, which generates an enum conversion warning in cl= ang. Suggested-by: Eric Blake Signed-off-by: Cao Jiaxi Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Message-id: 20190503003650.10137-1-driver1998@foxmail.com Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- qga/commands-win32.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qga/commands-win32.c b/qga/commands-win32.c index d40d61f605c..6b67f16faf1 100644 --- a/qga/commands-win32.c +++ b/qga/commands-win32.c @@ -457,7 +457,7 @@ void qmp_guest_file_flush(int64_t handle, Error **errp) =20 #ifdef CONFIG_QGA_NTDDSCSI =20 -static STORAGE_BUS_TYPE win2qemu[] =3D { +static GuestDiskBusType win2qemu[] =3D { [BusTypeUnknown] =3D GUEST_DISK_BUS_TYPE_UNKNOWN, [BusTypeScsi] =3D GUEST_DISK_BUS_TYPE_SCSI, [BusTypeAtapi] =3D GUEST_DISK_BUS_TYPE_IDE, --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557230593; cv=none; d=zoho.com; s=zohoarc; b=J2/tj56sc8I1VDtrxA02F7/9kc1ZbyEW+zLDj2Vfy2nZPn4RXafC3BEINWynDTTmjZWTx3+WPNY1VbXuAdk05cA3nnag0YsCkY8wZq7ree/e/Hvt2TqM/WCOSXEHPkaZrG5s3pTQDXoUJFfPVsuNvAh8c9Vg+8KlOLAwGzPDvzQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557230593; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=QJnsO/e2aUvBsiJ7AzOUR4tR/12UDD/kLgyFI8NTW1o=; b=RNEVSevQBFWkIgZ7lBautKT5+cdwXk1o8zPl8ua3y0MFW3a+FtjfGAjugcYJ2xozNSS6+x9xWdgAq3NWfFq4DfoxJFVTJ/0HqWb9GkvK7wmYCg6UXYRisA8meEiRFGxjj4Oca0UkIX75W0ssD3v//7dcpQelXcI3Yzg6e1qzdhU= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557230593735106.94117770239427; Tue, 7 May 2019 05:03:13 -0700 (PDT) Received: from localhost ([127.0.0.1]:45606 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyoH-0000S9-LQ for importer@patchew.org; Tue, 07 May 2019 08:03:01 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44853) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNylp-0007ZM-Pe for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNylo-0003oE-Ld for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:29 -0400 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:42624) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNylo-0003lD-E7 for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:28 -0400 Received: by mail-wr1-x442.google.com with SMTP id l2so21966180wrb.9 for ; Tue, 07 May 2019 05:00:28 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.26 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=QJnsO/e2aUvBsiJ7AzOUR4tR/12UDD/kLgyFI8NTW1o=; b=BnAEaXTFUWO2yvGLvWI9wI8DHMKde2icoVLoAdD48eNUKUXCWoOyK0Q2WZomDNrDHI ro7dJaY0h+ZP+bC5iTlTTuVpRgV/o7LYuvtrVRSxvioGc3KtNcjd50Nfw6Qugrkx5H40 MIeR22qsjo0PKlix+b9I1DRfo2DkfqGCGx/eKz5sDho4HR96eMhvwXreKcKZr658c143 4XqG4Ajty59yRLHWSzoECECmZbnLobrMz0zdjI9Im98aqWsESmUkiBmnU9WpWFvCtoA4 pHjFMZSd4B5iVkCiWDuAo8vwLlTm/vkD41f2S3WmXU0txVt2G/gnn12HSudlwNujKbES v0Zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QJnsO/e2aUvBsiJ7AzOUR4tR/12UDD/kLgyFI8NTW1o=; b=gSyPFPL6MzSb9Uf5hgO1gYcMoso8MjRq/oftjuPMI2N8jg8BGg4lyGZGCOgiDl6s/m A+aI65LXgFGTZozqQwgM52eGHe3VDv1G5qVmo+NF7TPhG8WNuiFmuL1QjOgyl+p7UfiE 1fF0L87Rf9zvBcNXRE4tS2BiU8dIXbDAuyT4kE5s/DncJcRFQKUuPM8G4gcCkpn3nAjQ SwSigXeXOqlb6l4ZBKMhQubpJqwXkZTzlxuBJ5G9y+/FAE8f6efZsKdRVeMLvfEMoEh/ Mgq7/qhCZe3X17d2Iya99iUfEzocnF0VDo1OydLfWFSLEm0IDmdVHhGbK2VmBwfu6jkj pZMw== X-Gm-Message-State: APjAAAUIr3i3OlyrwP/7ZezNNGt2I75M/vr/i5t2ODZW6XS0vL4bTEpg pFPiBUwwLEy+GOBbbsM5AS2nI/LeDU4= X-Google-Smtp-Source: APXvYqzaMP7ZRENqyaUyR64Q2s0TEIZL3QvogtDfQ25vhbqyWbVny5RSHdB4mDDYCTyfW9L38m7qjA== X-Received: by 2002:a5d:674f:: with SMTP id l15mr21489298wrw.41.1557230427088; Tue, 07 May 2019 05:00:27 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:05 +0100 Message-Id: <20190507120011.18100-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PULL 09/15] util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Cao Jiaxi Windows ARM64 uses LLP64 model, which breaks current assumptions. Signed-off-by: Cao Jiaxi Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Message-id: 20190503003707.10185-1-driver1998@foxmail.com Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- util/cacheinfo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/cacheinfo.c b/util/cacheinfo.c index 3cd080b83d1..eebe1ce9c5d 100644 --- a/util/cacheinfo.c +++ b/util/cacheinfo.c @@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize) static void arch_cache_info(int *isize, int *dsize) { if (*isize =3D=3D 0 || *dsize =3D=3D 0) { - unsigned long ctr; + uint64_t ctr; =20 /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1, but (at least under Linux) these are marked protected by the --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557230770; cv=none; d=zoho.com; s=zohoarc; b=iXnpGmjNcYpZUDZUO5Ny5IgECSP2X/a3sPkkpMWR8KATOC7I3kHEHhvWVvh4s2rGo6ezT7bdHz0bzwWSEEvmLPY4Dx26a7HitBbtVJY9w04oDaB1wvljDs8u5BA0+VpnF1nqJCxuW9LxTEWOTjSMq75cTE9tkJsSK8EoVC2DST4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557230770; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=2H24j/ivxKhpWMoNZRyFm5/WUhhAwlHuP6YRtZPABdg=; b=b6E8avenADKLf90EFJz4/6LAi+sdiwAJfBpjE78e0oIr7YEHkDANA3OJ6XXB+z9W5kD6hxsHKwkhqnQXUkXAYJrnb8QZq/iuwC94WPznNSGSUDozfoMiKJfUcGiCUdKSHl1uc2JlhpKXGwGTImmnEWYSgoBkbjnYJ3xMU3CR090= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557230770537222.73799619264605; Tue, 7 May 2019 05:06:10 -0700 (PDT) Received: from localhost ([127.0.0.1]:45656 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyrH-0002pr-GT for importer@patchew.org; Tue, 07 May 2019 08:06:07 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44907) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNylr-0007dg-Q6 for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNylq-0003t1-KC for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:31 -0400 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]:40737) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNylq-0003s4-DH for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:30 -0400 Received: by mail-wm1-x334.google.com with SMTP id h11so19613378wmb.5 for ; Tue, 07 May 2019 05:00:30 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.27 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=2H24j/ivxKhpWMoNZRyFm5/WUhhAwlHuP6YRtZPABdg=; b=Po9GDH7GhqXavjGPmL2GFhMIfMm1PbDdrfrn7Gy45f11Oogo9As3XZJv0QjnWwU1en /IGIHUimZ7Ge56gXihpEwF1nLkJ2TgOSLAY4+5ecrh/Pcof2IsTq/szfsasGk4LjI5Ny ZiwryR+us5QOzyVJYCecnMXtkLJnpi4ftahrtryGcHzdMBu8CAlQzN326JYLCMIojOq5 gbSYv7KOnda+4MIGRannH6dui/RoS6SnGUH/wqELKYMpigtNiLwztaxGPBaDREDe/AMq ztjWv96teUDajYvjX8lmkXy8KHexyKwyBauo5v3dqlp6/mQW9ECs0XcxSKetYe5yQ9Tu D/sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2H24j/ivxKhpWMoNZRyFm5/WUhhAwlHuP6YRtZPABdg=; b=LMaGxvm/J+MkFoMlXYKcHihYNZD953jBWV8rVzhYta4uAUXFRSBJcP/w1MNDgOKTUM Bwe74spZfBl9XpgwN4cpzh+LVijxyvEyFJki4pqR/leRYS69Z0wUPokdiXKwqdNdLt4D NQPpo/F1l/w07TqJuQ2VG9TcjXwW5lQ6a3QSJgmLMFIW0CQHIPKmbf/owOY1WmDkxGpV kNrI4+r2tLHqDgk7erjAha0WOkOsQACRXpcvC4q9+vJGI+gd1uWcdTQPelFGOSqfYeb9 5FZsq8PZl9O1YpJfbyksciN63CyljhGass7F1KofnOtj7wJbf0JjedGDTFHvuWkbijFH 7lDg== X-Gm-Message-State: APjAAAXjjUfX2DB21TrBfQIfI3Dx3+wP5DhW9t2N6cwGHcvE/JrCLMpl I95VLgLrQV7UoDli28bVgcstXPk7k/E= X-Google-Smtp-Source: APXvYqzLX4z5Yl6q/KCtD+zhluzuPuelQNia2NlxMWy0+f4sgRpZ6raGgTrpW+ZvrRrtPe4MG06UFA== X-Received: by 2002:a1c:ac07:: with SMTP id v7mr19777642wme.49.1557230428551; Tue, 07 May 2019 05:00:28 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:06 +0100 Message-Id: <20190507120011.18100-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::334 Subject: [Qemu-devel] [PULL 10/15] osdep: Fix mingw compilation regarding stdio formats X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Cao Jiaxi I encountered the following compilation error on mingw: /mnt/d/qemu/include/qemu/osdep.h:97:9: error: '__USE_MINGW_ANSI_STDIO' macr= o redefined [-Werror,-Wmacro-redefined] #define __USE_MINGW_ANSI_STDIO 1 ^ /mnt/d/llvm-mingw/aarch64-w64-mingw32/include/_mingw.h:433:9: note: previou= s definition is here #define __USE_MINGW_ANSI_STDIO 0 /* was not defined so it should be 0= */ It turns out that __USE_MINGW_ANSI_STDIO must be set before any system headers are included, not just before stdio.h. Signed-off-by: Cao Jiaxi Reviewed-by: Thomas Huth Reviewed-by: Stefan Weil Message-id: 20190503003719.10233-1-driver1998@foxmail.com Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Peter Maydell --- include/qemu/osdep.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index 303d315c5d4..af2b91f0b87 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -85,17 +85,17 @@ extern int daemon(int, int); #endif #endif =20 +/* enable C99/POSIX format strings (needs mingw32-runtime 3.15 or later) */ +#ifdef __MINGW32__ +#define __USE_MINGW_ANSI_STDIO 1 +#endif + #include #include #include #include #include #include - -/* enable C99/POSIX format strings (needs mingw32-runtime 3.15 or later) */ -#ifdef __MINGW32__ -#define __USE_MINGW_ANSI_STDIO 1 -#endif #include =20 #include --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557230912; cv=none; d=zoho.com; s=zohoarc; b=RUqnLOpO8KSGKxOTkwB9dS+IEsHqZuD3J4N+Am4qyxfBCH8OqpW51zlBMsX1mO6n0QB0TCmcLXEmVc8FmJO2QvKr/8FFqN6JxPNFAb8EShsFcBOi37Fj1UlvEKp2h8E4GvPWKZS86VF4GNhCmQ8UTWxVeD2RQD0vCs7LsiedTEA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557230912; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=4X9sIu0YHhUgKH1JkMRhAu/b2BTcREHijf9rjBQvr1M=; b=GqKXSG406fK8CpvnbXe5pKGo0twhCHhsaLLRCU7ZQciOyvHldXoB9httV/QibMyktQW2jG733h5kfp/VM98LqO7C2F7ccjS08AfHNLHJNL/JB76ChESTSbB6mFJ9vxifc5u0h5612uQ7sjqv+jxIuQ1DjX0gPwpfg+jbwUyqMy0= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557230912118439.25988826071887; Tue, 7 May 2019 05:08:32 -0700 (PDT) Received: from localhost ([127.0.0.1]:45707 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNytM-0004ub-OV for importer@patchew.org; Tue, 07 May 2019 08:08:16 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44920) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyls-0007es-FY for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNylr-0003tY-Ay for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:32 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:50237) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNylr-0003sk-2w for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:31 -0400 Received: by mail-wm1-x335.google.com with SMTP id p21so20096483wmc.0 for ; Tue, 07 May 2019 05:00:31 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.28 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=4X9sIu0YHhUgKH1JkMRhAu/b2BTcREHijf9rjBQvr1M=; b=yHqgs6Gin2rh9sgOlzbNyzAKEozyhGUduxcLnaVx1ixK/fZpHp63Zgi7YYCc4lE/FH M12euWCVPrzIt8W+XWf2NXdaihoCWD+llKBNCknbY6qkFdcqJrtx819qYCbeTN003LSF +w9uInyLEz1Du1NKwQrtdUSV3nLnXQtdn5EqqySjcTYNR3U+XT8AywqYs0Zb2lbZZcUv jljHZQXpZS9rcdUdOB2VyUlwWTyoVxnXo2x4k6M2OEvJSORhSpfIxPV+3G1rwDzz44SN paO5H2/G26Y3DVqnZ+fW89HOEmcPb+2S+N3cKMKazwJ7CPrFoTGAIAg8n4M+GECq0xw6 WXHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4X9sIu0YHhUgKH1JkMRhAu/b2BTcREHijf9rjBQvr1M=; b=Q1lKfTbiPvyMaN07gVqIGkvrDr1CP58aXpTSDco+qm3LWT11Olwz5garr/a1QT4/iD XRJ4p195gt3tf+faY3rDpF6WXsLZFSZxUtPR+JkEKE8E9XH7qmw8t/C8QUwFu+kjnZDf 53WNhgHavL9AIsVScZc41/v1GzjDW+EKvNprVXtH/gOAGoizoppltRUv5PKIz9p5dunk JAg6AjCvEUV/4TTiY+Ewp9JORtHMe5Ilgy2gVme6bIBndol9NAN52wEfTf/HJKNefXVX u+A7TmTv9CZmqqgePS5WfTL8lQU4fB6AhKJh1cCdiJ3kY6NVbnHbUr+PVeN9ADLrmT9+ T4Lw== X-Gm-Message-State: APjAAAWSwArHIWrkx2hAllSp9GkAwFcTuJRvbYYNFXVIra9JXRuQ3CxI ovPSUJS3JEotk+20TbUlHHsVTP1AY2s= X-Google-Smtp-Source: APXvYqwirlip1MywsFoQJkk5J+gaPhAmLOMCw+fC1p6us/PuB8dwFB+I+ZTfP8ccIvjG3gVkpmBa8g== X-Received: by 2002:a1c:5f42:: with SMTP id t63mr19473242wmb.94.1557230429767; Tue, 07 May 2019 05:00:29 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:07 +0100 Message-Id: <20190507120011.18100-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::335 Subject: [Qemu-devel] [PULL 11/15] hw/arm/armv7m_nvic: Check subpriority in nvic_recompute_state_secure() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Rule R_CQRV says that if two pending interrupts have the same group priority then ties are broken by looking at the subpriority. We had a comment describing this but had forgotten to actually implement the subpriority comparison. Correct the omission. (The further tie break rules of "lowest exception number" and "secure before non-secure" are handled implicitly by the order in which we iterate through the exceptions in the loops.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20190430131439.25251-2-peter.maydell@linaro.org --- hw/intc/armv7m_nvic.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index fff6e694e60..131b5938b9a 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -213,6 +213,7 @@ static void nvic_recompute_state_secure(NVICState *s) int active_prio =3D NVIC_NOEXC_PRIO; int pend_irq =3D 0; bool pending_is_s_banked =3D false; + int pend_subprio =3D 0; =20 /* R_CQRV: precedence is by: * - lowest group priority; if both the same then @@ -226,7 +227,7 @@ static void nvic_recompute_state_secure(NVICState *s) for (i =3D 1; i < s->num_irq; i++) { for (bank =3D M_REG_S; bank >=3D M_REG_NS; bank--) { VecInfo *vec; - int prio; + int prio, subprio; bool targets_secure; =20 if (bank =3D=3D M_REG_S) { @@ -241,8 +242,12 @@ static void nvic_recompute_state_secure(NVICState *s) } =20 prio =3D exc_group_prio(s, vec->prio, targets_secure); - if (vec->enabled && vec->pending && prio < pend_prio) { + subprio =3D vec->prio & ~nvic_gprio_mask(s, targets_secure); + if (vec->enabled && vec->pending && + ((prio < pend_prio) || + (prio =3D=3D pend_prio && prio >=3D 0 && subprio < pend_s= ubprio))) { pend_prio =3D prio; + pend_subprio =3D subprio; pend_irq =3D i; pending_is_s_banked =3D (bank =3D=3D M_REG_S); } --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557231232; cv=none; d=zoho.com; s=zohoarc; b=KRw1+RDC75MEvob1ceYTPdSOA2l6Lk3MTzW3bJS1sbCDqMKYH5aLE17RUAmuSfM1k69JbGgIABss4qO9joEXJ29vJYwDU0NTbJ6mkSxjXKul4vsDQKuZ3HVGhx7pJM8FJjDqSstTh0C/4nAZXuO+kAjPo2rnmGOn8L1HCTxZ0OQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557231232; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=z9A+d6NR/272WHXylxaqVz5VB4YHQmOPLGtdfveFKqg=; b=gxN2JrUQSFTsrANANZEp9DzOqZE5DewB6iQEWMshiUTHY09yT7EwhTLGIU0LjqZC+c/AJRPUP6lksDdBHnowOsEk03qeEcr8j9ZNLL3r4mkbUr8xxXZbsLDjj6k9AjL8sEQGqb7OzAz2d6hi5wUZ/XxfHUpuICwPaWiJKlWIl8M= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557231232225347.27173080510534; Tue, 7 May 2019 05:13:52 -0700 (PDT) Received: from localhost ([127.0.0.1]:45801 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyyX-0001Gv-4m for importer@patchew.org; Tue, 07 May 2019 08:13:37 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44980) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNylx-0007iW-FM for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNyls-0003xZ-F0 for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:37 -0400 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]:35279) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNyls-0003uX-74 for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:32 -0400 Received: by mail-wm1-x334.google.com with SMTP id y197so19641470wmd.0 for ; Tue, 07 May 2019 05:00:32 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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X-Received-From: 2a00:1450:4864:20::334 Subject: [Qemu-devel] [PULL 12/15] hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The non-secure versions of the BFAR and BFSR registers are supposed to be RAZ/WI if AICR.BFHFNMINS =3D=3D 0; we were incorrectly allowing NS code to access the real values. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20190430131439.25251-3-peter.maydell@linaro.org --- hw/intc/armv7m_nvic.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 131b5938b9a..15cba63c964 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -1167,6 +1167,10 @@ static uint32_t nvic_readl(NVICState *s, uint32_t of= fset, MemTxAttrs attrs) if (!arm_feature(&cpu->env, ARM_FEATURE_M_MAIN)) { goto bad_offset; } + if (!attrs.secure && + !(s->cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) { + return 0; + } return cpu->env.v7m.bfar; case 0xd3c: /* Aux Fault Status. */ /* TODO: Implement fault status registers. */ @@ -1646,6 +1650,10 @@ static void nvic_writel(NVICState *s, uint32_t offse= t, uint32_t value, if (!arm_feature(&cpu->env, ARM_FEATURE_M_MAIN)) { goto bad_offset; } + if (!attrs.secure && + !(s->cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) { + return; + } cpu->env.v7m.bfar =3D value; return; case 0xd3c: /* Aux Fault Status. */ @@ -2130,11 +2138,18 @@ static MemTxResult nvic_sysreg_read(void *opaque, h= waddr addr, val =3D 0; break; }; - /* The BFSR bits [15:8] are shared between security states - * and we store them in the NS copy + /* + * The BFSR bits [15:8] are shared between security states + * and we store them in the NS copy. They are RAZ/WI for + * NS code if AIRCR.BFHFNMINS is 0. */ val =3D s->cpu->env.v7m.cfsr[attrs.secure]; - val |=3D s->cpu->env.v7m.cfsr[M_REG_NS] & R_V7M_CFSR_BFSR_MASK; + if (!attrs.secure && + !(s->cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) { + val &=3D ~R_V7M_CFSR_BFSR_MASK; + } else { + val |=3D s->cpu->env.v7m.cfsr[M_REG_NS] & R_V7M_CFSR_BFSR_MASK; + } val =3D extract32(val, (offset - 0xd28) * 8, size * 8); break; case 0xfe0 ... 0xfff: /* ID. */ @@ -2249,6 +2264,12 @@ static MemTxResult nvic_sysreg_write(void *opaque, h= waddr addr, */ value <<=3D ((offset - 0xd28) * 8); =20 + if (!attrs.secure && + !(s->cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) { + /* BFSR bits are RAZ/WI for NS if BFHFNMINS is set */ + value &=3D ~R_V7M_CFSR_BFSR_MASK; + } + s->cpu->env.v7m.cfsr[attrs.secure] &=3D ~value; if (attrs.secure) { /* The BFSR bits [15:8] are shared between security states --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557231158; cv=none; d=zoho.com; s=zohoarc; b=VczKG10DQ/U57Sm9c7OGS7IDo9qaIOKG/WyfsXdKRFk/FuxwzrPwacM3EuAAcBKIZDsjfIYDdZVQgBTZq7lMkUmvJHv3ASFh2yiCsU2DycC7x8ibtaP7/WAaOEhBcR9LogLmhKiDqWZDP2SBeXPCWs5E4N5+uubVRxZ+tYYgR5A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557231158; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=0E/GB8BOaQHYgNe4bA1uWRBqwj8g9GMMZpj2tYiWP00=; b=Ylf7ipJ9Txhjgbz6RBreWpStydXsYfjnY/F0qGHeu3261ibeIrnOByMPY1dFStsDwIoVSy7NX2YEYlUxeND93L6i+HWMDYpJG/6GboGI6F4u1+Nv+5+Ye4Swm+j3XHWSIYIaZZpSWeuDbHPzbgUjpsNV0Sh4VfAkeARypITBfrw= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155723115802878.35045430037485; Tue, 7 May 2019 05:12:38 -0700 (PDT) Received: from localhost ([127.0.0.1]:45785 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyxW-0000XH-3B for importer@patchew.org; Tue, 07 May 2019 08:12:34 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44954) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNylu-0007h6-PI for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNylt-0003yK-M5 for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:34 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]:39955) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNylt-0003xq-FW for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:33 -0400 Received: by mail-wr1-x42c.google.com with SMTP id h4so2678719wre.7 for ; Tue, 07 May 2019 05:00:33 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.31 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=0E/GB8BOaQHYgNe4bA1uWRBqwj8g9GMMZpj2tYiWP00=; b=MjrPnYyChAahm6QraFZfhIUd5ppVBxf/lh5+2g5d0kQ/WWFMOhpIiU1k+w1ZgI6XB1 /jUO/ZLW1s1/v4M3kQLKUbKKGZGTRUZ4UE7iNkTFYMhSB7RYCSSL+UIucDG9z+xj7ihA X/XTMfK5biWPc5/EzbBGVF8F3syPwu+6z802dy8OFJ4GaB9SqoMyM3yWKuUerBq7i73f aevbQBoJnpgZ8aRHhfRB4dcbvU7VY3no1bv9QZmoweWQObxobcgYk5o2zfmet52n442W kWcXUfSKlDTUsOnBObz3f/2/ubhxgf4N/m1q7iLMG3lAGQeBv/r5bmFftVqQEFqVuFF3 ERpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0E/GB8BOaQHYgNe4bA1uWRBqwj8g9GMMZpj2tYiWP00=; b=HU/OGY27TfLno5olvuuhiR0KrR3tcHMKPW/zT3EAFFmwOS/cN71lljI3M8Fgz75LCX 191/xG/qu+T5ZnWuZTJSmIkGXBQ/97rcy8XUyo/mbdyPkNg1OX/ebh7TyFXw52ThoOkJ DEDtQqXOM7r52Ez+BOVfqJ/IArs3VUdy5KpSsvMFP4BsqQUN2oQlGZl1QLbsm5bgXAVr J0gJHY1ZjC6hA50wAU69azxyhiVAfn1yJ4L1CAVrQQX6k61aZE9SW6FfYx0oR8AGa0GA 54XzEKx1uMdA8Pu34cbycz9wjrlpJrTHdrQGvZKCRlACPUmow1LR0W29Pq8mjiq6U+Ft cvyw== X-Gm-Message-State: APjAAAXYbbCM0YSkpIecbEraLwZkmDVjv0S0A6IK42S7YMZb49TVbVPj 3cQOAL2mQLeEXlg/yWd2N/D7jZ5UjO8= X-Google-Smtp-Source: APXvYqwJJ6Gjt8sYahUZ+cxxqAU9ZlwyylTWtDMmf2RbB7t0FB3M570SxBHf6QFgV+O9dl11WSktpA== X-Received: by 2002:a5d:5189:: with SMTP id k9mr7478316wrv.90.1557230432200; Tue, 07 May 2019 05:00:32 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:09 +0100 Message-Id: <20190507120011.18100-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c Subject: [Qemu-devel] [PULL 13/15] hw/intc/armv7m_nvic: Don't enable ARMV7M_EXCP_DEBUG from reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The M-profile architecture specifies that the DebugMonitor exception should be initially disabled, not enabled. It should be controlled by the DEMCR register's MON_EN bit, but we don't implement that register yet (like most of the debug architecture for M-profile). Note that BKPT instructions will still work, because they will be escalated to HardFault. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20190430131439.25251-4-peter.maydell@linaro.org --- hw/intc/armv7m_nvic.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 15cba63c964..3a346a682a3 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2491,10 +2491,12 @@ static void armv7m_nvic_reset(DeviceState *dev) * the System Handler Control register */ s->vectors[ARMV7M_EXCP_SVC].enabled =3D 1; - s->vectors[ARMV7M_EXCP_DEBUG].enabled =3D 1; s->vectors[ARMV7M_EXCP_PENDSV].enabled =3D 1; s->vectors[ARMV7M_EXCP_SYSTICK].enabled =3D 1; =20 + /* DebugMonitor is enabled via DEMCR.MON_EN */ + s->vectors[ARMV7M_EXCP_DEBUG].enabled =3D 0; + resetprio =3D arm_feature(&s->cpu->env, ARM_FEATURE_V8) ? -4 : -3; s->vectors[ARMV7M_EXCP_RESET].prio =3D resetprio; s->vectors[ARMV7M_EXCP_NMI].prio =3D -2; --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557230773; cv=none; d=zoho.com; s=zohoarc; b=E/81En4gx6m7Y3UPnvrx2M6/oLEP+sw/lRJVD8YcFzwqYChRhzx0Otabbc7KkjisTOsufwCbZfrErzd2MxVwOdBhalGgvsdiXJxgtdW4cKHS9rsP9y8HzELcEzE2MbXyTiN7xIZsV0J6bxDy8b2mgfMDdpHspKTKnGTOvkwZXHY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557230773; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=upDb/oCermKTFkACDchj8gTFhCiWSrAdwy8aQAIaTNU=; b=k0/i9tvW5EtdoAROc/qjXMQSHE1UkRe/gdgJYauRiBnlNqtSiSM6D9qTsZgH9kUKqIv2oNnnzvCUlTbOdkmcP+Yu0iTYkR6aehHjKCoOIEIzhweDl2GNEy9IXugupZ/jFtk8joJeETDHqyG1Qd+9Vp+zuF799jje/3dYjXPqryI= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557230773254424.4399572461758; Tue, 7 May 2019 05:06:13 -0700 (PDT) Received: from localhost ([127.0.0.1]:45665 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyrM-0002vL-8k for importer@patchew.org; Tue, 07 May 2019 08:06:12 -0400 Received: from eggs.gnu.org ([209.51.188.92]:44996) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNylz-0007kU-TM for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNylu-0003z3-W5 for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:39 -0400 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]:38075) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNylu-0003yX-PX for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:34 -0400 Received: by mail-wm1-x32b.google.com with SMTP id f2so14778563wmj.3 for ; Tue, 07 May 2019 05:00:34 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.32 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=upDb/oCermKTFkACDchj8gTFhCiWSrAdwy8aQAIaTNU=; b=RFkTd4+HINl2p1PF9S8NL/bhp0yu4IAOARxQHwLQoJo+ETIQOl9Tedzq4nYBtAANIq gtVrtuA5KUKaGRX/7NxndzUEeB2/uJtmTJHZk4UQLQN1jsD9KhgBJtjZ6bGLp0z6Y9iH VI0VSHXczFd3LhUGZnwgD+efOc7kFLBv4xf5h1q2a8DFP8+zVgKCZt7swAjcV/y2MA5V /bSD9dfp0jKzrLpJUgGvcGU9blCOKLfB8jFfVznHtIJf4BabvumE5ltnz7kranINr22z yDE5pUqLVL3QbvZGxWsGI+Kq0USikQC59Lo1IyDkTBfPVuTnwcvOTwsKgR1yh2R8xpUV TNRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=upDb/oCermKTFkACDchj8gTFhCiWSrAdwy8aQAIaTNU=; b=gWiHz5eIOhuPwHMD5M6MuA8r4ZLdUevOE8hBTiSIifvGhY3/NKi+xzJY5vHvY+lTOr PgWVkDRrwWsIJILjmi4TxzbMMo3hsn+KKLpOPdqIwf6ErSCDwChriDG5j5o4Vwv90M8V EpUOvdi+3h5H1IpTjVSujAE9oMInTjzNKfKGWmwWZNuXqqrK9YbyXDofzOEvYeVTUz60 ZXRxZuREAS1ecOC2SCJWvUPOI60DNRWSGoZy3nEBontnqUK2Suoz7LK053x+27uOq1JA ygTZHMSJPhv/5aq2FMCpGWjBZYGd+FK2x30OYoG5DgbpL3+PLGaoDjuzViJ5ea0diY/R ZkyQ== X-Gm-Message-State: APjAAAWxClsnF3P5ywPXNtjF3jmebUwKvAIayYGE4s67SlC4Vqbz7FEH w7gEUGWEfMrxYqg4a96rxYMmipo+IT8= X-Google-Smtp-Source: APXvYqx/QgGxv4busUonjI3JJWIO40s35oYBN3cPWmsZio3Zdimsl6VVZ2P+L34vEnMdHIXL2L3ZJw== X-Received: by 2002:a1c:540e:: with SMTP id i14mr8545301wmb.129.1557230433439; Tue, 07 May 2019 05:00:33 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:10 +0100 Message-Id: <20190507120011.18100-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32b Subject: [Qemu-devel] [PULL 14/15] target/arm: Implement XPSR GE bits X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" In the M-profile architecture, if the CPU implements the DSP extension then the XPSR has GE bits, in the same way as the A-profile CPSR. When we added DSP extension support we forgot to add support for reading and writing the GE bits, which are stored in env->GE. We did put in the code to add XPSR_GE to the mask of bits to update in the v7m_msr helper, but forgot it in v7m_mrs. We also must not allow the XPSR we pull off the stack on exception return to set the nonexistent GE bits. Correct these errors: * read and write env->GE in xpsr_read() and xpsr_write() * only set GE bits on exception return if DSP present * read GE bits for MRS if DSP present Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20190430131439.25251-5-peter.maydell@linaro.org --- target/arm/cpu.h | 4 ++++ target/arm/helper.c | 12 ++++++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 0304ddd9f11..733b840a712 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1285,6 +1285,7 @@ static inline uint32_t xpsr_read(CPUARMState *env) | (env->CF << 29) | ((env->VF & 0x80000000) >> 3) | (env->QF << 27) | (env->thumb << 24) | ((env->condexec_bits & 3) << 25) | ((env->condexec_bits & 0xfc) << 8) + | (env->GE << 16) | env->v7m.exception; } =20 @@ -1300,6 +1301,9 @@ static inline void xpsr_write(CPUARMState *env, uint3= 2_t val, uint32_t mask) if (mask & XPSR_Q) { env->QF =3D ((val & XPSR_Q) !=3D 0); } + if (mask & XPSR_GE) { + env->GE =3D (val & XPSR_GE) >> 16; + } if (mask & XPSR_T) { env->thumb =3D ((val & XPSR_T) !=3D 0); } diff --git a/target/arm/helper.c b/target/arm/helper.c index 9b805d0e6bd..b9745a42bab 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8727,7 +8727,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu) { CPUARMState *env =3D &cpu->env; uint32_t excret; - uint32_t xpsr; + uint32_t xpsr, xpsr_mask; bool ufault =3D false; bool sfault =3D false; bool return_to_sp_process; @@ -9179,8 +9179,13 @@ static void do_v7m_exception_exit(ARMCPU *cpu) } *frame_sp_p =3D frameptr; } + + xpsr_mask =3D ~(XPSR_SPREALIGN | XPSR_SFPA); + if (!arm_feature(env, ARM_FEATURE_THUMB_DSP)) { + xpsr_mask &=3D ~XPSR_GE; + } /* This xpsr_write() will invalidate frame_sp_p as it may switch stack= */ - xpsr_write(env, xpsr, ~(XPSR_SPREALIGN | XPSR_SFPA)); + xpsr_write(env, xpsr, xpsr_mask); =20 if (env->v7m.secure) { bool sfpa =3D xpsr & XPSR_SFPA; @@ -12665,6 +12670,9 @@ uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t= reg) } if (!(reg & 4)) { mask |=3D XPSR_NZCV | XPSR_Q; /* APSR */ + if (arm_feature(env, ARM_FEATURE_THUMB_DSP)) { + mask |=3D XPSR_GE; + } } /* EPSR reads as zero */ return xpsr_read(env) & mask; --=20 2.20.1 From nobody Sun May 19 12:26:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1557231267; cv=none; d=zoho.com; s=zohoarc; b=JRQr8Jwg1dSKy27zGLenfWPwFMuxAuAtnEStMkgsdE9vWccXexIZe+TIPI285tEIZXSEBTJ5HQ0uN1mukKLuGtNgwU9l6YW9svgmn/RUin1cl7kQFjE5h5eAzv2qeeVGVRzACVKLYtNvf2/+ryA+aGDUyTVTHCjg1pDhUJPkdM4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557231267; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=NJGpq0OAxWQIci6soRm4qOcyKSMv9zMfLaUKqYHLGrI=; b=b9ZNFAw9VShvlWfYS3l7cZlYAgEexcna7i1nQw0FhRgvEjGYd1JnsZ7L5TWgNChJKAz+x9wDVQdIOo3H7ZTZLUIKgwJ43k9/5DymG2gwMJ/N5btWH9l76cf4VZUYgeagxhlFQBigM08t2M6icC0E4K22adXGzd7Zf3TAcIT4J0A= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557231267209899.4403792731267; Tue, 7 May 2019 05:14:27 -0700 (PDT) Received: from localhost ([127.0.0.1]:45803 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNyzB-0001hi-38 for importer@patchew.org; Tue, 07 May 2019 08:14:17 -0400 Received: from eggs.gnu.org ([209.51.188.92]:45003) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNym0-0007lU-Ts for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNylw-000421-2Q for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:40 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:36306) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hNylv-0003zU-Rk for qemu-devel@nongnu.org; Tue, 07 May 2019 08:00:35 -0400 Received: by mail-wr1-x441.google.com with SMTP id o4so21968493wra.3 for ; Tue, 07 May 2019 05:00:35 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm12348596wmf.9.2019.05.07.05.00.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 05:00:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=NJGpq0OAxWQIci6soRm4qOcyKSMv9zMfLaUKqYHLGrI=; b=Ypd5zaHXyixCR2IeX22+kB9GhGgdLbrfh6rcHXqq+F3VvQUBgbgtj3P9t0BMzXIL4O hkfjU/Pofb4HQ/q9iSwVAYFaubCVLdTtDZGsNdZTU3R9SCVGEQLjYgtmh/EUK1hii2Rn EASGtiiq+pg9l7GkSMHofX2S6q4vO5T6uptvTTBzvE/ez/5t+poKJqu6Gp4EfK/YIjPK 64R7c0idan28rcrhTSMdkF2hu56OChC6hkvKqrWEHVmfVgcThKJ87CzJyvudbsSWcfRk oKQqZaUWoMr0iRIPYdVJPHdxujK/7Q8wnADogHdykKfWsj9DqtPr4uxSM1inReIO3B9/ KC8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NJGpq0OAxWQIci6soRm4qOcyKSMv9zMfLaUKqYHLGrI=; b=CxaYG+HVSrnwvTDvVd0zAclA7P/uBzIE1xoWPxvGuEDcuCngvTr/A1s4LKu2MRkqg1 y+DktePzSww2JPVQD69oKzuXVJXcY9xoDEr0PeFwePI9A9UUN1/CGfjsuXa8GhZWbpZ/ kcGFMzUJDB9HrwhpliIlgKsMp47+02ASILt47SZt4nEE1cwNZPLZWm3y0p34VN4thS2j 3DJj6vF2nVsLm8G0kuKM3vNk6r/N1botYwkT8QOwNKAHQyUKYSsai3rOVM4dK2UTiKHP MJH0YFq9BnxjU65MFgp/GYR33XxDG75rhUWCw92h+p3kgiD8IaxslYdPTUG/D+bDMaeV GjNw== X-Gm-Message-State: APjAAAUXC2Ws0UbZaY/iKaOVOq/RfUS0H+HKmcrI+fqNfjVC8sAfQv8L zrz8OYxx2CHABezgfPF2vF2fm0AREBs= X-Google-Smtp-Source: APXvYqybl6SF3JrzwEkmHIQOuE2l6ycYLBvL+8bELV8Ei78lSrB6ZZugW5Gl94w/lk91P2tOIZyneQ== X-Received: by 2002:a5d:6a47:: with SMTP id t7mr21326158wrw.307.1557230434760; Tue, 07 May 2019 05:00:34 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 May 2019 13:00:11 +0100 Message-Id: <20190507120011.18100-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190507120011.18100-1-peter.maydell@linaro.org> References: <20190507120011.18100-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PULL 15/15] target/arm: Stop using variable length array in dc_zva X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Currently the dc_zva helper function uses a variable length array. In fact we know (as the comment above remarks) that the length of this array is bounded because the architecture limits the block size and QEMU limits the target page size. Use a fixed array size and assert that we don't run off it. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20190503120448.13385-1-peter.maydell@linaro.org --- target/arm/helper.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index b9745a42bab..1e6eb0d0f36 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -1,4 +1,5 @@ #include "qemu/osdep.h" +#include "qemu/units.h" #include "target/arm/idau.h" #include "trace.h" #include "cpu.h" @@ -13130,14 +13131,17 @@ void HELPER(dc_zva)(CPUARMState *env, uint64_t va= ddr_in) * We know that in fact for any v8 CPU the page size is at least 4K * and the block size must be 2K or less, but TARGET_PAGE_SIZE is = only * 1K as an artefact of legacy v5 subpage support being present in= the - * same QEMU executable. + * same QEMU executable. So in practice the hostaddr[] array has + * two entries, given the current setting of TARGET_PAGE_BITS_MIN. */ int maxidx =3D DIV_ROUND_UP(blocklen, TARGET_PAGE_SIZE); - void *hostaddr[maxidx]; + void *hostaddr[DIV_ROUND_UP(2 * KiB, 1 << TARGET_PAGE_BITS_MIN)]; int try, i; unsigned mmu_idx =3D cpu_mmu_index(env, false); TCGMemOpIdx oi =3D make_memop_idx(MO_UB, mmu_idx); =20 + assert(maxidx <=3D ARRAY_SIZE(hostaddr)); + for (try =3D 0; try < 2; try++) { =20 for (i =3D 0; i < maxidx; i++) { --=20 2.20.1