From nobody Mon Feb 9 09:53:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1557095473; cv=none; d=zoho.com; s=zohoarc; b=ALbYQ/D6eKJpHJhP23UrN9ona9n4Y/rx/iuBfb9SwNcJDWgp+ifl4AL6NsigcpmEJajUw4rGIgZ0cJNP6/iaFyTsZdgERELCu3NWLqGC+bakI3+FIzlOmBnntQBow6hmmhF3D9z1SyOgxjmafBxuELa/RSfm70Vd4waC6fHKqrk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557095473; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=sf+zq39torbqnLR9iLS1VDaveQKxBA+ez1e+ohoK8J8=; b=mq84ppY/L50Y/dxDOPHgPwP5TbLbD9X/XgTmI8yTdHqS/hfPKQyYJ7IgHze+4jyDnOXQkZodM2drWv8BUhQEVNxKoGzi96TK7YsWmQSewL4+Oa73WXLpnftsDdaGJ+Yz2wlCgx9uFfb7E9oHHeTb+pTmZUFNtRT5TgjBiXljjDw= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557095473457255.38319261594484; Sun, 5 May 2019 15:31:13 -0700 (PDT) Received: from localhost ([127.0.0.1]:47147 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNPf2-0000so-Gh for importer@patchew.org; Sun, 05 May 2019 18:31:08 -0400 Received: from eggs.gnu.org ([209.51.188.92]:36290) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hNPRI-0004jd-N1 for qemu-devel@nongnu.org; Sun, 05 May 2019 18:16:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hNPRH-0000TL-MI for qemu-devel@nongnu.org; Sun, 05 May 2019 18:16:56 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38972) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hNPRF-0000PQ-8Y; Sun, 05 May 2019 18:16:53 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8CAB230820E4; Sun, 5 May 2019 22:16:52 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-58.brq.redhat.com [10.40.204.58]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9C4605D739; Sun, 5 May 2019 22:16:48 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Stephen Checkoway Date: Mon, 6 May 2019 00:15:43 +0200 Message-Id: <20190505221544.31568-13-philmd@redhat.com> In-Reply-To: <20190505221544.31568-1-philmd@redhat.com> References: <20190505221544.31568-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Sun, 05 May 2019 22:16:52 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 12/13] hw/block/pflash_cfi02: Fix command address comparison X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Kevin Wolf , Thomas Huth , qemu-block@nongnu.org, Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Markus Armbruster , Max Reitz , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Stephen Checkoway Most AMD commands only examine 11 bits of the address. This masks the addresses used in the comparison to 11 bits. The exceptions are word or sector addresses which use offset directly rather than the shifted offset, boff. Signed-off-by: Stephen Checkoway Acked-by: Thomas Huth Message-Id: <20190426162624.55977-4-stephen.checkoway@oberlin.edu> [PMD: Prepend 'hw/' in patch subject] Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi02.c | 8 +++++++- tests/pflash-cfi02-test.c | 12 ++++++++++-- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 59daade2ee6..4c17dbf99f4 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -297,11 +297,13 @@ static void pflash_write(void *opaque, hwaddr offset,= uint64_t value, =20 DPRINTF("%s: offset " TARGET_FMT_plx " %08" PRIx64 " %d\n", __func__, offset, value, width); - boff =3D offset & (pfl->sector_len - 1); + boff =3D offset; if (pfl->width =3D=3D 2) boff =3D boff >> 1; else if (pfl->width =3D=3D 4) boff =3D boff >> 2; + /* Only the least-significant 11 bits are used in most cases. */ + boff &=3D 0x7FF; switch (pfl->wcycle) { case 0: /* Set the device in I/O access mode if required */ @@ -520,6 +522,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Err= or **errp) return; } =20 + /* Only 11 bits are used in the comparison. */ + pfl->unlock_addr0 &=3D 0x7FF; + pfl->unlock_addr1 &=3D 0x7FF; + chip_len =3D pfl->sector_len * pfl->nb_blocs; =20 memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), diff --git a/tests/pflash-cfi02-test.c b/tests/pflash-cfi02-test.c index 3c37465499a..1e5d9124b71 100644 --- a/tests/pflash-cfi02-test.c +++ b/tests/pflash-cfi02-test.c @@ -22,8 +22,8 @@ =20 #define FLASH_WIDTH 2 #define CFI_ADDR (FLASH_WIDTH * 0x55) -#define UNLOCK0_ADDR (FLASH_WIDTH * 0x5555) -#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AAA) +#define UNLOCK0_ADDR (FLASH_WIDTH * 0x555) +#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AA) =20 #define CFI_CMD 0x98 #define UNLOCK0_CMD 0xAA @@ -190,6 +190,14 @@ static void test_flash(const void *opaque) g_assert_cmpint(flash_read(6), =3D=3D, 0xCDEF); g_assert_cmpint(flash_read(8), =3D=3D, 0xFFFF); =20 + /* Test ignored high order bits of address. */ + flash_write(FLASH_WIDTH * 0x5555, UNLOCK0_CMD); + flash_write(FLASH_WIDTH * 0x2AAA, UNLOCK1_CMD); + flash_write(FLASH_WIDTH * 0x5555, AUTOSELECT_CMD); + g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0000), =3D=3D, 0x00BF); + g_assert_cmpint(flash_read(FLASH_WIDTH * 0x0001), =3D=3D, 0x236D); + reset(); + qtest_quit(global_qtest); } =20 --=20 2.20.1