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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e5sm1717671wrh.79.2019.05.03.10.13.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 10:13:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=504IrJ8yDMIMkoZHoJWkBxU9Z2x6HMKnHorlvBhWYEg=; b=xs4YbyAA0S7Vpgwc//ig58nHce57hbQReRpyI9/FzbDosA0WuUQoTvFyWZsNHhMn8g FbxPdZ34Xe0dTY7nQnl9wQKSgTOE1JPC3CO/9m7beJUfndYPjiEvI8enIevrVUmWvTsR epKTMnpVpj4lgkM/eiX5tce26NlN7EbpgFEobvu8PWr3gzQ5LstaX8ajnwnFg0ioUaCC LtuyMzrS/qVren4raks3H9ouE/BrB7dfHE9v/3lUJHit7I3M02F/ci9gf2Q46V4El+EY uodsPdss0PYPridTCY+MQTwBAeIFjvUtrcKisbPQJXY7nG9wplre+gikvsNJH/w0upME jhEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=504IrJ8yDMIMkoZHoJWkBxU9Z2x6HMKnHorlvBhWYEg=; b=WROu47/USgU6A/6FSeQ+8oq+6z11nAIk3wP5XGEwbweyRFjm+dbr7psI0qtz8OREas CCW9Y2PzfT4yBPWfo/NekX4qb9LA/6pixJMGzkoUYsKj7sQAhF4Y9nKpKcHLmT5QUb3m ArozjRCzH8uaq/D/g0taVN82ZzSW/SYfll7pbbmWTpBr61EQtSsyRLS5LaQWLQiDRAD7 kmL1P2TrUo5i7HCfIHPF38qwJYxfE8IzvwKa//PUC8Y1O9ZQbTcd3mDBvJp0/5kF4XEx OMGVF3iTcGMy7tRpkUx0qWijkt11e3QRVrTunIbjn4Y0TcTOtTVF7NUxU/8w4woE2DRN eIpg== X-Gm-Message-State: APjAAAUdbyrGy3U77gjUyKIp0z4scKMgrZlfeI20kav1FTp58vP48lHu sRDz5GNT6w6dCKO0+RhfMdxAyA== X-Google-Smtp-Source: APXvYqy3Oq8flQVVk0BtFCQNOQ70FMT063BEFhOPb0aV5S1K+92FhDHdbx1Dx3fXwTYGitJxaNYe+Q== X-Received: by 2002:adf:83a7:: with SMTP id 36mr7615173wre.310.1556903631199; Fri, 03 May 2019 10:13:51 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Fri, 3 May 2019 18:13:46 +0100 Message-Id: <20190503171347.13747-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190503171347.13747-1-peter.maydell@linaro.org> References: <20190503171347.13747-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PATCH 1/2] hw/arm/boot: Avoid placing the initrd on top of the kernel X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" We currently put the initrd at the smaller of: * 128MB into RAM * halfway into the RAM (with the dtb following it). However for large kernels this might mean that the kernel overlaps the initrd. For some kinds of kernel (self-decompressing 32-bit kernels, and ELF images with a BSS section at the end) we don't know the exact size, but even there we have a minimum size. Put the initrd at least further into RAM than that. For image formats that can give us an exact kernel size, this will mean that we definitely avoid overlaying kernel and initrd. Signed-off-by: Peter Maydell Tested-by: Mark Rutland --- hw/arm/boot.c | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index a830655e1af..7c978fedde4 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -998,20 +998,6 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu, if (info->nb_cpus =3D=3D 0) info->nb_cpus =3D 1; =20 - /* - * We want to put the initrd far enough into RAM that when the - * kernel is uncompressed it will not clobber the initrd. However - * on boards without much RAM we must ensure that we still leave - * enough room for a decent sized initrd, and on boards with large - * amounts of RAM we must avoid the initrd being so far up in RAM - * that it is outside lowmem and inaccessible to the kernel. - * So for boards with less than 256MB of RAM we put the initrd - * halfway into RAM, and for boards with 256MB of RAM or more we put - * the initrd at 128MB. - */ - info->initrd_start =3D info->loader_start + - MIN(info->ram_size / 2, 128 * 1024 * 1024); - /* Assume that raw images are linux kernels, and ELF images are not. = */ kernel_size =3D arm_load_elf(info, &elf_entry, &elf_low_addr, &elf_high_addr, elf_machine, as); @@ -1056,6 +1042,26 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu, exit(1); } info->entry =3D entry; + + /* + * We want to put the initrd far enough into RAM that when the + * kernel is uncompressed it will not clobber the initrd. However + * on boards without much RAM we must ensure that we still leave + * enough room for a decent sized initrd, and on boards with large + * amounts of RAM we must avoid the initrd being so far up in RAM + * that it is outside lowmem and inaccessible to the kernel. + * So for boards with less than 256MB of RAM we put the initrd + * halfway into RAM, and for boards with 256MB of RAM or more we put + * the initrd at 128MB. + * We also refuse to put the initrd somewhere that will definitely + * overlay the kernel we just loaded, though for kernel formats which + * don't tell us their exact size (eg self-decompressing 32-bit kernel= s) + * we might still make a bad choice here. + */ + info->initrd_start =3D info->loader_start + + MAX(MIN(info->ram_size / 2, 128 * 1024 * 1024), kernel_size); + info->initrd_start =3D TARGET_PAGE_ALIGN(info->initrd_start); + if (is_linux) { uint32_t fixupcontext[FIXUP_MAX]; =20 --=20 2.20.1 From nobody Thu May 16 05:13:40 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1556903843; cv=none; d=zoho.com; s=zohoarc; b=GTYrMShUx83aSPQ74/qzT6nvk07teeU2MzqXpPxAztfF0I5KPUfeKw8JQcpvY8YcArMAwqpgPVDkkfioD0h02+ntJLlwPq00zCZ5KeyFkDjlcxNKXvxGFNpB1BQpb1ej7GNkCjS/LsmBy08JtDv0cHdMwCRlJb/1tmOfv0rp3WU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1556903843; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=CbKBa4cG438327f413qupTHJRviSCiHEjt9FaRlZ34A=; b=b5gj0eSn6Q6ZiGYwuF8g8MNKhtgjk3jRvBHJKaB+PRCFZZbTXUTCQ/TfWhoNqJRMd+YV02qgOSxX4WcMe55ZYqpGofNCumBMXiT0aPfV+QHak2AaQDMa5H5AS7EuzfCJsSlngOxqy1NQDvI6i3/DswlNjXg4e+tvSMlMXkdYXIw= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1556903843020316.27703544310384; Fri, 3 May 2019 10:17:23 -0700 (PDT) Received: from localhost ([127.0.0.1]:44945 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hMboF-0001Py-1A for importer@patchew.org; Fri, 03 May 2019 13:17:19 -0400 Received: from eggs.gnu.org ([209.51.188.92]:34148) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hMbkx-0006cs-Bm for qemu-devel@nongnu.org; Fri, 03 May 2019 13:13:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hMbkv-00015A-R9 for qemu-devel@nongnu.org; Fri, 03 May 2019 13:13:55 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:55960) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hMbkv-00014Z-K6 for qemu-devel@nongnu.org; Fri, 03 May 2019 13:13:53 -0400 Received: by mail-wm1-x343.google.com with SMTP id y2so7629180wmi.5 for ; Fri, 03 May 2019 10:13:53 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e5sm1717671wrh.79.2019.05.03.10.13.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 May 2019 10:13:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CbKBa4cG438327f413qupTHJRviSCiHEjt9FaRlZ34A=; b=adGp/arElBmgP9cdgnynjQi4RUkwLIUOgOWhpZ0nbdDlbtyp6xC8A7NR9qB8uA+kvY yC8bDtRL/AEXmgwqmRuPr2s+kHU7KYeQr/DEZO6qtNQBWylXoht2frUHTDJDBZxWpupB ZBRa1wCWtjVUdkq2r13Xd9pVVIrZp6IG0182c25A03CYekEcBvY61Lpx9MznyxQhTdOD 4yEbGFcDiOleAR2ajXctQAlOJk69fqdcjwvkm9GbEJqwuSvzTIgcTpDQcVL5a0ewAnd4 VQmeit6XBXAwDn2FkqSVIt/PBX/T2U7WJVj5hCV6iKNjtfP1dC7qjGaiDZCgeWq5E8cH duWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CbKBa4cG438327f413qupTHJRviSCiHEjt9FaRlZ34A=; b=UAza+6x546q0J+I9+bCkf9tiIIkRSwqvNIXYutFY5Bu27GYb+qt/gj/AXHTzAR+Trg EKNiQOBG6qqZm5XcYjqs+jkGoU9pxOvBOjrZN7lfZIzuWSNr7PrzmFzhHoA9NNUuvNe8 BS1YzJ+VHMjPITjlLUYR4w/uj/hgI2hsZippS+w0mFlo4uOG89181moii6noqQH0aK8R Id90sLx2+HrEEHoFfNQtWemZLfRUV6fdX2zFDr4oNkGiX3BzvQtgw59raqFoS5fKj/Az +13N6V1kTsob1q5+TnhuKrOyayFnTyFoiE10kxFUrJexGtaas/T86wLSLRch2oIY1LMw WDOA== X-Gm-Message-State: APjAAAXEmqiHKpvGYWS/cucnSabrygA58tVWeFI+2jGOFrpypymtl5RC 3W+Ke4f0nAn3fOFC6THLy/IoPw== X-Google-Smtp-Source: APXvYqzjEaLEyEKhDCvpOVEk3Cdi5YARYV1XqqavPPNlNPVn2KzpA7ICCHEic+5Usq4xLc2Ph16dXw== X-Received: by 2002:a7b:c353:: with SMTP id l19mr6743602wmj.12.1556903632582; Fri, 03 May 2019 10:13:52 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Fri, 3 May 2019 18:13:47 +0100 Message-Id: <20190503171347.13747-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190503171347.13747-1-peter.maydell@linaro.org> References: <20190503171347.13747-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH 2/2] hw/arm/boot: Honour image size field in AArch64 Image format kernels X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Since Linux v3.17, the kernel's Image header includes a field image_size, which gives the total size of the kernel including unpopulated data sections such as the BSS). If this is present, then return it from load_aarch64_image() as the true size of the kernel rather than just using the size of the Image file itself. This allows the code which calculates where to put the initrd to avoid putting it in the kernel's BSS area. This means that we should be able to reliably load kernel images which are larger than 128MB without accidentally putting the initrd or dtb in locations that clash with the kernel itself. Fixes: https://bugs.launchpad.net/qemu/+bug/1823998 Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Tested-by: Mark Rutland --- hw/arm/boot.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 7c978fedde4..34bdd151df8 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -910,6 +910,7 @@ static uint64_t load_aarch64_image(const char *filename= , hwaddr mem_base, hwaddr *entry, AddressSpace *as) { hwaddr kernel_load_offset =3D KERNEL64_LOAD_ADDR; + uint64_t kernel_size =3D 0; uint8_t *buffer; int size; =20 @@ -937,7 +938,10 @@ static uint64_t load_aarch64_image(const char *filenam= e, hwaddr mem_base, * is only valid if the image_size is non-zero. */ memcpy(&hdrvals, buffer + ARM64_TEXT_OFFSET_OFFSET, sizeof(hdrvals= )); - if (hdrvals[1] !=3D 0) { + + kernel_size =3D le64_to_cpu(hdrvals[1]); + + if (kernel_size !=3D 0) { kernel_load_offset =3D le64_to_cpu(hdrvals[0]); =20 /* @@ -955,12 +959,21 @@ static uint64_t load_aarch64_image(const char *filena= me, hwaddr mem_base, } } =20 + /* + * Kernels before v3.17 don't populate the image_size field, and + * raw images have no header. For those our best guess at the size + * is the size of the Image file itself. + */ + if (kernel_size =3D=3D 0) { + kernel_size =3D size; + } + *entry =3D mem_base + kernel_load_offset; rom_add_blob_fixed_as(filename, buffer, size, *entry, as); =20 g_free(buffer); =20 - return size; + return kernel_size; } =20 static void arm_setup_direct_kernel_boot(ARMCPU *cpu, --=20 2.20.1