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X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH v9 25/27] kvm: Add API to read/write a CPU MSR value X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, Jon Doron Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Jon Doron --- accel/kvm/kvm-all.c | 39 +++++++++++++++++++++++++++++++++++++++ include/sysemu/kvm.h | 2 ++ 2 files changed, 41 insertions(+) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 524c4ddfbd..35207d910b 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -2444,6 +2444,45 @@ void kvm_remove_all_breakpoints(CPUState *cpu) } #endif /* !KVM_CAP_SET_GUEST_DEBUG */ =20 +int kvm_arch_read_msr(CPUState *cpu, uint32_t index, uint64_t *value) +{ + struct { + struct kvm_msrs info; + struct kvm_msr_entry entries[1]; + } msr_data; + int ret; + + msr_data.info.nmsrs =3D 1; + msr_data.entries[0].index =3D index; + ret =3D kvm_vcpu_ioctl(cpu, KVM_GET_MSRS, &msr_data); + if (ret < 0) { + return ret; + } + + *value =3D msr_data.entries[0].data; + return 0; +} + +int kvm_arch_write_msr(CPUState *cpu, uint32_t index, uint64_t value) +{ + struct { + struct kvm_msrs info; + struct kvm_msr_entry entries[1]; + } msr_data; + int ret; + + msr_data.info.nmsrs =3D 1; + msr_data.entries[0].index =3D index; + msr_data.entries[0].reserved =3D 0; + msr_data.entries[0].data =3D value; + ret =3D kvm_vcpu_ioctl(cpu, KVM_SET_MSRS, &msr_data); + if (ret < 0) { + return ret; + } + + return 0; +} + static int kvm_set_signal_mask(CPUState *cpu, const sigset_t *sigset) { KVMState *s =3D kvm_state; diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index a6d1cd190f..409b1a5444 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -462,6 +462,8 @@ int kvm_vm_check_extension(KVMState *s, unsigned int ex= tension); uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function, uint32_t index, int reg); uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index); +int kvm_arch_read_msr(CPUState *cpu, uint32_t index, uint64_t *value); +int kvm_arch_write_msr(CPUState *cpu, uint32_t index, uint64_t value); =20 =20 void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len); --=20 2.20.1