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[97.113.189.189]) by smtp.gmail.com with ESMTPSA id t127sm9687251pfb.106.2019.04.30.22.05.51 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 30 Apr 2019 22:05:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=jMr4oVpt08WI1vYqrX0gvWFc/UY/0FSsdcwMQYw/C7U=; b=WyzpWnIkM6OoVIcEy9MNoYvfc4GGBMTeDDMHf8BmCxFcNXkJJMjcJNGvBjuWh5oCFT NlUyXMWNcWA9BFwbcS9Ls4wq1ceJk+gU8Cu5PzlaxzPoxsNrSJDVAlVFCPctq7ogusb5 71HXXHUyzGN3geHqn5gr32APhh28mIg+e15QsZWt1fuPm8GOMArjp28+EgjqvVeJ9erJ 40oANmDEWP7u25UzmNo2pu+SqO5zBG8RAifyTtZA9h+CzydmohSo5NKnfdDfr1aMz5PU x/aARQBhFU4C88ZAEZ7cux7CuSXhwL3ILFB2Y0ieFA/waDGA03Ztp3GsP+BQl1fld86d mnhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=jMr4oVpt08WI1vYqrX0gvWFc/UY/0FSsdcwMQYw/C7U=; b=Vh++sISGmZbO4OgsEX+7vj53zWMoDWfIrc+LOc2UBzoG9Ba8OCmoHx3RSOH1vN3zgH c/JIC2JSscHS6qpcx+UdNk1IQbORN3fwZ9EAJqJTn17caod6pBzGbPudNvaIuprgFE1B PGEnzpKFAfZWoaHme82sXv53S5LzEvrvLCZPw2QknbYJbwPX3/qC7rI3gixrYrxqD8np 0gGQbJvbAO2C530Vn24hP3Neru9nHjAtzWap9E992+4ii6RlgI4fbP3Uy1Jd/JRQwsAh dGGwAlBJYV8VlNlvY1Nh1g0fzhaGQqAbSQGdEP08w8/jzXijpXJ3E1YF/C6SSM9aPjwQ Grjg== X-Gm-Message-State: APjAAAU3xoTiCMtzTNcXuMYNY4m/N6slbPJtcaGqSKB63vFOqckQ22dW RZPIpCW7iCfvbkANaHUpv891TcvU5nY= X-Google-Smtp-Source: APXvYqwuTnvnBlACEbatQcqLauDhuC6ge3qZ2tuacJIMb/fD2KP40zbq3ExtDokU4GzriGuxUZUEhg== X-Received: by 2002:a63:6ac1:: with SMTP id f184mr73578421pgc.25.1556687152067; Tue, 30 Apr 2019 22:05:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 30 Apr 2019 22:05:14 -0700 Message-Id: <20190501050536.15580-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190501050536.15580-1-richard.henderson@linaro.org> References: <20190501050536.15580-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 Subject: [Qemu-devel] [PATCH v2 07/29] tcg: Support cross-class moves without instruction support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" PowerPC Altivec does not support direct moves between vector registers and general registers. So when tcg_out_mov fails, we can use the backing memory for the temporary to perform the move. Acked-by: David Hildenbrand Signed-off-by: Richard Henderson --- tcg/tcg.c | 31 ++++++++++++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 8ed7cb8654..68d86361e2 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -3368,7 +3368,20 @@ static void tcg_reg_alloc_mov(TCGContext *s, const T= CGOp *op) ots->indirect_base); } if (!tcg_out_mov(s, otype, ots->reg, ts->reg)) { - abort(); + /* + * Cross register class move not supported. + * Store the source register into the destination slot + * and leave the destination temp as TEMP_VAL_MEM. + */ + assert(!ots->fixed_reg); + if (!ts->mem_allocated) { + temp_allocate_frame(s, ots); + } + tcg_out_st(s, ts->type, ts->reg, + ots->mem_base->reg, ots->mem_offset); + ots->mem_coherent =3D 1; + temp_free_or_dead(s, ots, -1); + return; } } ots->val_type =3D TEMP_VAL_REG; @@ -3470,7 +3483,13 @@ static void tcg_reg_alloc_op(TCGContext *s, const TC= GOp *op) reg =3D tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs, o_preferred_regs, ts->indirect_base); if (!tcg_out_mov(s, ts->type, reg, ts->reg)) { - abort(); + /* + * Cross register class move not supported. Sync the + * temp back to its slot and load from there. + */ + temp_sync(s, ts, i_allocated_regs, 0, 0); + tcg_out_ld(s, ts->type, reg, + ts->mem_base->reg, ts->mem_offset); } } new_args[i] =3D reg; @@ -3631,7 +3650,13 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp = *op) if (ts->reg !=3D reg) { tcg_reg_free(s, reg, allocated_regs); if (!tcg_out_mov(s, ts->type, reg, ts->reg)) { - abort(); + /* + * Cross register class move not supported. Sync = the + * temp back to its slot and load from there. + */ + temp_sync(s, ts, allocated_regs, 0, 0); + tcg_out_ld(s, ts->type, reg, + ts->mem_base->reg, ts->mem_offset); } } } else { --=20 2.17.1