From nobody Tue Dec 16 02:35:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1556650950; cv=none; d=zoho.com; s=zohoarc; b=abRqsIFSZYytsRVbBlbW0HFX8kdahsQj/xL0ebcwcOj1tg9EIvrT2GuvYhk1vnbl2TP5VzP9+dtMwY9hEIZBk0SRZPcYr3qj23etO14S/LPEA8REQwaL6fdJjt5OJzJ4zX+B1ot0z/1mbJRow7Wmjp70IALsjtasCFK8Igqdlfo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1556650950; h=Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:Sender:Subject:To:ARC-Authentication-Results; bh=SKQFm/BF+hH6TW2DSa6kG29DMYcP0C+HjQB6u6svLY4=; b=XvF7LZDwLIvxvoKAE+yc+sErkhSRq8riPL2T4XBG33HJNKz/zj69wB0LLu2bPf8sFtpm0Ra5h1c10FDM2H66K1L+rOQgrs7+CQhncD0miar6hGyyNoHLSAZ8U40yjXaHtpbsFdGH3/mb8Bqvt/TiyH4ChAeesLchfrBaK452dRY= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1556650950860579.1037418739592; Tue, 30 Apr 2019 12:02:30 -0700 (PDT) Received: from localhost ([127.0.0.1]:51911 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hLY1K-0007Cb-Uh for importer@patchew.org; Tue, 30 Apr 2019 15:02:26 -0400 Received: from eggs.gnu.org ([209.51.188.92]:36888) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hLY01-0006UH-Nb for qemu-devel@nongnu.org; Tue, 30 Apr 2019 15:01:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hLY00-0004eQ-Ef for qemu-devel@nongnu.org; Tue, 30 Apr 2019 15:01:05 -0400 Received: from mga02.intel.com ([134.134.136.20]:29737) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hLY00-0004bB-60 for qemu-devel@nongnu.org; Tue, 30 Apr 2019 15:01:04 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Apr 2019 12:01:00 -0700 Received: from pclaidev.sc.intel.com ([143.183.85.146]) by orsmga003.jf.intel.com with ESMTP; 30 Apr 2019 12:00:59 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,414,1549958400"; d="scan'208";a="147079588" From: Paul Lai To: qemu-devel@nongnu.org Date: Tue, 30 Apr 2019 11:59:18 -0700 Message-Id: <20190430185918.14937-1-paul.c.lai@intel.com> X-Mailer: git-send-email 2.17.2 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.20 Subject: [Qemu-devel] [Qemu-devel v2] Introduce SnowRidge CPU model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: wei.w.wang@intel.com, luwei.kang@intel.com, tao3.xu@intel.com, paul.c.lai@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" SnowRidge CPU supports Accelerator Infrastrcture Architecture (MOVDIRI, MOVDIR64B), CLDEMOTE and SPLIT_LOCK_DISABLE. MOVDIRI, MOVDIR64B, and CLDEMOTE are found via CPUID. The availability of SPLIT_LOCK_DISABLE is check via msr access References can be found in either: https://software.intel.com/en-us/articles/intel-sdm https://software.intel.com/en-us/download/intel-architecture-instruction-s= et-extensions-and-future-features-programming-reference Signed-off-by: Paul Lai Tested-by: Tao3 Xu --- target/i386/cpu.c | 68 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d6bb57d210..1c03d9f6b4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2663,6 +2663,74 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .xlevel =3D 0x80000008, .model_id =3D "Intel Xeon Processor (Icelake)", }, + { + .name =3D "SnowRidge", + .level =3D 27, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 134, + .stepping =3D 1, + .features[FEAT_1_EDX] =3D + /* missing: CPUID_PN CPUID_IA64 */ + /* missing: CPUID_DTS, CPUID_HT, CPUID_TM, CPUID_PBE */ + CPUID_FP87 | CPUID_VME | CPUID_DE | CPUID_PSE | + CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | + CPUID_CX8 | CPUID_APIC | CPUID_SEP | + CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | + CPUID_PAT | CPUID_PSE36 | CPUID_CLFLUSH | + CPUID_MMX | + CPUID_FXSR | CPUID_SSE | CPUID_SSE2, + .features[FEAT_1_ECX] =3D + CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_MONITOR | + CPUID_EXT_VMX | + CPUID_EXT_SSSE3 | + CPUID_EXT_CX16 | + CPUID_EXT_SSE41 | + CPUID_EXT_SSE42 | CPUID_EXT_X2APIC | CPUID_EXT_MOVBE | + CPUID_EXT_POPCNT | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_AES | CPUID_EXT_XSAVE= | + CPUID_EXT_RDRAND, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_SYSCALL | + CPUID_EXT2_NX | + CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP | + CPUID_EXT2_LM, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_LAHF_LM | + CPUID_EXT3_3DNOWPREFETCH, + .features[FEAT_7_0_EBX] =3D + CPUID_7_0_EBX_FSGSBASE | + CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_ERMS | + CPUID_7_0_EBX_MPX | /* missing bits 13, 15 */ + CPUID_7_0_EBX_RDSEED | + CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSHOPT | + CPUID_7_0_EBX_CLWB | + CPUID_7_0_EBX_SHA_NI, + .features[FEAT_7_0_ECX] =3D + CPUID_7_0_ECX_UMIP | + /* missing bit 5 */ + CPUID_7_0_ECX_GFNI | + CPUID_7_0_ECX_MOVDIRI | CPUID_7_0_ECX_CLDEMOTE | + CPUID_7_0_ECX_MOVDIR64B, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL | + CPUID_7_0_EDX_ARCH_CAPABILITIES | CPUID_7_0_EDX_SPEC_CTRL_SSBD, + /* + * Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.12). + * KVM doesn't yet expose any XSAVES state save component, + * and the only one defined in Skylake (processor tracing) + * probably will block migration anyway. + */ + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | + CPUID_XSAVE_XGETBV1, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Atom Processor (SnowRidge)", + }, { .name =3D "KnightsMill", .level =3D 0xd, --=20 2.17.2