From nobody Mon Nov 10 09:55:35 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1556079710; cv=none; d=zoho.com; s=zohoarc; b=GoaRFF1ZaDcbjS9b3MJ70u64PV/Tjn1TPh+B74kkX1HWIhZLNIkTcC0MPugCD2XeVlMcQXzHuRJWjzcG5yF3QjAzQW4Zn7g1obXd8ZVqjPrGVVBz8aMcnWNfcJ8GRkmT01RGni3LQ+ui7Pv8/d7IvWKFR4NXyEcmSXb2WgHZw0M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1556079710; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=70gT51jhcfuGUItcFYvWZb3M7ZQTVLxujEm02GyTfCo=; b=QG941xebg8FdEXcP1bGf25ULYNbhpy5o0KeUXJMU6T8dYEwqAdC+Al0nSOb/5VSRnueoU/an+/NTSwUZ0jVPVG2pEZLEf/0yv0bImyg5PxyKzNYSnoe3og4yLftFXn7qQRATWy9PTjWAbQ8CX2FbnqVOo87ywGFSqUHXn4XMYZE= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1556079709479474.38255064750547; Tue, 23 Apr 2019 21:21:49 -0700 (PDT) Received: from localhost ([127.0.0.1]:35434 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hJ9Pl-0007ZJ-Gj for importer@patchew.org; Wed, 24 Apr 2019 00:21:45 -0400 Received: from eggs.gnu.org ([209.51.188.92]:56545) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hJ9OH-0006J5-SN for qemu-devel@nongnu.org; Wed, 24 Apr 2019 00:20:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hJ9OH-0008Kw-0v for qemu-devel@nongnu.org; Wed, 24 Apr 2019 00:20:13 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:58057) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hJ9OG-0007ud-C6; Wed, 24 Apr 2019 00:20:12 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44pnCk0CFQz9s5c; Wed, 24 Apr 2019 14:20:01 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1556079602; bh=RHUPFBMkFYu4hWKdf7/Df7eUjK+AtZJm7HDAbd4EALs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dqmU1hsNsb6SjVgpIxonA0opKNJsMDmyJn7038h7aMhvDecrUo9mhBJJ/+a4UApSZ 4UxSDBSRdB6yaH2bT5FVyVEZ1/t6sspEqrsakOjQAiNyeQWy49XIZDjQNIn2h5p0oE aGnFhtCdh/z4hsMa3B9V6dyyDnuIgN1xS1PDi+Jk= From: David Gibson To: Marcel Apfelbaum , qemu-devel@nongnu.org, "Michael S. Tsirkin" , Alex Williamson , Greg Kurz Date: Wed, 24 Apr 2019 14:19:57 +1000 Message-Id: <20190424041959.4087-2-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190424041959.4087-1-david@gibson.dropbear.id.au> References: <20190424041959.4087-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH v2 1/3] pcie: Remove redundant test in pcie_mmcfg_data_{read, write}() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" These functions have an explicit test for accesses above the device's config size. But pci_host_config_{read,write}_common() which they're about to call already have checks against the config space limit and do the right thing. So, remove the redundant tests. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/pci/pcie_host.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c index 553db56778..1ee4945a6d 100644 --- a/hw/pci/pcie_host.c +++ b/hw/pci/pcie_host.c @@ -47,11 +47,6 @@ static void pcie_mmcfg_data_write(void *opaque, hwaddr m= mcfg_addr, } addr =3D PCIE_MMCFG_CONFOFFSET(mmcfg_addr); limit =3D pci_config_size(pci_dev); - if (limit <=3D addr) { - /* conventional pci device can be behind pcie-to-pci bridge. - 256 <=3D addr < 4K has no effects. */ - return; - } pci_host_config_write_common(pci_dev, addr, limit, val, len); } =20 @@ -70,11 +65,6 @@ static uint64_t pcie_mmcfg_data_read(void *opaque, } addr =3D PCIE_MMCFG_CONFOFFSET(mmcfg_addr); limit =3D pci_config_size(pci_dev); - if (limit <=3D addr) { - /* conventional pci device can be behind pcie-to-pci bridge. - 256 <=3D addr < 4K has no effects. */ - return ~0x0; - } return pci_host_config_read_common(pci_dev, addr, limit, len); } =20 --=20 2.20.1 From nobody Mon Nov 10 09:55:35 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1556079795; cv=none; d=zoho.com; s=zohoarc; b=j824sfLwkSPa3v5ZXjm7LW6Pf3dNitvrrFLwcUhupr8VJM+MIGbyoWR7Z+79Y0KxRv1rHw+afKQqH4/wBrZo5HJziyxCm5RSNsSSEPdPjaVXg9loJLu6yu63oscc1VRxJtXdId73rx7LkiV7gPMGp/8BoOkXZYm4iDrSLzKJvYI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1556079795; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=Jqt6SQOYzwSaskyJebvFiH92PUbkupQ5U231LIwfSCU=; b=NnkLKVUW0STJgdibU6MLrr/9jdK23KEG8UmGirisiMo4RwXxVwwcJm25FLy08LkuzMQLRVWtR7G/WVgEW0I8QTkQNSfQ5lmMmYlGBH/Vi6hzm0qWJDa6CD+RaVN+3/k6A1S7/mrZHSvBqZWgTDM3poOoD676KuRJpJ1EPIbeXaQ= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1556079794882516.080011953997; Tue, 23 Apr 2019 21:23:14 -0700 (PDT) Received: from localhost ([127.0.0.1]:35448 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hJ9R8-00006k-RL for importer@patchew.org; Wed, 24 Apr 2019 00:23:10 -0400 Received: from eggs.gnu.org ([209.51.188.92]:56559) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hJ9OI-0006JR-Fz for qemu-devel@nongnu.org; Wed, 24 Apr 2019 00:20:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hJ9OH-0008Ll-95 for qemu-devel@nongnu.org; Wed, 24 Apr 2019 00:20:14 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:55857) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hJ9OG-0007u2-Ij; Wed, 24 Apr 2019 00:20:13 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44pnCj6JbPz9s4V; Wed, 24 Apr 2019 14:20:01 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1556079601; bh=1TCldW4/94RREFBM+6o8PuzFfgGN5FLqxC7Y5jQpr44=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CIANgtuI0LTWQTmY/dGtIviYXU7D8T9vJ13YAQ8U5w7Q6VJnh5tqDDaRBo1+I5ZQ3 KWFLvYGTvH9DSBGERgZx/SEbPP+y1/aX1wKU7VzDiv2fT0X8BbWy8SiQ8s5frTBQZi MagP59m5TRvLXzK7k+Ek6zDp0liVWXt1NDZPJMQg= From: David Gibson To: Marcel Apfelbaum , qemu-devel@nongnu.org, "Michael S. Tsirkin" , Alex Williamson , Greg Kurz Date: Wed, 24 Apr 2019 14:19:58 +1000 Message-Id: <20190424041959.4087-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190424041959.4087-1-david@gibson.dropbear.id.au> References: <20190424041959.4087-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH v2 2/3] pci: Simplify pci_bus_is_root() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , qemu-ppc@nongnu.org, clg@kaod.org, Peter Xu , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" pci_bus_is_root() currently relies on a method in the PCIBusClass. But it's always known if a PCI bus is a root bus when we create it, so using a dynamic method is overkill. This replaces it with an IS_ROOT bit in a new flags field, which is set on root buses and otherwise clear. As a bonus this removes the special is_root logic from pci_expander_bridge, since it already creates its bus as a root bus. Signed-off-by: David Gibson Reviewed-by: Marcel Apfelbaum Reviewed-by: Peter Xu Reviewed-by: Greg Kurz --- hw/pci-bridge/pci_expander_bridge.c | 6 ------ hw/pci/pci.c | 14 ++------------ hw/virtio/virtio-pci.c | 1 + include/hw/pci/pci.h | 1 - include/hw/pci/pci_bus.h | 12 +++++++++++- 5 files changed, 14 insertions(+), 20 deletions(-) diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expand= er_bridge.c index e62de4218f..ca66bc721a 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -66,11 +66,6 @@ static int pxb_bus_num(PCIBus *bus) return pxb->bus_nr; } =20 -static bool pxb_is_root(PCIBus *bus) -{ - return true; /* by definition */ -} - static uint16_t pxb_bus_numa_node(PCIBus *bus) { PXBDev *pxb =3D convert_to_pxb(bus->parent_dev); @@ -83,7 +78,6 @@ static void pxb_bus_class_init(ObjectClass *class, void *= data) PCIBusClass *pbc =3D PCI_BUS_CLASS(class); =20 pbc->bus_num =3D pxb_bus_num; - pbc->is_root =3D pxb_is_root; pbc->numa_node =3D pxb_bus_numa_node; } =20 diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 6d13ef877b..ea5941fb22 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -129,14 +129,9 @@ static void pci_bus_unrealize(BusState *qbus, Error **= errp) vmstate_unregister(NULL, &vmstate_pcibus, bus); } =20 -static bool pcibus_is_root(PCIBus *bus) -{ - return !bus->parent_dev; -} - static int pcibus_num(PCIBus *bus) { - if (pcibus_is_root(bus)) { + if (pci_bus_is_root(bus)) { return 0; /* pci host bridge */ } return bus->parent_dev->config[PCI_SECONDARY_BUS]; @@ -164,7 +159,6 @@ static void pci_bus_class_init(ObjectClass *klass, void= *data) k->unrealize =3D pci_bus_unrealize; k->reset =3D pcibus_reset; =20 - pbc->is_root =3D pcibus_is_root; pbc->bus_num =3D pcibus_num; pbc->numa_node =3D pcibus_numa_node; pbc->allows_extended_config_space =3D pcibus_allows_extended_config_sp= ace; @@ -398,6 +392,7 @@ static void pci_root_bus_init(PCIBus *bus, DeviceState = *parent, bus->slot_reserved_mask =3D 0x0; bus->address_space_mem =3D address_space_mem; bus->address_space_io =3D address_space_io; + bus->flags |=3D PCI_BUS_IS_ROOT; =20 /* host bridge */ QLIST_INIT(&bus->child); @@ -415,11 +410,6 @@ bool pci_bus_is_express(PCIBus *bus) return object_dynamic_cast(OBJECT(bus), TYPE_PCIE_BUS); } =20 -bool pci_bus_is_root(PCIBus *bus) -{ - return PCI_BUS_GET_CLASS(bus)->is_root(bus); -} - bool pci_bus_allows_extended_config_space(PCIBus *bus) { return PCI_BUS_GET_CLASS(bus)->allows_extended_config_space(bus); diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index cb44e19b67..942173d830 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -20,6 +20,7 @@ #include "standard-headers/linux/virtio_pci.h" #include "hw/virtio/virtio.h" #include "hw/pci/pci.h" +#include "hw/pci/pci_bus.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "hw/pci/msi.h" diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 0abb06b357..33ccce320c 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -395,7 +395,6 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, = int pin); #define TYPE_PCIE_BUS "PCIE" =20 bool pci_bus_is_express(PCIBus *bus); -bool pci_bus_is_root(PCIBus *bus); bool pci_bus_allows_extended_config_space(PCIBus *bus); =20 void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index f6df834170..aea98d5040 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -15,14 +15,19 @@ typedef struct PCIBusClass { BusClass parent_class; /*< public >*/ =20 - bool (*is_root)(PCIBus *bus); int (*bus_num)(PCIBus *bus); uint16_t (*numa_node)(PCIBus *bus); bool (*allows_extended_config_space)(PCIBus *bus); } PCIBusClass; =20 +enum PCIBusFlags { + /* This bus is the root of a PCI domain */ + PCI_BUS_IS_ROOT =3D 0x0001, +}; + struct PCIBus { BusState qbus; + enum PCIBusFlags flags; PCIIOMMUFunc iommu_fn; void *iommu_opaque; uint8_t devfn_min; @@ -47,4 +52,9 @@ struct PCIBus { Notifier machine_done; }; =20 +static inline bool pci_bus_is_root(PCIBus *bus) +{ + return !!(bus->flags & PCI_BUS_IS_ROOT); +} + #endif /* QEMU_PCI_BUS_H */ --=20 2.20.1 From nobody Mon Nov 10 09:55:35 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1556079859; cv=none; d=zoho.com; s=zohoarc; b=klDhJeS4pny+fptUd/n21LYi6vj05XH6UWpkRzSC6RvZrajCck7z2phwqk/yWcAezVUpQHJi7+FP8MIjBi0w1OWsQfANBQKHSVTwAt1ec1zFk1QbZD/f7FxCCbyDssAZqb/JvimEkHRT2npPI4dzmeVIXF1wuiU69efhBWy95xA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1556079859; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Wed, 24 Apr 2019 00:20:15 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:47939 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hJ9OG-0007ue-Bc; Wed, 24 Apr 2019 00:20:13 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44pnCk1B19z9s55; Wed, 24 Apr 2019 14:20:01 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1556079602; bh=i5wDM9n5BQU1nFXLcxEUJQtZIASMK/19+h0VivHGMgY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DcO2CBneuu4nPVP6bED0dJWG2XQWmUkg6B9az6vueZoRXN1JSblqt7TIRVp/ZQbiD 9wqDjWelkUPVirtwr+fZOQhb/3hjZnDZjtuRxqNHd5AnZ7wxeVMYGd3t4Paqsf5Pzb PANn+m/SZGx3SaxI9HHnfo9QnVMYfhKkT+aiHFKY= From: David Gibson To: Marcel Apfelbaum , qemu-devel@nongnu.org, "Michael S. Tsirkin" , Alex Williamson , Greg Kurz Date: Wed, 24 Apr 2019 14:19:59 +1000 Message-Id: <20190424041959.4087-4-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190424041959.4087-1-david@gibson.dropbear.id.au> References: <20190424041959.4087-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PATCH v2 3/3] pcie: Simplify pci_adjust_config_limit() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Since c2077e2c "pci: Adjust PCI config limit based on bus topology", pci_adjust_config_limit() has been used in the config space read and write paths to only permit access to extended config space on buses which permit it. Specifically it prevents access on devices below a vanilla-PCI bus via some combination of bridges, even if both the host bridge and the device itself are PCI-E. It accomplishes this with a somewhat complex call up the chain of bridges to see if any of them prohibit extended config space access. This is overly complex, since we can always know if the bus will support such access at the point it is constructed. This patch simplifies the test by using a flag in the PCIBus instance indicating whether extended configuration space is accessible. It is false for vanilla PCI buses. For PCI-E buses, it is true for root buses and equal to the parent bus's's capability otherwise. For the special case of sPAPR's paravirtualized PCI root bus, which acts mostly like vanilla PCI, but does allow extended config space access, we override the default value of the flag from the host bridge code. This should cause no behavioural change. Signed-off-by: David Gibson cd Reviewed-by: Alexey Kardashevskiy Reviewed-by: Greg Kurz --- hw/pci/pci.c | 41 ++++++++++++++++++++++------------------ hw/pci/pci_host.c | 13 +++---------- hw/ppc/spapr_pci.c | 34 ++++++++++----------------------- include/hw/pci/pci.h | 1 - include/hw/pci/pci_bus.h | 9 ++++++++- 5 files changed, 44 insertions(+), 54 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index ea5941fb22..59ee034331 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -120,6 +120,27 @@ static void pci_bus_realize(BusState *qbus, Error **er= rp) vmstate_register(NULL, -1, &vmstate_pcibus, bus); } =20 +static void pcie_bus_realize(BusState *qbus, Error **errp) +{ + PCIBus *bus =3D PCI_BUS(qbus); + + pci_bus_realize(qbus, errp); + + /* + * A PCI-E bus can support extended config space if it's the root + * bus, or if the bus/bridge above it does as well + */ + if (pci_bus_is_root(bus)) { + bus->flags |=3D PCI_BUS_EXTENDED_CONFIG_SPACE; + } else { + PCIBus *parent_bus =3D pci_get_bus(bus->parent_dev); + + if (pci_bus_allows_extended_config_space(parent_bus)) { + bus->flags |=3D PCI_BUS_EXTENDED_CONFIG_SPACE; + } + } +} + static void pci_bus_unrealize(BusState *qbus, Error **errp) { PCIBus *bus =3D PCI_BUS(qbus); @@ -142,11 +163,6 @@ static uint16_t pcibus_numa_node(PCIBus *bus) return NUMA_NODE_UNASSIGNED; } =20 -static bool pcibus_allows_extended_config_space(PCIBus *bus) -{ - return false; -} - static void pci_bus_class_init(ObjectClass *klass, void *data) { BusClass *k =3D BUS_CLASS(klass); @@ -161,7 +177,6 @@ static void pci_bus_class_init(ObjectClass *klass, void= *data) =20 pbc->bus_num =3D pcibus_num; pbc->numa_node =3D pcibus_numa_node; - pbc->allows_extended_config_space =3D pcibus_allows_extended_config_sp= ace; } =20 static const TypeInfo pci_bus_info =3D { @@ -182,16 +197,11 @@ static const TypeInfo conventional_pci_interface_info= =3D { .parent =3D TYPE_INTERFACE, }; =20 -static bool pciebus_allows_extended_config_space(PCIBus *bus) -{ - return true; -} - static void pcie_bus_class_init(ObjectClass *klass, void *data) { - PCIBusClass *pbc =3D PCI_BUS_CLASS(klass); + BusClass *k =3D BUS_CLASS(klass); =20 - pbc->allows_extended_config_space =3D pciebus_allows_extended_config_s= pace; + k->realize =3D pcie_bus_realize; } =20 static const TypeInfo pcie_bus_info =3D { @@ -410,11 +420,6 @@ bool pci_bus_is_express(PCIBus *bus) return object_dynamic_cast(OBJECT(bus), TYPE_PCIE_BUS); } =20 -bool pci_bus_allows_extended_config_space(PCIBus *bus) -{ - return PCI_BUS_GET_CLASS(bus)->allows_extended_config_space(bus); -} - void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, const char *name, MemoryRegion *address_space_mem, diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index 9d64b2e12f..5f3497256c 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -53,16 +53,9 @@ static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bu= s, uint32_t addr) =20 static void pci_adjust_config_limit(PCIBus *bus, uint32_t *limit) { - if (*limit > PCI_CONFIG_SPACE_SIZE) { - if (!pci_bus_allows_extended_config_space(bus)) { - *limit =3D PCI_CONFIG_SPACE_SIZE; - return; - } - - if (!pci_bus_is_root(bus)) { - PCIDevice *bridge =3D pci_bridge_get_device(bus); - pci_adjust_config_limit(pci_get_bus(bridge), limit); - } + if ((*limit > PCI_CONFIG_SPACE_SIZE) && + !pci_bus_allows_extended_config_space(bus)) { + *limit =3D PCI_CONFIG_SPACE_SIZE; } } =20 diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index f62e6833b8..65a86be29c 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1638,28 +1638,6 @@ static void spapr_phb_unrealize(DeviceState *dev, Er= ror **errp) memory_region_del_subregion(get_system_memory(), &sphb->mem32window); } =20 -static bool spapr_phb_allows_extended_config_space(PCIBus *bus) -{ - SpaprPhbState *sphb =3D SPAPR_PCI_HOST_BRIDGE(BUS(bus)->parent); - - return sphb->pcie_ecs; -} - -static void spapr_phb_root_bus_class_init(ObjectClass *klass, void *data) -{ - PCIBusClass *pbc =3D PCI_BUS_CLASS(klass); - - pbc->allows_extended_config_space =3D spapr_phb_allows_extended_config= _space; -} - -#define TYPE_SPAPR_PHB_ROOT_BUS "pci" - -static const TypeInfo spapr_phb_root_bus_info =3D { - .name =3D TYPE_SPAPR_PHB_ROOT_BUS, - .parent =3D TYPE_PCI_BUS, - .class_init =3D spapr_phb_root_bus_class_init, -}; - static void spapr_phb_realize(DeviceState *dev, Error **errp) { /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user @@ -1765,7 +1743,16 @@ static void spapr_phb_realize(DeviceState *dev, Erro= r **errp) pci_spapr_set_irq, pci_spapr_map_irq, sphb, &sphb->memspace, &sphb->iospace, PCI_DEVFN(0, 0), PCI_NUM_PINS, - TYPE_SPAPR_PHB_ROOT_BUS); + TYPE_PCI_BUS); + + /* + * Despite resembling a vanilla PCI bus in most ways, the PAPR + * para-virtualized PCI bus *does* permit PCI-E extended config + * space access + */ + if (sphb->pcie_ecs) { + bus->flags |=3D PCI_BUS_EXTENDED_CONFIG_SPACE; + } phb->bus =3D bus; qbus_set_hotplug_handler(BUS(phb->bus), OBJECT(sphb), NULL); =20 @@ -2348,7 +2335,6 @@ void spapr_pci_rtas_init(void) static void spapr_pci_register_types(void) { type_register_static(&spapr_phb_info); - type_register_static(&spapr_phb_root_bus_info); } =20 type_init(spapr_pci_register_types) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 33ccce320c..0edfaabbb0 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -395,7 +395,6 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, = int pin); #define TYPE_PCIE_BUS "PCIE" =20 bool pci_bus_is_express(PCIBus *bus); -bool pci_bus_allows_extended_config_space(PCIBus *bus); =20 void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, const char *name, diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index aea98d5040..2d5f74b7c1 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -17,12 +17,13 @@ typedef struct PCIBusClass { =20 int (*bus_num)(PCIBus *bus); uint16_t (*numa_node)(PCIBus *bus); - bool (*allows_extended_config_space)(PCIBus *bus); } PCIBusClass; =20 enum PCIBusFlags { /* This bus is the root of a PCI domain */ PCI_BUS_IS_ROOT =3D 0x0001, + /* PCIe extended configuration space is accessible on this bus */ + PCI_BUS_EXTENDED_CONFIG_SPACE =3D 0x0002, }; =20 struct PCIBus { @@ -57,4 +58,10 @@ static inline bool pci_bus_is_root(PCIBus *bus) return !!(bus->flags & PCI_BUS_IS_ROOT); } =20 +static inline bool pci_bus_allows_extended_config_space(PCIBus *bus) +{ + return !!(bus->flags & PCI_BUS_EXTENDED_CONFIG_SPACE); +} + + #endif /* QEMU_PCI_BUS_H */ --=20 2.20.1