From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555063608; cv=none; d=zoho.com; s=zohoarc; b=ZMx9tL9Y0i2r1JD5t2qCsJdAZ/SaF60EvLkJdsV6onrUq1yTtdoXXjt4S9xI+d5DhWsxep58uiLD7nUfFwKocBHD1r19zHpSE5xZi64qjxoRw239QeQW+OcEvirgt0DE1G2X+6ZwW3BV/UFkOrFYZpMVGRCcjMRPXWQTPWhE9xc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1555063608; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=wvYeVvCer7WuncJWJwmKSq9hxvcKCWuMEhk+tIJxOaY=; b=hlvJTDlDt0BEovE9tQ4TWr+TRTzwjZrSBBmb0oLZ55LcXTpH1CHURsvle6408wgKCARdmAEObKPFeaAz+i2bCmljd6RFdeJFJpuDe2FeV2O0FPoeoGpsC+dA3x4x1KNNJcMaPRWqqfWaPXaoRlHT2sVrRYumAphUon56oKx4aCU= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1555063608428507.02409091981986; Fri, 12 Apr 2019 03:06:48 -0700 (PDT) Received: from localhost ([127.0.0.1]:33522 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt4t-00025a-AB for importer@patchew.org; Fri, 12 Apr 2019 06:06:35 -0400 Received: from eggs.gnu.org ([209.51.188.92]:37664) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt2o-0000hc-9O for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:04:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEt2n-0003V5-65 for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:04:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41726) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEt2k-0003Sf-HC; Fri, 12 Apr 2019 06:04:22 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7629E309EFFC; Fri, 12 Apr 2019 10:04:18 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id CF0E819728; Fri, 12 Apr 2019 10:04:14 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:28 +0200 Message-Id: <20190412100354.6409-2-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Fri, 12 Apr 2019 10:04:21 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 01/27] hw/arm/smmuv3: Remove SMMUNotifierNode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The SMMUNotifierNode struct is not necessary and brings extra complexity so let's remove it. We now directly track the SMMUDevices which have registered IOMMU MR notifiers. This is inspired from the same transformation on intel-iommu done in commit b4a4ba0d68f50f218ee3957b6638dbee32a5eeef ("intel-iommu: remove IntelIOMMUNotifierNode") Signed-off-by: Eric Auger --- hw/arm/smmu-common.c | 6 +++--- hw/arm/smmuv3.c | 28 +++++++--------------------- include/hw/arm/smmu-common.h | 8 ++------ 3 files changed, 12 insertions(+), 30 deletions(-) diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index bbf4b8721a..e94be6db6c 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -412,10 +412,10 @@ inline void smmu_inv_notifiers_mr(IOMMUMemoryRegion *= mr) /* Unmap all notifiers of all mr's */ void smmu_inv_notifiers_all(SMMUState *s) { - SMMUNotifierNode *node; + SMMUDevice *sdev; =20 - QLIST_FOREACH(node, &s->notifiers_list, next) { - smmu_inv_notifiers_mr(&node->sdev->iommu); + QLIST_FOREACH(sdev, &s->devices_with_notifiers, next) { + smmu_inv_notifiers_mr(&sdev->iommu); } } =20 diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 8c4e99fecc..fd8ec7860e 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -828,10 +828,10 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr, /* invalidate an asid/iova tuple in all mr's */ static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, dma_addr_t i= ova) { - SMMUNotifierNode *node; + SMMUDevice *sdev; =20 - QLIST_FOREACH(node, &s->notifiers_list, next) { - IOMMUMemoryRegion *mr =3D &node->sdev->iommu; + QLIST_FOREACH(sdev, &s->devices_with_notifiers, next) { + IOMMUMemoryRegion *mr =3D &sdev->iommu; IOMMUNotifier *n; =20 trace_smmuv3_inv_notifiers_iova(mr->parent_obj.name, asid, iova); @@ -1472,8 +1472,6 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryReg= ion *iommu, SMMUDevice *sdev =3D container_of(iommu, SMMUDevice, iommu); SMMUv3State *s3 =3D sdev->smmu; SMMUState *s =3D &(s3->smmu_state); - SMMUNotifierNode *node =3D NULL; - SMMUNotifierNode *next_node =3D NULL; =20 if (new & IOMMU_NOTIFIER_MAP) { int bus_num =3D pci_bus_num(sdev->bus); @@ -1485,22 +1483,10 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryR= egion *iommu, =20 if (old =3D=3D IOMMU_NOTIFIER_NONE) { trace_smmuv3_notify_flag_add(iommu->parent_obj.name); - node =3D g_malloc0(sizeof(*node)); - node->sdev =3D sdev; - QLIST_INSERT_HEAD(&s->notifiers_list, node, next); - return; - } - - /* update notifier node with new flags */ - QLIST_FOREACH_SAFE(node, &s->notifiers_list, next, next_node) { - if (node->sdev =3D=3D sdev) { - if (new =3D=3D IOMMU_NOTIFIER_NONE) { - trace_smmuv3_notify_flag_del(iommu->parent_obj.name); - QLIST_REMOVE(node, next); - g_free(node); - } - return; - } + QLIST_INSERT_HEAD(&s->devices_with_notifiers, sdev, next); + } else if (new =3D=3D IOMMU_NOTIFIER_NONE) { + trace_smmuv3_notify_flag_del(iommu->parent_obj.name); + QLIST_REMOVE(sdev, next); } } =20 diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index b07cadd0ef..2c7fbf4202 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -80,13 +80,9 @@ typedef struct SMMUDevice { AddressSpace as; uint32_t cfg_cache_hits; uint32_t cfg_cache_misses; + QLIST_ENTRY(SMMUDevice) next; } SMMUDevice; =20 -typedef struct SMMUNotifierNode { - SMMUDevice *sdev; - QLIST_ENTRY(SMMUNotifierNode) next; -} SMMUNotifierNode; - typedef struct SMMUPciBus { PCIBus *bus; SMMUDevice *pbdev[0]; /* Parent array is sparse, so dynamically allo= c */ @@ -108,7 +104,7 @@ typedef struct SMMUState { GHashTable *iotlb; SMMUPciBus *smmu_pcibus_by_bus_num[SMMU_PCI_BUS_MAX]; PCIBus *pci_bus; - QLIST_HEAD(, SMMUNotifierNode) notifiers_list; + QLIST_HEAD(, SMMUDevice) devices_with_notifiers; uint8_t bus_num; PCIBus *primary_bus; } SMMUState; --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555063767; cv=none; d=zoho.com; s=zohoarc; b=NZTocQB9DnHUYKX4fi8K9GlILtwib9PXH3FaJQxQCcCr+63TwQFInNA5Lb6cjwpPFtMkaxSF6M10hWtwOOAOWNrmqM9PMvly/IZ5Mt9Omu2/50ggP1/X3xmtk2uh8ETXIQsLy/923UgX+IDt/D6fSZchNKKEWYeS+Ls2qATezGo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1555063767; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=EIHY3ykj299fOGaepp3eXs5aU411Gr3aQlhxxvB/A8w=; b=OSoWe4Z19oTjO97YvSAmfplrzKOJgu4LqyHW6YlOsi2H6bSzs3O0gLjKIUqQf8U2LVQ2GsXZGDRlqHX0WGxS1SmPDBM/U/zFRPiePCOzDe/BjeV5+JvxnOopJQCR5Xg8AcyCO/ACdlzc92oKP1Up//JKA7x1sbpW5fl6S/cmyQc= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1555063767878521.8762259339829; Fri, 12 Apr 2019 03:09:27 -0700 (PDT) Received: from localhost ([127.0.0.1]:33564 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt7c-00054n-Jj for importer@patchew.org; Fri, 12 Apr 2019 06:09:24 -0400 Received: from eggs.gnu.org ([209.51.188.92]:37695) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt2t-0000n7-JP for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:04:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEt2q-0003Xc-UR for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:04:31 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59020) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEt2m-0003Ts-9T; Fri, 12 Apr 2019 06:04:24 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7720E3DBDF; Fri, 12 Apr 2019 10:04:23 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id C831219750; Fri, 12 Apr 2019 10:04:18 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:29 +0200 Message-Id: <20190412100354.6409-3-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 12 Apr 2019 10:04:23 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 02/27] vfio/common: Introduce vfio_set_irq_signaling helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The code used to assign an interrupt index/subindex to an eventfd is duplicated many times. Let's introduce an helper that allows to set/unset the signaling for an ACTION_TRIGGER or ACTION_UNMASK action. Signed-off-by: Eric Auger --- This is a follow-up to [PATCH v2 0/2] vfio-pci: Introduce vfio_set_event_handler(). It looks to me that introducing vfio_set_irq_signaling() has more benefits in term of code reduction and the helper abstraction looks cleaner. --- hw/vfio/common.c | 61 +++++++++ hw/vfio/pci.c | 224 ++++++++-------------------------- hw/vfio/platform.c | 55 +++------ include/hw/vfio/vfio-common.h | 2 + 4 files changed, 134 insertions(+), 208 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 4374cc6176..f88fd10ca3 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -95,6 +95,67 @@ void vfio_mask_single_irqindex(VFIODevice *vbasedev, int= index) ioctl(vbasedev->fd, VFIO_DEVICE_SET_IRQS, &irq_set); } =20 +static inline const char *action_to_str(int action) +{ + switch (action) { + case VFIO_IRQ_SET_ACTION_MASK: + return "MASK"; + case VFIO_IRQ_SET_ACTION_UNMASK: + return "UNMASK"; + case VFIO_IRQ_SET_ACTION_TRIGGER: + return "TRIGGER"; + default: + return "UNKNOWN ACTION"; + } +} + +int vfio_set_irq_signaling(VFIODevice *vbasedev, int index, int subindex, + int action, int fd, Error **errp) +{ + struct vfio_irq_info irq_info =3D { .argsz =3D sizeof(irq_info), + .index =3D index }; + struct vfio_irq_set *irq_set; + int argsz, ret =3D 0; + int32_t *pfd; + + ret =3D ioctl(vbasedev->fd, VFIO_DEVICE_GET_IRQ_INFO, &irq_info); + if (ret < 0) { + error_setg_errno(errp, errno, "index %d does not exist", index); + goto error; + } + if (irq_info.count < subindex + 1) { + error_setg_errno(errp, errno, "subindex %d does not exist", subind= ex); + goto error; + } + + argsz =3D sizeof(*irq_set) + sizeof(*pfd); + + irq_set =3D g_malloc0(argsz); + irq_set->argsz =3D argsz; + irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | action; + irq_set->index =3D index; + irq_set->start =3D subindex; + irq_set->count =3D 1; + pfd =3D (int32_t *)&irq_set->data; + *pfd =3D fd; + + ret =3D ioctl(vbasedev->fd, VFIO_DEVICE_SET_IRQS, irq_set); + + g_free(irq_set); + + if (ret) { + error_setg_errno(errp, -ret, "VFIO_DEVICE_SET_IRQS failure"); + goto error; + } + return 0; +error: + error_prepend(errp, + "Failed to %s %s eventfd signaling for interrupt [%d,%d]= : ", + fd < 0 ? "tear down" : "set up", action_to_str(action), + index, subindex); + return ret; +} + /* * IO Port/MMIO - Beware of the endians, VFIO is always little endian */ diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 504019c458..cd93ff6fa3 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -113,9 +113,7 @@ static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev, E= rror **errp) .gsi =3D vdev->intx.route.irq, .flags =3D KVM_IRQFD_FLAG_RESAMPLE, }; - struct vfio_irq_set *irq_set; - int ret, argsz; - int32_t *pfd; + Error *err =3D NULL; =20 if (vdev->no_kvm_intx || !kvm_irqfds_enabled() || vdev->intx.route.mode !=3D PCI_INTX_ENABLED || @@ -143,22 +141,10 @@ static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev,= Error **errp) goto fail_irqfd; } =20 - argsz =3D sizeof(*irq_set) + sizeof(*pfd); - - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_UNM= ASK; - irq_set->index =3D VFIO_PCI_INTX_IRQ_INDEX; - irq_set->start =3D 0; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; - - *pfd =3D irqfd.resamplefd; - - ret =3D ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); - g_free(irq_set); - if (ret) { - error_setg_errno(errp, -ret, "failed to setup INTx unmask fd"); + if (vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX, 0, + VFIO_IRQ_SET_ACTION_UNMASK, + irqfd.resamplefd, &err)) { + error_propagate(errp, err); goto fail_vfio; } =20 @@ -262,10 +248,10 @@ static void vfio_intx_update(PCIDevice *pdev) static int vfio_intx_enable(VFIOPCIDevice *vdev, Error **errp) { uint8_t pin =3D vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1= ); - int ret, argsz, retval =3D 0; - struct vfio_irq_set *irq_set; - int32_t *pfd; Error *err =3D NULL; + int32_t fd; + int ret; + =20 if (!pin) { return 0; @@ -292,27 +278,15 @@ static int vfio_intx_enable(VFIOPCIDevice *vdev, Erro= r **errp) error_setg_errno(errp, -ret, "event_notifier_init failed"); return ret; } + fd =3D event_notifier_get_fd(&vdev->intx.interrupt); + qemu_set_fd_handler(fd, vfio_intx_interrupt, NULL, vdev); =20 - argsz =3D sizeof(*irq_set) + sizeof(*pfd); - - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRI= GGER; - irq_set->index =3D VFIO_PCI_INTX_IRQ_INDEX; - irq_set->start =3D 0; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; - - *pfd =3D event_notifier_get_fd(&vdev->intx.interrupt); - qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev); - - ret =3D ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); - if (ret) { - error_setg_errno(errp, -ret, "failed to setup INTx fd"); - qemu_set_fd_handler(*pfd, NULL, NULL, vdev); + if (vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, fd, &err)) { + error_propagate(errp, err); + qemu_set_fd_handler(fd, NULL, NULL, vdev); event_notifier_cleanup(&vdev->intx.interrupt); - retval =3D -errno; - goto cleanup; + return -errno; } =20 vfio_intx_enable_kvm(vdev, &err); @@ -323,11 +297,7 @@ static int vfio_intx_enable(VFIOPCIDevice *vdev, Error= **errp) vdev->interrupt =3D VFIO_INT_INTx; =20 trace_vfio_intx_enable(vdev->vbasedev.name); - -cleanup: - g_free(irq_set); - - return retval; + return 0; } =20 static void vfio_intx_disable(VFIOPCIDevice *vdev) @@ -530,31 +500,19 @@ static int vfio_msix_vector_do_use(PCIDevice *pdev, u= nsigned int nr, error_report("vfio: failed to enable vectors, %d", ret); } } else { - int argsz; - struct vfio_irq_set *irq_set; - int32_t *pfd; - - argsz =3D sizeof(*irq_set) + sizeof(*pfd); - - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | - VFIO_IRQ_SET_ACTION_TRIGGER; - irq_set->index =3D VFIO_PCI_MSIX_IRQ_INDEX; - irq_set->start =3D nr; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; + Error *err =3D NULL; + int32_t fd; =20 if (vector->virq >=3D 0) { - *pfd =3D event_notifier_get_fd(&vector->kvm_interrupt); + fd =3D event_notifier_get_fd(&vector->kvm_interrupt); } else { - *pfd =3D event_notifier_get_fd(&vector->interrupt); + fd =3D event_notifier_get_fd(&vector->interrupt); } =20 - ret =3D ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); - g_free(irq_set); - if (ret) { - error_report("vfio: failed to modify vector, %d", ret); + if (vfio_set_irq_signaling(&vdev->vbasedev, + VFIO_PCI_MSIX_IRQ_INDEX, nr, + VFIO_IRQ_SET_ACTION_TRIGGER, fd, &err= )) { + error_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name); } } =20 @@ -591,26 +549,10 @@ static void vfio_msix_vector_release(PCIDevice *pdev,= unsigned int nr) * be re-asserted on unmask. Nothing to do if already using QEMU mode. */ if (vector->virq >=3D 0) { - int argsz; - struct vfio_irq_set *irq_set; - int32_t *pfd; + int32_t fd =3D event_notifier_get_fd(&vector->interrupt); =20 - argsz =3D sizeof(*irq_set) + sizeof(*pfd); - - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | - VFIO_IRQ_SET_ACTION_TRIGGER; - irq_set->index =3D VFIO_PCI_MSIX_IRQ_INDEX; - irq_set->start =3D nr; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; - - *pfd =3D event_notifier_get_fd(&vector->interrupt); - - ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); - - g_free(irq_set); + vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_MSIX_IRQ_INDEX, n= r, + VFIO_IRQ_SET_ACTION_TRIGGER, fd, NULL); } } =20 @@ -2629,10 +2571,8 @@ static void vfio_err_notifier_handler(void *opaque) */ static void vfio_register_err_notifier(VFIOPCIDevice *vdev) { - int ret; - int argsz; - struct vfio_irq_set *irq_set; - int32_t *pfd; + Error *err =3D NULL; + int32_t fd; =20 if (!vdev->pci_aer) { return; @@ -2644,58 +2584,30 @@ static void vfio_register_err_notifier(VFIOPCIDevic= e *vdev) return; } =20 - argsz =3D sizeof(*irq_set) + sizeof(*pfd); + fd =3D event_notifier_get_fd(&vdev->err_notifier); + qemu_set_fd_handler(fd, vfio_err_notifier_handler, NULL, vdev); =20 - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | - VFIO_IRQ_SET_ACTION_TRIGGER; - irq_set->index =3D VFIO_PCI_ERR_IRQ_INDEX; - irq_set->start =3D 0; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; - - *pfd =3D event_notifier_get_fd(&vdev->err_notifier); - qemu_set_fd_handler(*pfd, vfio_err_notifier_handler, NULL, vdev); - - ret =3D ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); - if (ret) { - error_report("vfio: Failed to set up error notification"); - qemu_set_fd_handler(*pfd, NULL, NULL, vdev); + if (vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_ERR_IRQ_INDEX, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, fd, &err)) { + error_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name); + qemu_set_fd_handler(fd, NULL, NULL, vdev); event_notifier_cleanup(&vdev->err_notifier); vdev->pci_aer =3D false; } - g_free(irq_set); } =20 static void vfio_unregister_err_notifier(VFIOPCIDevice *vdev) { - int argsz; - struct vfio_irq_set *irq_set; - int32_t *pfd; - int ret; + Error *err =3D NULL; =20 if (!vdev->pci_aer) { return; } =20 - argsz =3D sizeof(*irq_set) + sizeof(*pfd); - - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | - VFIO_IRQ_SET_ACTION_TRIGGER; - irq_set->index =3D VFIO_PCI_ERR_IRQ_INDEX; - irq_set->start =3D 0; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; - *pfd =3D -1; - - ret =3D ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); - if (ret) { - error_report("vfio: Failed to de-assign error fd: %m"); + if (vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_ERR_IRQ_INDEX, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, -1, &err)) { + error_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name); } - g_free(irq_set); qemu_set_fd_handler(event_notifier_get_fd(&vdev->err_notifier), NULL, NULL, vdev); event_notifier_cleanup(&vdev->err_notifier); @@ -2718,77 +2630,43 @@ static void vfio_req_notifier_handler(void *opaque) =20 static void vfio_register_req_notifier(VFIOPCIDevice *vdev) { - struct vfio_irq_info irq_info =3D { .argsz =3D sizeof(irq_info), - .index =3D VFIO_PCI_REQ_IRQ_INDEX }; - int argsz; - struct vfio_irq_set *irq_set; - int32_t *pfd; + Error *err =3D NULL; + int32_t fd; =20 if (!(vdev->features & VFIO_FEATURE_ENABLE_REQ)) { return; } =20 - if (ioctl(vdev->vbasedev.fd, - VFIO_DEVICE_GET_IRQ_INFO, &irq_info) < 0 || irq_info.count <= 1) { - return; - } - if (event_notifier_init(&vdev->req_notifier, 0)) { error_report("vfio: Unable to init event notifier for device reque= st"); return; } =20 - argsz =3D sizeof(*irq_set) + sizeof(*pfd); + fd =3D event_notifier_get_fd(&vdev->req_notifier); + qemu_set_fd_handler(fd, vfio_req_notifier_handler, NULL, vdev); =20 - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | - VFIO_IRQ_SET_ACTION_TRIGGER; - irq_set->index =3D VFIO_PCI_REQ_IRQ_INDEX; - irq_set->start =3D 0; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; - - *pfd =3D event_notifier_get_fd(&vdev->req_notifier); - qemu_set_fd_handler(*pfd, vfio_req_notifier_handler, NULL, vdev); - - if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set)) { - error_report("vfio: Failed to set up device request notification"); - qemu_set_fd_handler(*pfd, NULL, NULL, vdev); + if (vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_REQ_IRQ_INDEX, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, fd, &err)) { + error_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name); + qemu_set_fd_handler(fd, NULL, NULL, vdev); event_notifier_cleanup(&vdev->req_notifier); } else { vdev->req_enabled =3D true; } - - g_free(irq_set); } =20 static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev) { - int argsz; - struct vfio_irq_set *irq_set; - int32_t *pfd; + Error *err =3D NULL; =20 if (!vdev->req_enabled) { return; } =20 - argsz =3D sizeof(*irq_set) + sizeof(*pfd); - - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | - VFIO_IRQ_SET_ACTION_TRIGGER; - irq_set->index =3D VFIO_PCI_REQ_IRQ_INDEX; - irq_set->start =3D 0; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; - *pfd =3D -1; - - if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set)) { - error_report("vfio: Failed to de-assign device request fd: %m"); + if (vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_REQ_IRQ_INDEX, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, -1, &err)) { + error_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name); } - g_free(irq_set); qemu_set_fd_handler(event_notifier_get_fd(&vdev->req_notifier), NULL, NULL, vdev); event_notifier_cleanup(&vdev->req_notifier); diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c index 398db38f14..d60f391439 100644 --- a/hw/vfio/platform.c +++ b/hw/vfio/platform.c @@ -106,26 +106,19 @@ static int vfio_set_trigger_eventfd(VFIOINTp *intp, eventfd_user_side_handler_t handler) { VFIODevice *vbasedev =3D &intp->vdev->vbasedev; - struct vfio_irq_set *irq_set; - int argsz, ret; - int32_t *pfd; + int32_t fd =3D event_notifier_get_fd(intp->interrupt); + Error *err =3D NULL; + int ret; =20 - argsz =3D sizeof(*irq_set) + sizeof(*pfd); - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRI= GGER; - irq_set->index =3D intp->pin; - irq_set->start =3D 0; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; - *pfd =3D event_notifier_get_fd(intp->interrupt); - qemu_set_fd_handler(*pfd, (IOHandler *)handler, NULL, intp); - ret =3D ioctl(vbasedev->fd, VFIO_DEVICE_SET_IRQS, irq_set); - if (ret < 0) { - error_report("vfio: Failed to set trigger eventfd: %m"); - qemu_set_fd_handler(*pfd, NULL, NULL, NULL); + qemu_set_fd_handler(fd, (IOHandler *)handler, NULL, intp); + + ret =3D vfio_set_irq_signaling(vbasedev, intp->pin, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, fd, &err); + if (ret) { + error_reportf_err(err, VFIO_MSG_PREFIX, vbasedev->name); + qemu_set_fd_handler(fd, NULL, NULL, NULL); } - g_free(irq_set); + return ret; } =20 @@ -361,26 +354,18 @@ static void vfio_start_eventfd_injection(SysBusDevice= *sbdev, qemu_irq irq) */ static int vfio_set_resample_eventfd(VFIOINTp *intp) { + int32_t fd =3D event_notifier_get_fd(intp->unmask); VFIODevice *vbasedev =3D &intp->vdev->vbasedev; - struct vfio_irq_set *irq_set; - int argsz, ret; - int32_t *pfd; + Error *err =3D NULL; + int ret; =20 - argsz =3D sizeof(*irq_set) + sizeof(*pfd); - irq_set =3D g_malloc0(argsz); - irq_set->argsz =3D argsz; - irq_set->flags =3D VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_UNM= ASK; - irq_set->index =3D intp->pin; - irq_set->start =3D 0; - irq_set->count =3D 1; - pfd =3D (int32_t *)&irq_set->data; - *pfd =3D event_notifier_get_fd(intp->unmask); - qemu_set_fd_handler(*pfd, NULL, NULL, NULL); - ret =3D ioctl(vbasedev->fd, VFIO_DEVICE_SET_IRQS, irq_set); - g_free(irq_set); - if (ret < 0) { - error_report("vfio: Failed to set resample eventfd: %m"); + qemu_set_fd_handler(fd, NULL, NULL, NULL); + ret =3D vfio_set_irq_signaling(vbasedev, intp->pin, 0, + VFIO_IRQ_SET_ACTION_UNMASK, fd, &err); + if (ret) { + error_reportf_err(err, VFIO_MSG_PREFIX, vbasedev->name); } + return ret; } =20 diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/vfio-common.h index 1155b79678..686d99ff8c 100644 --- a/include/hw/vfio/vfio-common.h +++ b/include/hw/vfio/vfio-common.h @@ -167,6 +167,8 @@ void vfio_put_base_device(VFIODevice *vbasedev); void vfio_disable_irqindex(VFIODevice *vbasedev, int index); void vfio_unmask_single_irqindex(VFIODevice *vbasedev, int index); void vfio_mask_single_irqindex(VFIODevice *vbasedev, int index); +int vfio_set_irq_signaling(VFIODevice *vbasedev, int index, int subindex, + int action, int fd, Error **errp); void vfio_region_write(void *opaque, hwaddr addr, uint64_t data, unsigned size); uint64_t vfio_region_read(void *opaque, --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:04:36 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0ECA530A189B; Fri, 12 Apr 2019 10:04:34 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id CCBE619C65; Fri, 12 Apr 2019 10:04:23 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:30 +0200 Message-Id: <20190412100354.6409-4-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 12 Apr 2019 10:04:34 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 03/27] update-linux-headers: Import iommu.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Update the script to import the new iommu.h uapi header. Signed-off-by: Eric Auger --- .../infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h | 15 +- include/standard-headers/drm/drm_fourcc.h | 63 +++++++ include/standard-headers/linux/ethtool.h | 33 +++- .../linux/input-event-codes.h | 2 + include/standard-headers/linux/input.h | 6 +- include/standard-headers/linux/pci_regs.h | 2 + .../standard-headers/linux/virtio_config.h | 6 + include/standard-headers/linux/virtio_ring.h | 10 -- .../standard-headers/rdma/vmw_pvrdma-abi.h | 1 + linux-headers/asm-arm/unistd-common.h | 22 +++ linux-headers/asm-arm64/unistd.h | 2 + linux-headers/asm-generic/unistd.h | 158 ++++++++++++++---- linux-headers/asm-mips/unistd_n32.h | 20 +++ linux-headers/asm-mips/unistd_o32.h | 30 ++++ linux-headers/asm-powerpc/kvm.h | 2 + linux-headers/asm-powerpc/unistd_32.h | 30 ++++ linux-headers/asm-powerpc/unistd_64.h | 11 ++ linux-headers/asm-s390/unistd_32.h | 33 ++++ linux-headers/asm-s390/unistd_64.h | 14 ++ linux-headers/asm-x86/unistd_32.h | 34 ++++ linux-headers/asm-x86/unistd_64.h | 4 + linux-headers/asm-x86/unistd_x32.h | 4 + linux-headers/linux/vfio.h | 107 ++++++++++++ scripts/update-linux-headers.sh | 2 +- 24 files changed, 553 insertions(+), 58 deletions(-) diff --git a/include/standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrd= ma_dev_api.h b/include/standard-headers/drivers/infiniband/hw/vmw_pvrdma/pv= rdma_dev_api.h index 422eb3f4c1..d019872608 100644 --- a/include/standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_= api.h +++ b/include/standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_= api.h @@ -57,7 +57,8 @@ =20 #define PVRDMA_ROCEV1_VERSION 17 #define PVRDMA_ROCEV2_VERSION 18 -#define PVRDMA_VERSION PVRDMA_ROCEV2_VERSION +#define PVRDMA_PPN64_VERSION 19 +#define PVRDMA_VERSION PVRDMA_PPN64_VERSION =20 #define PVRDMA_BOARD_ID 1 #define PVRDMA_REV_ID 1 @@ -279,8 +280,10 @@ struct pvrdma_device_shared_region { /* W: Async ring page info. */ struct pvrdma_ring_page_info cq_ring_pages; /* W: CQ ring page info. */ - uint32_t uar_pfn; /* W: UAR pageframe. */ - uint32_t pad2; /* Pad to 8-byte align. */ + union { + uint32_t uar_pfn; /* W: UAR pageframe. */ + uint64_t uar_pfn64; /* W: 64-bit UAR page frame. */ + }; struct pvrdma_device_caps caps; /* R: Device capabilities. */ }; =20 @@ -411,8 +414,10 @@ struct pvrdma_cmd_query_pkey_resp { =20 struct pvrdma_cmd_create_uc { struct pvrdma_cmd_hdr hdr; - uint32_t pfn; /* UAR page frame number */ - uint8_t reserved[4]; + union { + uint32_t pfn; /* UAR page frame number */ + uint64_t pfn64; /* 64-bit UAR page frame number */ + }; }; =20 struct pvrdma_cmd_create_uc_resp { diff --git a/include/standard-headers/drm/drm_fourcc.h b/include/standard-h= eaders/drm/drm_fourcc.h index 44490607f9..7f42babe9e 100644 --- a/include/standard-headers/drm/drm_fourcc.h +++ b/include/standard-headers/drm/drm_fourcc.h @@ -194,6 +194,27 @@ extern "C" { #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled= Cr:Cb plane */ #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled= Cb:Cr plane */ =20 +/* + * 2 plane YCbCr MSB aligned + * index 0 =3D Y plane, [15:0] Y:x [10:6] little endian + * index 1 =3D Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian + */ +#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0') /* 2x2 subsampled= Cr:Cb plane 10 bits per channel */ + +/* + * 2 plane YCbCr MSB aligned + * index 0 =3D Y plane, [15:0] Y:x [12:4] little endian + * index 1 =3D Cr:Cb plane, [31:0] Cr:x:Cb:x [12:4:12:4] little endian + */ +#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2') /* 2x2 subsampled= Cr:Cb plane 12 bits per channel */ + +/* + * 2 plane YCbCr MSB aligned + * index 0 =3D Y plane, [15:0] Y little endian + * index 1 =3D Cr:Cb plane, [31:0] Cr:Cb [16:16] little endian + */ +#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled= Cr:Cb plane 16 bits per channel */ + /* * 3 plane YCbCr * index 0: Y plane, [7:0] Y @@ -237,6 +258,8 @@ extern "C" { #define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06 #define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07 #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 +#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 + /* add more to the end as needed */ =20 #define DRM_FORMAT_RESERVED ((1ULL << 56) - 1) @@ -571,6 +594,9 @@ extern "C" { * AFBC has several features which may be supported and/or used, which are * represented using bits in the modifier. Not all combinations are valid, * and different devices or use-cases may support different combinations. + * + * Further information on the use of AFBC modifiers can be found in + * Documentation/gpu/afbc.rst */ #define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) fourcc_mod_code(ARM, __afbc_m= ode) =20 @@ -580,10 +606,18 @@ extern "C" { * Indicates the superblock size(s) used for the AFBC buffer. The buffer * size (in pixels) must be aligned to a multiple of the superblock size. * Four lowest significant bits(LSBs) are reserved for block size. + * + * Where one superblock size is specified, it applies to all planes of the + * buffer (e.g. 16x16, 32x8). When multiple superblock sizes are specified, + * the first applies to the Luma plane and the second applies to the Chroma + * plane(s). e.g. (32x8_64x4 means 32x8 Luma, with 64x4 Chroma). + * Multiple superblock sizes are only valid for multi-plane YCbCr formats. */ #define AFBC_FORMAT_MOD_BLOCK_SIZE_MASK 0xf #define AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 (1ULL) #define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 (2ULL) +#define AFBC_FORMAT_MOD_BLOCK_SIZE_64x4 (3ULL) +#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8_64x4 (4ULL) =20 /* * AFBC lossless colorspace transform @@ -643,6 +677,35 @@ extern "C" { */ #define AFBC_FORMAT_MOD_SC (1ULL << 9) =20 +/* + * AFBC double-buffer + * + * Indicates that the buffer is allocated in a layout safe for front-buffer + * rendering. + */ +#define AFBC_FORMAT_MOD_DB (1ULL << 10) + +/* + * AFBC buffer content hints + * + * Indicates that the buffer includes per-superblock content hints. + */ +#define AFBC_FORMAT_MOD_BCH (1ULL << 11) + +/* + * Allwinner tiled modifier + * + * This tiling mode is implemented by the VPU found on all Allwinner platf= orms, + * codenamed sunxi. It is associated with a YUV format that uses either 2 = or 3 + * planes. + * + * With this tiling, the luminance samples are disposed in tiles represent= ing + * 32x32 pixels and the chrominance samples in tiles representing 32x64 pi= xels. + * The pixel order in each tile is linear and the tiles are disposed linea= rly, + * both in row-major order. + */ +#define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1) + #if defined(__cplusplus) } #endif diff --git a/include/standard-headers/linux/ethtool.h b/include/standard-he= aders/linux/ethtool.h index 063c814278..ce648a5dd9 100644 --- a/include/standard-headers/linux/ethtool.h +++ b/include/standard-headers/linux/ethtool.h @@ -1432,6 +1432,13 @@ enum ethtool_link_mode_bit_indices { ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT =3D 29, ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT =3D 30, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT =3D 31, + + /* Last allowed bit for __ETHTOOL_LINK_MODE_LEGACY_MASK is bit + * 31. Please do NOT define any SUPPORTED_* or ADVERTISED_* + * macro for bits > 31. The only way to use indices > 31 is to + * use the new ETHTOOL_GLINKSETTINGS/ETHTOOL_SLINKSETTINGS API. + */ + ETHTOOL_LINK_MODE_25000baseKR_Full_BIT =3D 32, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT =3D 33, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT =3D 34, @@ -1453,15 +1460,24 @@ enum ethtool_link_mode_bit_indices { ETHTOOL_LINK_MODE_FEC_NONE_BIT =3D 49, ETHTOOL_LINK_MODE_FEC_RS_BIT =3D 50, ETHTOOL_LINK_MODE_FEC_BASER_BIT =3D 51, + ETHTOOL_LINK_MODE_50000baseKR_Full_BIT =3D 52, + ETHTOOL_LINK_MODE_50000baseSR_Full_BIT =3D 53, + ETHTOOL_LINK_MODE_50000baseCR_Full_BIT =3D 54, + ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT =3D 55, + ETHTOOL_LINK_MODE_50000baseDR_Full_BIT =3D 56, + ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT =3D 57, + ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT =3D 58, + ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT =3D 59, + ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT =3D 60, + ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT =3D 61, + ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT =3D 62, + ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT =3D 63, + ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT =3D 64, + ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT =3D 65, + ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT =3D 66, =20 - /* Last allowed bit for __ETHTOOL_LINK_MODE_LEGACY_MASK is bit - * 31. Please do NOT define any SUPPORTED_* or ADVERTISED_* - * macro for bits > 31. The only way to use indices > 31 is to - * use the new ETHTOOL_GLINKSETTINGS/ETHTOOL_SLINKSETTINGS API. - */ - - __ETHTOOL_LINK_MODE_LAST - =3D ETHTOOL_LINK_MODE_FEC_BASER_BIT, + /* must be last entry */ + __ETHTOOL_LINK_MODE_MASK_NBITS }; =20 #define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) \ @@ -1569,6 +1585,7 @@ enum ethtool_link_mode_bit_indices { #define SPEED_50000 50000 #define SPEED_56000 56000 #define SPEED_100000 100000 +#define SPEED_200000 200000 =20 #define SPEED_UNKNOWN -1 =20 diff --git a/include/standard-headers/linux/input-event-codes.h b/include/s= tandard-headers/linux/input-event-codes.h index 871ac933eb..ff2e1ebcc9 100644 --- a/include/standard-headers/linux/input-event-codes.h +++ b/include/standard-headers/linux/input-event-codes.h @@ -716,6 +716,8 @@ * the situation described above. */ #define REL_RESERVED 0x0a +#define REL_WHEEL_HI_RES 0x0b +#define REL_HWHEEL_HI_RES 0x0c #define REL_MAX 0x0f #define REL_CNT (REL_MAX+1) =20 diff --git a/include/standard-headers/linux/input.h b/include/standard-head= ers/linux/input.h index c0ad9fc2c3..d8914f25a5 100644 --- a/include/standard-headers/linux/input.h +++ b/include/standard-headers/linux/input.h @@ -23,13 +23,17 @@ */ =20 struct input_event { -#if (HOST_LONG_BITS !=3D 32 || !defined(__USE_TIME_BITS64)) && !defined(__= KERNEL) +#if (HOST_LONG_BITS !=3D 32 || !defined(__USE_TIME_BITS64)) && !defined(__= KERNEL__) struct timeval time; #define input_event_sec time.tv_sec #define input_event_usec time.tv_usec #else unsigned long __sec; +#if defined(__sparc__) && defined(__arch64__) + unsigned int __usec; +#else unsigned long __usec; +#endif #define input_event_sec __sec #define input_event_usec __usec #endif diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-h= eaders/linux/pci_regs.h index e1e9888c85..5c98133f2c 100644 --- a/include/standard-headers/linux/pci_regs.h +++ b/include/standard-headers/linux/pci_regs.h @@ -866,6 +866,7 @@ #define PCI_ATS_CAP 0x04 /* ATS Capability Register */ #define PCI_ATS_CAP_QDEP(x) ((x) & 0x1f) /* Invalidate Queue Depth */ #define PCI_ATS_MAX_QDEP 32 /* Max Invalidate Queue Depth */ +#define PCI_ATS_CAP_PAGE_ALIGNED 0x0020 /* Page Aligned Request */ #define PCI_ATS_CTRL 0x06 /* ATS Control Register */ #define PCI_ATS_CTRL_ENABLE 0x8000 /* ATS Enable */ #define PCI_ATS_CTRL_STU(x) ((x) & 0x1f) /* Smallest Translation Unit */ @@ -880,6 +881,7 @@ #define PCI_PRI_STATUS_RF 0x001 /* Response Failure */ #define PCI_PRI_STATUS_UPRGI 0x002 /* Unexpected PRG index */ #define PCI_PRI_STATUS_STOPPED 0x100 /* PRI Stopped */ +#define PCI_PRI_STATUS_PASID 0x8000 /* PRG Response PASID Required */ #define PCI_PRI_MAX_REQ 0x08 /* PRI max reqs supported */ #define PCI_PRI_ALLOC_REQ 0x0c /* PRI max reqs allowed */ #define PCI_EXT_CAP_PRI_SIZEOF 16 diff --git a/include/standard-headers/linux/virtio_config.h b/include/stand= ard-headers/linux/virtio_config.h index 24e30af5ec..9a69d9e242 100644 --- a/include/standard-headers/linux/virtio_config.h +++ b/include/standard-headers/linux/virtio_config.h @@ -78,6 +78,12 @@ /* This feature indicates support for the packed virtqueue layout. */ #define VIRTIO_F_RING_PACKED 34 =20 +/* + * This feature indicates that memory accesses by the driver and the + * device are ordered in a way described by the platform. + */ +#define VIRTIO_F_ORDER_PLATFORM 36 + /* * Does the device support Single Root I/O Virtualization? */ diff --git a/include/standard-headers/linux/virtio_ring.h b/include/standar= d-headers/linux/virtio_ring.h index e89931f634..306cd41147 100644 --- a/include/standard-headers/linux/virtio_ring.h +++ b/include/standard-headers/linux/virtio_ring.h @@ -211,14 +211,4 @@ struct vring_packed_desc { uint16_t flags; }; =20 -struct vring_packed { - unsigned int num; - - struct vring_packed_desc *desc; - - struct vring_packed_desc_event *driver; - - struct vring_packed_desc_event *device; -}; - #endif /* _LINUX_VIRTIO_RING_H */ diff --git a/include/standard-headers/rdma/vmw_pvrdma-abi.h b/include/stand= ard-headers/rdma/vmw_pvrdma-abi.h index 6c2bc46116..336a8d596f 100644 --- a/include/standard-headers/rdma/vmw_pvrdma-abi.h +++ b/include/standard-headers/rdma/vmw_pvrdma-abi.h @@ -78,6 +78,7 @@ enum pvrdma_wr_opcode { PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD, PVRDMA_WR_BIND_MW, PVRDMA_WR_REG_SIG_MR, + PVRDMA_WR_ERROR, }; =20 enum pvrdma_wc_status { diff --git a/linux-headers/asm-arm/unistd-common.h b/linux-headers/asm-arm/= unistd-common.h index 8c84bcf10f..3925fc3c56 100644 --- a/linux-headers/asm-arm/unistd-common.h +++ b/linux-headers/asm-arm/unistd-common.h @@ -356,5 +356,27 @@ #define __NR_statx (__NR_SYSCALL_BASE + 397) #define __NR_rseq (__NR_SYSCALL_BASE + 398) #define __NR_io_pgetevents (__NR_SYSCALL_BASE + 399) +#define __NR_migrate_pages (__NR_SYSCALL_BASE + 400) +#define __NR_kexec_file_load (__NR_SYSCALL_BASE + 401) +#define __NR_clock_gettime64 (__NR_SYSCALL_BASE + 403) +#define __NR_clock_settime64 (__NR_SYSCALL_BASE + 404) +#define __NR_clock_adjtime64 (__NR_SYSCALL_BASE + 405) +#define __NR_clock_getres_time64 (__NR_SYSCALL_BASE + 406) +#define __NR_clock_nanosleep_time64 (__NR_SYSCALL_BASE + 407) +#define __NR_timer_gettime64 (__NR_SYSCALL_BASE + 408) +#define __NR_timer_settime64 (__NR_SYSCALL_BASE + 409) +#define __NR_timerfd_gettime64 (__NR_SYSCALL_BASE + 410) +#define __NR_timerfd_settime64 (__NR_SYSCALL_BASE + 411) +#define __NR_utimensat_time64 (__NR_SYSCALL_BASE + 412) +#define __NR_pselect6_time64 (__NR_SYSCALL_BASE + 413) +#define __NR_ppoll_time64 (__NR_SYSCALL_BASE + 414) +#define __NR_io_pgetevents_time64 (__NR_SYSCALL_BASE + 416) +#define __NR_recvmmsg_time64 (__NR_SYSCALL_BASE + 417) +#define __NR_mq_timedsend_time64 (__NR_SYSCALL_BASE + 418) +#define __NR_mq_timedreceive_time64 (__NR_SYSCALL_BASE + 419) +#define __NR_semtimedop_time64 (__NR_SYSCALL_BASE + 420) +#define __NR_rt_sigtimedwait_time64 (__NR_SYSCALL_BASE + 421) +#define __NR_futex_time64 (__NR_SYSCALL_BASE + 422) +#define __NR_sched_rr_get_interval_time64 (__NR_SYSCALL_BASE + 423) =20 #endif /* _ASM_ARM_UNISTD_COMMON_H */ diff --git a/linux-headers/asm-arm64/unistd.h b/linux-headers/asm-arm64/uni= std.h index dae1584cf0..4703d21866 100644 --- a/linux-headers/asm-arm64/unistd.h +++ b/linux-headers/asm-arm64/unistd.h @@ -17,5 +17,7 @@ =20 #define __ARCH_WANT_RENAMEAT #define __ARCH_WANT_NEW_STAT +#define __ARCH_WANT_SET_GET_RLIMIT +#define __ARCH_WANT_TIME32_SYSCALLS =20 #include diff --git a/linux-headers/asm-generic/unistd.h b/linux-headers/asm-generic= /unistd.h index d90127298f..dee7292e1d 100644 --- a/linux-headers/asm-generic/unistd.h +++ b/linux-headers/asm-generic/unistd.h @@ -38,8 +38,10 @@ __SYSCALL(__NR_io_destroy, sys_io_destroy) __SC_COMP(__NR_io_submit, sys_io_submit, compat_sys_io_submit) #define __NR_io_cancel 3 __SYSCALL(__NR_io_cancel, sys_io_cancel) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_io_getevents 4 -__SC_COMP(__NR_io_getevents, sys_io_getevents, compat_sys_io_getevents) +__SC_3264(__NR_io_getevents, sys_io_getevents_time32, sys_io_getevents) +#endif =20 /* fs/xattr.c */ #define __NR_setxattr 5 @@ -179,7 +181,7 @@ __SYSCALL(__NR_fchownat, sys_fchownat) #define __NR_fchown 55 __SYSCALL(__NR_fchown, sys_fchown) #define __NR_openat 56 -__SC_COMP(__NR_openat, sys_openat, compat_sys_openat) +__SYSCALL(__NR_openat, sys_openat) #define __NR_close 57 __SYSCALL(__NR_close, sys_close) #define __NR_vhangup 58 @@ -222,10 +224,12 @@ __SC_COMP(__NR_pwritev, sys_pwritev, compat_sys_pwrit= ev) __SYSCALL(__NR3264_sendfile, sys_sendfile64) =20 /* fs/select.c */ +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_pselect6 72 -__SC_COMP(__NR_pselect6, sys_pselect6, compat_sys_pselect6) +__SC_COMP_3264(__NR_pselect6, sys_pselect6_time32, sys_pselect6, compat_sy= s_pselect6_time32) #define __NR_ppoll 73 -__SC_COMP(__NR_ppoll, sys_ppoll, compat_sys_ppoll) +__SC_COMP_3264(__NR_ppoll, sys_ppoll_time32, sys_ppoll, compat_sys_ppoll_t= ime32) +#endif =20 /* fs/signalfd.c */ #define __NR_signalfd4 74 @@ -269,16 +273,20 @@ __SC_COMP(__NR_sync_file_range, sys_sync_file_range, \ /* fs/timerfd.c */ #define __NR_timerfd_create 85 __SYSCALL(__NR_timerfd_create, sys_timerfd_create) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_timerfd_settime 86 -__SC_COMP(__NR_timerfd_settime, sys_timerfd_settime, \ - compat_sys_timerfd_settime) +__SC_3264(__NR_timerfd_settime, sys_timerfd_settime32, \ + sys_timerfd_settime) #define __NR_timerfd_gettime 87 -__SC_COMP(__NR_timerfd_gettime, sys_timerfd_gettime, \ - compat_sys_timerfd_gettime) +__SC_3264(__NR_timerfd_gettime, sys_timerfd_gettime32, \ + sys_timerfd_gettime) +#endif =20 /* fs/utimes.c */ +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_utimensat 88 -__SC_COMP(__NR_utimensat, sys_utimensat, compat_sys_utimensat) +__SC_3264(__NR_utimensat, sys_utimensat_time32, sys_utimensat) +#endif =20 /* kernel/acct.c */ #define __NR_acct 89 @@ -309,8 +317,10 @@ __SYSCALL(__NR_set_tid_address, sys_set_tid_address) __SYSCALL(__NR_unshare, sys_unshare) =20 /* kernel/futex.c */ +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_futex 98 -__SC_COMP(__NR_futex, sys_futex, compat_sys_futex) +__SC_3264(__NR_futex, sys_futex_time32, sys_futex) +#endif #define __NR_set_robust_list 99 __SC_COMP(__NR_set_robust_list, sys_set_robust_list, \ compat_sys_set_robust_list) @@ -319,8 +329,10 @@ __SC_COMP(__NR_get_robust_list, sys_get_robust_list, \ compat_sys_get_robust_list) =20 /* kernel/hrtimer.c */ +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_nanosleep 101 -__SC_COMP(__NR_nanosleep, sys_nanosleep, compat_sys_nanosleep) +__SC_3264(__NR_nanosleep, sys_nanosleep_time32, sys_nanosleep) +#endif =20 /* kernel/itimer.c */ #define __NR_getitimer 102 @@ -341,23 +353,29 @@ __SYSCALL(__NR_delete_module, sys_delete_module) /* kernel/posix-timers.c */ #define __NR_timer_create 107 __SC_COMP(__NR_timer_create, sys_timer_create, compat_sys_timer_create) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_timer_gettime 108 -__SC_COMP(__NR_timer_gettime, sys_timer_gettime, compat_sys_timer_gettime) +__SC_3264(__NR_timer_gettime, sys_timer_gettime32, sys_timer_gettime) +#endif #define __NR_timer_getoverrun 109 __SYSCALL(__NR_timer_getoverrun, sys_timer_getoverrun) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_timer_settime 110 -__SC_COMP(__NR_timer_settime, sys_timer_settime, compat_sys_timer_settime) +__SC_3264(__NR_timer_settime, sys_timer_settime32, sys_timer_settime) +#endif #define __NR_timer_delete 111 __SYSCALL(__NR_timer_delete, sys_timer_delete) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_clock_settime 112 -__SC_COMP(__NR_clock_settime, sys_clock_settime, compat_sys_clock_settime) +__SC_3264(__NR_clock_settime, sys_clock_settime32, sys_clock_settime) #define __NR_clock_gettime 113 -__SC_COMP(__NR_clock_gettime, sys_clock_gettime, compat_sys_clock_gettime) +__SC_3264(__NR_clock_gettime, sys_clock_gettime32, sys_clock_gettime) #define __NR_clock_getres 114 -__SC_COMP(__NR_clock_getres, sys_clock_getres, compat_sys_clock_getres) +__SC_3264(__NR_clock_getres, sys_clock_getres_time32, sys_clock_getres) #define __NR_clock_nanosleep 115 -__SC_COMP(__NR_clock_nanosleep, sys_clock_nanosleep, \ - compat_sys_clock_nanosleep) +__SC_3264(__NR_clock_nanosleep, sys_clock_nanosleep_time32, \ + sys_clock_nanosleep) +#endif =20 /* kernel/printk.c */ #define __NR_syslog 116 @@ -388,9 +406,11 @@ __SYSCALL(__NR_sched_yield, sys_sched_yield) __SYSCALL(__NR_sched_get_priority_max, sys_sched_get_priority_max) #define __NR_sched_get_priority_min 126 __SYSCALL(__NR_sched_get_priority_min, sys_sched_get_priority_min) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_sched_rr_get_interval 127 -__SC_COMP(__NR_sched_rr_get_interval, sys_sched_rr_get_interval, \ - compat_sys_sched_rr_get_interval) +__SC_3264(__NR_sched_rr_get_interval, sys_sched_rr_get_interval_time32, \ + sys_sched_rr_get_interval) +#endif =20 /* kernel/signal.c */ #define __NR_restart_syscall 128 @@ -411,9 +431,11 @@ __SC_COMP(__NR_rt_sigaction, sys_rt_sigaction, compat_= sys_rt_sigaction) __SC_COMP(__NR_rt_sigprocmask, sys_rt_sigprocmask, compat_sys_rt_sigprocma= sk) #define __NR_rt_sigpending 136 __SC_COMP(__NR_rt_sigpending, sys_rt_sigpending, compat_sys_rt_sigpending) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_rt_sigtimedwait 137 -__SC_COMP(__NR_rt_sigtimedwait, sys_rt_sigtimedwait, \ - compat_sys_rt_sigtimedwait) +__SC_COMP_3264(__NR_rt_sigtimedwait, sys_rt_sigtimedwait_time32, \ + sys_rt_sigtimedwait, compat_sys_rt_sigtimedwait_time32) +#endif #define __NR_rt_sigqueueinfo 138 __SC_COMP(__NR_rt_sigqueueinfo, sys_rt_sigqueueinfo, \ compat_sys_rt_sigqueueinfo) @@ -467,10 +489,15 @@ __SYSCALL(__NR_uname, sys_newuname) __SYSCALL(__NR_sethostname, sys_sethostname) #define __NR_setdomainname 162 __SYSCALL(__NR_setdomainname, sys_setdomainname) + +#ifdef __ARCH_WANT_SET_GET_RLIMIT +/* getrlimit and setrlimit are superseded with prlimit64 */ #define __NR_getrlimit 163 __SC_COMP(__NR_getrlimit, sys_getrlimit, compat_sys_getrlimit) #define __NR_setrlimit 164 __SC_COMP(__NR_setrlimit, sys_setrlimit, compat_sys_setrlimit) +#endif + #define __NR_getrusage 165 __SC_COMP(__NR_getrusage, sys_getrusage, compat_sys_getrusage) #define __NR_umask 166 @@ -481,12 +508,14 @@ __SYSCALL(__NR_prctl, sys_prctl) __SYSCALL(__NR_getcpu, sys_getcpu) =20 /* kernel/time.c */ +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_gettimeofday 169 __SC_COMP(__NR_gettimeofday, sys_gettimeofday, compat_sys_gettimeofday) #define __NR_settimeofday 170 __SC_COMP(__NR_settimeofday, sys_settimeofday, compat_sys_settimeofday) #define __NR_adjtimex 171 -__SC_COMP(__NR_adjtimex, sys_adjtimex, compat_sys_adjtimex) +__SC_3264(__NR_adjtimex, sys_adjtimex_time32, sys_adjtimex) +#endif =20 /* kernel/timer.c */ #define __NR_getpid 172 @@ -511,11 +540,13 @@ __SC_COMP(__NR_sysinfo, sys_sysinfo, compat_sys_sysin= fo) __SC_COMP(__NR_mq_open, sys_mq_open, compat_sys_mq_open) #define __NR_mq_unlink 181 __SYSCALL(__NR_mq_unlink, sys_mq_unlink) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_mq_timedsend 182 -__SC_COMP(__NR_mq_timedsend, sys_mq_timedsend, compat_sys_mq_timedsend) +__SC_3264(__NR_mq_timedsend, sys_mq_timedsend_time32, sys_mq_timedsend) #define __NR_mq_timedreceive 183 -__SC_COMP(__NR_mq_timedreceive, sys_mq_timedreceive, \ - compat_sys_mq_timedreceive) +__SC_3264(__NR_mq_timedreceive, sys_mq_timedreceive_time32, \ + sys_mq_timedreceive) +#endif #define __NR_mq_notify 184 __SC_COMP(__NR_mq_notify, sys_mq_notify, compat_sys_mq_notify) #define __NR_mq_getsetattr 185 @@ -536,8 +567,10 @@ __SC_COMP(__NR_msgsnd, sys_msgsnd, compat_sys_msgsnd) __SYSCALL(__NR_semget, sys_semget) #define __NR_semctl 191 __SC_COMP(__NR_semctl, sys_semctl, compat_sys_semctl) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_semtimedop 192 -__SC_COMP(__NR_semtimedop, sys_semtimedop, compat_sys_semtimedop) +__SC_COMP(__NR_semtimedop, sys_semtimedop, sys_semtimedop_time32) +#endif #define __NR_semop 193 __SYSCALL(__NR_semop, sys_semop) =20 @@ -658,8 +691,10 @@ __SC_COMP(__NR_rt_tgsigqueueinfo, sys_rt_tgsigqueueinf= o, \ __SYSCALL(__NR_perf_event_open, sys_perf_event_open) #define __NR_accept4 242 __SYSCALL(__NR_accept4, sys_accept4) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_recvmmsg 243 -__SC_COMP(__NR_recvmmsg, sys_recvmmsg, compat_sys_recvmmsg) +__SC_COMP_3264(__NR_recvmmsg, sys_recvmmsg_time32, sys_recvmmsg, compat_sy= s_recvmmsg_time32) +#endif =20 /* * Architectures may provide up to 16 syscalls of their own @@ -667,8 +702,10 @@ __SC_COMP(__NR_recvmmsg, sys_recvmmsg, compat_sys_recv= mmsg) */ #define __NR_arch_specific_syscall 244 =20 +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_wait4 260 __SC_COMP(__NR_wait4, sys_wait4, compat_sys_wait4) +#endif #define __NR_prlimit64 261 __SYSCALL(__NR_prlimit64, sys_prlimit64) #define __NR_fanotify_init 262 @@ -678,10 +715,11 @@ __SYSCALL(__NR_fanotify_mark, sys_fanotify_mark) #define __NR_name_to_handle_at 264 __SYSCALL(__NR_name_to_handle_at, sys_name_to_handle_at) #define __NR_open_by_handle_at 265 -__SC_COMP(__NR_open_by_handle_at, sys_open_by_handle_at, \ - compat_sys_open_by_handle_at) +__SYSCALL(__NR_open_by_handle_at, sys_open_by_handle_at) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_clock_adjtime 266 -__SC_COMP(__NR_clock_adjtime, sys_clock_adjtime, compat_sys_clock_adjtime) +__SC_3264(__NR_clock_adjtime, sys_clock_adjtime32, sys_clock_adjtime) +#endif #define __NR_syncfs 267 __SYSCALL(__NR_syncfs, sys_syncfs) #define __NR_setns 268 @@ -734,15 +772,69 @@ __SYSCALL(__NR_pkey_alloc, sys_pkey_alloc) __SYSCALL(__NR_pkey_free, sys_pkey_free) #define __NR_statx 291 __SYSCALL(__NR_statx, sys_statx) +#if defined(__ARCH_WANT_TIME32_SYSCALLS) || __BITS_PER_LONG !=3D 32 #define __NR_io_pgetevents 292 -__SC_COMP(__NR_io_pgetevents, sys_io_pgetevents, compat_sys_io_pgetevents) +__SC_COMP_3264(__NR_io_pgetevents, sys_io_pgetevents_time32, sys_io_pgetev= ents, compat_sys_io_pgetevents) +#endif #define __NR_rseq 293 __SYSCALL(__NR_rseq, sys_rseq) #define __NR_kexec_file_load 294 __SYSCALL(__NR_kexec_file_load, sys_kexec_file_load) +/* 295 through 402 are unassigned to sync up with generic numbers, don't u= se */ +#if __BITS_PER_LONG =3D=3D 32 +#define __NR_clock_gettime64 403 +__SYSCALL(__NR_clock_gettime64, sys_clock_gettime) +#define __NR_clock_settime64 404 +__SYSCALL(__NR_clock_settime64, sys_clock_settime) +#define __NR_clock_adjtime64 405 +__SYSCALL(__NR_clock_adjtime64, sys_clock_adjtime) +#define __NR_clock_getres_time64 406 +__SYSCALL(__NR_clock_getres_time64, sys_clock_getres) +#define __NR_clock_nanosleep_time64 407 +__SYSCALL(__NR_clock_nanosleep_time64, sys_clock_nanosleep) +#define __NR_timer_gettime64 408 +__SYSCALL(__NR_timer_gettime64, sys_timer_gettime) +#define __NR_timer_settime64 409 +__SYSCALL(__NR_timer_settime64, sys_timer_settime) +#define __NR_timerfd_gettime64 410 +__SYSCALL(__NR_timerfd_gettime64, sys_timerfd_gettime) +#define __NR_timerfd_settime64 411 +__SYSCALL(__NR_timerfd_settime64, sys_timerfd_settime) +#define __NR_utimensat_time64 412 +__SYSCALL(__NR_utimensat_time64, sys_utimensat) +#define __NR_pselect6_time64 413 +__SC_COMP(__NR_pselect6_time64, sys_pselect6, compat_sys_pselect6_time64) +#define __NR_ppoll_time64 414 +__SC_COMP(__NR_ppoll_time64, sys_ppoll, compat_sys_ppoll_time64) +#define __NR_io_pgetevents_time64 416 +__SYSCALL(__NR_io_pgetevents_time64, sys_io_pgetevents) +#define __NR_recvmmsg_time64 417 +__SC_COMP(__NR_recvmmsg_time64, sys_recvmmsg, compat_sys_recvmmsg_time64) +#define __NR_mq_timedsend_time64 418 +__SYSCALL(__NR_mq_timedsend_time64, sys_mq_timedsend) +#define __NR_mq_timedreceive_time64 419 +__SYSCALL(__NR_mq_timedreceive_time64, sys_mq_timedreceive) +#define __NR_semtimedop_time64 420 +__SYSCALL(__NR_semtimedop_time64, sys_semtimedop) +#define __NR_rt_sigtimedwait_time64 421 +__SC_COMP(__NR_rt_sigtimedwait_time64, sys_rt_sigtimedwait, compat_sys_rt_= sigtimedwait_time64) +#define __NR_futex_time64 422 +__SYSCALL(__NR_futex_time64, sys_futex) +#define __NR_sched_rr_get_interval_time64 423 +__SYSCALL(__NR_sched_rr_get_interval_time64, sys_sched_rr_get_interval) +#endif + +#define __NR_pidfd_send_signal 424 +__SYSCALL(__NR_pidfd_send_signal, sys_pidfd_send_signal) +#define __NR_io_uring_setup 425 +__SYSCALL(__NR_io_uring_setup, sys_io_uring_setup) +#define __NR_io_uring_enter 426 +__SYSCALL(__NR_io_uring_enter, sys_io_uring_enter) +#define __NR_io_uring_register 427 +__SYSCALL(__NR_io_uring_register, sys_io_uring_register) =20 #undef __NR_syscalls -#define __NR_syscalls 295 +#define __NR_syscalls 428 =20 /* * 32 bit systems traditionally used different diff --git a/linux-headers/asm-mips/unistd_n32.h b/linux-headers/asm-mips/u= nistd_n32.h index b744f4d520..cd643cdee6 100644 --- a/linux-headers/asm-mips/unistd_n32.h +++ b/linux-headers/asm-mips/unistd_n32.h @@ -333,6 +333,26 @@ #define __NR_statx (__NR_Linux + 330) #define __NR_rseq (__NR_Linux + 331) #define __NR_io_pgetevents (__NR_Linux + 332) +#define __NR_clock_gettime64 (__NR_Linux + 403) +#define __NR_clock_settime64 (__NR_Linux + 404) +#define __NR_clock_adjtime64 (__NR_Linux + 405) +#define __NR_clock_getres_time64 (__NR_Linux + 406) +#define __NR_clock_nanosleep_time64 (__NR_Linux + 407) +#define __NR_timer_gettime64 (__NR_Linux + 408) +#define __NR_timer_settime64 (__NR_Linux + 409) +#define __NR_timerfd_gettime64 (__NR_Linux + 410) +#define __NR_timerfd_settime64 (__NR_Linux + 411) +#define __NR_utimensat_time64 (__NR_Linux + 412) +#define __NR_pselect6_time64 (__NR_Linux + 413) +#define __NR_ppoll_time64 (__NR_Linux + 414) +#define __NR_io_pgetevents_time64 (__NR_Linux + 416) +#define __NR_recvmmsg_time64 (__NR_Linux + 417) +#define __NR_mq_timedsend_time64 (__NR_Linux + 418) +#define __NR_mq_timedreceive_time64 (__NR_Linux + 419) +#define __NR_semtimedop_time64 (__NR_Linux + 420) +#define __NR_rt_sigtimedwait_time64 (__NR_Linux + 421) +#define __NR_futex_time64 (__NR_Linux + 422) +#define __NR_sched_rr_get_interval_time64 (__NR_Linux + 423) =20 =20 #endif /* _ASM_MIPS_UNISTD_N32_H */ diff --git a/linux-headers/asm-mips/unistd_o32.h b/linux-headers/asm-mips/u= nistd_o32.h index b03835b286..85ed407337 100644 --- a/linux-headers/asm-mips/unistd_o32.h +++ b/linux-headers/asm-mips/unistd_o32.h @@ -369,6 +369,36 @@ #define __NR_statx (__NR_Linux + 366) #define __NR_rseq (__NR_Linux + 367) #define __NR_io_pgetevents (__NR_Linux + 368) +#define __NR_semget (__NR_Linux + 393) +#define __NR_semctl (__NR_Linux + 394) +#define __NR_shmget (__NR_Linux + 395) +#define __NR_shmctl (__NR_Linux + 396) +#define __NR_shmat (__NR_Linux + 397) +#define __NR_shmdt (__NR_Linux + 398) +#define __NR_msgget (__NR_Linux + 399) +#define __NR_msgsnd (__NR_Linux + 400) +#define __NR_msgrcv (__NR_Linux + 401) +#define __NR_msgctl (__NR_Linux + 402) +#define __NR_clock_gettime64 (__NR_Linux + 403) +#define __NR_clock_settime64 (__NR_Linux + 404) +#define __NR_clock_adjtime64 (__NR_Linux + 405) +#define __NR_clock_getres_time64 (__NR_Linux + 406) +#define __NR_clock_nanosleep_time64 (__NR_Linux + 407) +#define __NR_timer_gettime64 (__NR_Linux + 408) +#define __NR_timer_settime64 (__NR_Linux + 409) +#define __NR_timerfd_gettime64 (__NR_Linux + 410) +#define __NR_timerfd_settime64 (__NR_Linux + 411) +#define __NR_utimensat_time64 (__NR_Linux + 412) +#define __NR_pselect6_time64 (__NR_Linux + 413) +#define __NR_ppoll_time64 (__NR_Linux + 414) +#define __NR_io_pgetevents_time64 (__NR_Linux + 416) +#define __NR_recvmmsg_time64 (__NR_Linux + 417) +#define __NR_mq_timedsend_time64 (__NR_Linux + 418) +#define __NR_mq_timedreceive_time64 (__NR_Linux + 419) +#define __NR_semtimedop_time64 (__NR_Linux + 420) +#define __NR_rt_sigtimedwait_time64 (__NR_Linux + 421) +#define __NR_futex_time64 (__NR_Linux + 422) +#define __NR_sched_rr_get_interval_time64 (__NR_Linux + 423) =20 =20 #endif /* _ASM_MIPS_UNISTD_O32_H */ diff --git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kv= m.h index 8c876c166e..26ca425f4c 100644 --- a/linux-headers/asm-powerpc/kvm.h +++ b/linux-headers/asm-powerpc/kvm.h @@ -463,10 +463,12 @@ struct kvm_ppc_cpu_char { #define KVM_PPC_CPU_CHAR_BR_HINT_HONOURED (1ULL << 58) #define KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF (1ULL << 57) #define KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS (1ULL << 56) +#define KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST (1ull << 54) =20 #define KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY (1ULL << 63) #define KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR (1ULL << 62) #define KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR (1ULL << 61) +#define KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE (1ull << 58) =20 /* Per-vcpu XICS interrupt controller state */ #define KVM_REG_PPC_ICP_STATE (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x8c) diff --git a/linux-headers/asm-powerpc/unistd_32.h b/linux-headers/asm-powe= rpc/unistd_32.h index b8403d700d..94af3329a4 100644 --- a/linux-headers/asm-powerpc/unistd_32.h +++ b/linux-headers/asm-powerpc/unistd_32.h @@ -376,6 +376,36 @@ #define __NR_pkey_mprotect 386 #define __NR_rseq 387 #define __NR_io_pgetevents 388 +#define __NR_semget 393 +#define __NR_semctl 394 +#define __NR_shmget 395 +#define __NR_shmctl 396 +#define __NR_shmat 397 +#define __NR_shmdt 398 +#define __NR_msgget 399 +#define __NR_msgsnd 400 +#define __NR_msgrcv 401 +#define __NR_msgctl 402 +#define __NR_clock_gettime64 403 +#define __NR_clock_settime64 404 +#define __NR_clock_adjtime64 405 +#define __NR_clock_getres_time64 406 +#define __NR_clock_nanosleep_time64 407 +#define __NR_timer_gettime64 408 +#define __NR_timer_settime64 409 +#define __NR_timerfd_gettime64 410 +#define __NR_timerfd_settime64 411 +#define __NR_utimensat_time64 412 +#define __NR_pselect6_time64 413 +#define __NR_ppoll_time64 414 +#define __NR_io_pgetevents_time64 416 +#define __NR_recvmmsg_time64 417 +#define __NR_mq_timedsend_time64 418 +#define __NR_mq_timedreceive_time64 419 +#define __NR_semtimedop_time64 420 +#define __NR_rt_sigtimedwait_time64 421 +#define __NR_futex_time64 422 +#define __NR_sched_rr_get_interval_time64 423 =20 =20 #endif /* _ASM_POWERPC_UNISTD_32_H */ diff --git a/linux-headers/asm-powerpc/unistd_64.h b/linux-headers/asm-powe= rpc/unistd_64.h index f6a25fbbdd..88340ee130 100644 --- a/linux-headers/asm-powerpc/unistd_64.h +++ b/linux-headers/asm-powerpc/unistd_64.h @@ -367,6 +367,17 @@ #define __NR_pkey_mprotect 386 #define __NR_rseq 387 #define __NR_io_pgetevents 388 +#define __NR_semtimedop 392 +#define __NR_semget 393 +#define __NR_semctl 394 +#define __NR_shmget 395 +#define __NR_shmctl 396 +#define __NR_shmat 397 +#define __NR_shmdt 398 +#define __NR_msgget 399 +#define __NR_msgsnd 400 +#define __NR_msgrcv 401 +#define __NR_msgctl 402 =20 =20 #endif /* _ASM_POWERPC_UNISTD_64_H */ diff --git a/linux-headers/asm-s390/unistd_32.h b/linux-headers/asm-s390/un= istd_32.h index 514e302ba1..9421d0f00a 100644 --- a/linux-headers/asm-s390/unistd_32.h +++ b/linux-headers/asm-s390/unistd_32.h @@ -363,5 +363,38 @@ #define __NR_kexec_file_load 381 #define __NR_io_pgetevents 382 #define __NR_rseq 383 +#define __NR_pkey_mprotect 384 +#define __NR_pkey_alloc 385 +#define __NR_pkey_free 386 +#define __NR_semget 393 +#define __NR_semctl 394 +#define __NR_shmget 395 +#define __NR_shmctl 396 +#define __NR_shmat 397 +#define __NR_shmdt 398 +#define __NR_msgget 399 +#define __NR_msgsnd 400 +#define __NR_msgrcv 401 +#define __NR_msgctl 402 +#define __NR_clock_gettime64 403 +#define __NR_clock_settime64 404 +#define __NR_clock_adjtime64 405 +#define __NR_clock_getres_time64 406 +#define __NR_clock_nanosleep_time64 407 +#define __NR_timer_gettime64 408 +#define __NR_timer_settime64 409 +#define __NR_timerfd_gettime64 410 +#define __NR_timerfd_settime64 411 +#define __NR_utimensat_time64 412 +#define __NR_pselect6_time64 413 +#define __NR_ppoll_time64 414 +#define __NR_io_pgetevents_time64 416 +#define __NR_recvmmsg_time64 417 +#define __NR_mq_timedsend_time64 418 +#define __NR_mq_timedreceive_time64 419 +#define __NR_semtimedop_time64 420 +#define __NR_rt_sigtimedwait_time64 421 +#define __NR_futex_time64 422 +#define __NR_sched_rr_get_interval_time64 423 =20 #endif /* _ASM_S390_UNISTD_32_H */ diff --git a/linux-headers/asm-s390/unistd_64.h b/linux-headers/asm-s390/un= istd_64.h index d2b73de0ed..6d59397a37 100644 --- a/linux-headers/asm-s390/unistd_64.h +++ b/linux-headers/asm-s390/unistd_64.h @@ -330,5 +330,19 @@ #define __NR_kexec_file_load 381 #define __NR_io_pgetevents 382 #define __NR_rseq 383 +#define __NR_pkey_mprotect 384 +#define __NR_pkey_alloc 385 +#define __NR_pkey_free 386 +#define __NR_semtimedop 392 +#define __NR_semget 393 +#define __NR_semctl 394 +#define __NR_shmget 395 +#define __NR_shmctl 396 +#define __NR_shmat 397 +#define __NR_shmdt 398 +#define __NR_msgget 399 +#define __NR_msgsnd 400 +#define __NR_msgrcv 401 +#define __NR_msgctl 402 =20 #endif /* _ASM_S390_UNISTD_64_H */ diff --git a/linux-headers/asm-x86/unistd_32.h b/linux-headers/asm-x86/unis= td_32.h index c1b30a0cf4..e71e53b32b 100644 --- a/linux-headers/asm-x86/unistd_32.h +++ b/linux-headers/asm-x86/unistd_32.h @@ -384,5 +384,39 @@ #define __NR_arch_prctl 384 #define __NR_io_pgetevents 385 #define __NR_rseq 386 +#define __NR_semget 393 +#define __NR_semctl 394 +#define __NR_shmget 395 +#define __NR_shmctl 396 +#define __NR_shmat 397 +#define __NR_shmdt 398 +#define __NR_msgget 399 +#define __NR_msgsnd 400 +#define __NR_msgrcv 401 +#define __NR_msgctl 402 +#define __NR_clock_gettime64 403 +#define __NR_clock_settime64 404 +#define __NR_clock_adjtime64 405 +#define __NR_clock_getres_time64 406 +#define __NR_clock_nanosleep_time64 407 +#define __NR_timer_gettime64 408 +#define __NR_timer_settime64 409 +#define __NR_timerfd_gettime64 410 +#define __NR_timerfd_settime64 411 +#define __NR_utimensat_time64 412 +#define __NR_pselect6_time64 413 +#define __NR_ppoll_time64 414 +#define __NR_io_pgetevents_time64 416 +#define __NR_recvmmsg_time64 417 +#define __NR_mq_timedsend_time64 418 +#define __NR_mq_timedreceive_time64 419 +#define __NR_semtimedop_time64 420 +#define __NR_rt_sigtimedwait_time64 421 +#define __NR_futex_time64 422 +#define __NR_sched_rr_get_interval_time64 423 +#define __NR_pidfd_send_signal 424 +#define __NR_io_uring_setup 425 +#define __NR_io_uring_enter 426 +#define __NR_io_uring_register 427 =20 #endif /* _ASM_X86_UNISTD_32_H */ diff --git a/linux-headers/asm-x86/unistd_64.h b/linux-headers/asm-x86/unis= td_64.h index c2e464c115..5a7e5b73ff 100644 --- a/linux-headers/asm-x86/unistd_64.h +++ b/linux-headers/asm-x86/unistd_64.h @@ -336,5 +336,9 @@ #define __NR_statx 332 #define __NR_io_pgetevents 333 #define __NR_rseq 334 +#define __NR_pidfd_send_signal 424 +#define __NR_io_uring_setup 425 +#define __NR_io_uring_enter 426 +#define __NR_io_uring_register 427 =20 #endif /* _ASM_X86_UNISTD_64_H */ diff --git a/linux-headers/asm-x86/unistd_x32.h b/linux-headers/asm-x86/uni= std_x32.h index 37229021f0..0e98f43921 100644 --- a/linux-headers/asm-x86/unistd_x32.h +++ b/linux-headers/asm-x86/unistd_x32.h @@ -289,6 +289,10 @@ #define __NR_statx (__X32_SYSCALL_BIT + 332) #define __NR_io_pgetevents (__X32_SYSCALL_BIT + 333) #define __NR_rseq (__X32_SYSCALL_BIT + 334) +#define __NR_pidfd_send_signal (__X32_SYSCALL_BIT + 424) +#define __NR_io_uring_setup (__X32_SYSCALL_BIT + 425) +#define __NR_io_uring_enter (__X32_SYSCALL_BIT + 426) +#define __NR_io_uring_register (__X32_SYSCALL_BIT + 427) #define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512) #define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513) #define __NR_ioctl (__X32_SYSCALL_BIT + 514) diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h index 12a7b1dc53..a32bd350b5 100644 --- a/linux-headers/linux/vfio.h +++ b/linux-headers/linux/vfio.h @@ -14,6 +14,7 @@ =20 #include #include +#include =20 #define VFIO_API_VERSION 0 =20 @@ -306,6 +307,10 @@ struct vfio_region_info_cap_type { #define VFIO_REGION_TYPE_GFX (1) #define VFIO_REGION_SUBTYPE_GFX_EDID (1) =20 +#define VFIO_REGION_TYPE_NESTED (2) +#define VFIO_REGION_SUBTYPE_NESTED_FAULT_PROD (1) +#define VFIO_REGION_SUBTYPE_NESTED_FAULT_CONS (2) + /** * struct vfio_region_gfx_edid - EDID region layout. * @@ -550,6 +555,7 @@ enum { VFIO_PCI_MSIX_IRQ_INDEX, VFIO_PCI_ERR_IRQ_INDEX, VFIO_PCI_REQ_IRQ_INDEX, + VFIO_PCI_DMA_FAULT_IRQ_INDEX, VFIO_PCI_NUM_IRQS }; =20 @@ -696,6 +702,44 @@ struct vfio_device_ioeventfd { =20 #define VFIO_DEVICE_IOEVENTFD _IO(VFIO_TYPE, VFIO_BASE + 16) =20 + +/* + * Capability exposed by the Producer Fault Region + * @version: max fault ABI version supported by the kernel + */ +#define VFIO_REGION_INFO_CAP_PRODUCER_FAULT 6 + +struct vfio_region_info_cap_fault { + struct vfio_info_cap_header header; + __u32 version; +}; + +/* + * Producer Fault Region (Read-Only from user space perspective) + * Contains the fault circular buffer and the producer index + * @version: version of the fault record uapi + * @entry_size: size of each fault record + * @offset: offset of the start of the queue + * @prod: producer index relative to the start of the queue + */ +struct vfio_region_fault_prod { + __u32 version; + __u32 nb_entries; + __u32 entry_size; + __u32 offset; + __u32 prod; +}; + +/* + * Consumer Fault Region (Write-Only from the user space perspective) + * @version: ABI version requested by the userspace + * @cons: consumer index relative to the start of the queue + */ +struct vfio_region_fault_cons { + __u32 version; + __u32 cons; +}; + /* -------- API for Type1 VFIO IOMMU -------- */ =20 /** @@ -759,6 +803,69 @@ struct vfio_iommu_type1_dma_unmap { #define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15) #define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16) =20 +/** + * VFIO_IOMMU_ATTACH_PASID_TABLE - _IOWR(VFIO_TYPE, VFIO_BASE + 22, + * struct vfio_iommu_type1_attach_pasid_table) + * + * Passes the PASID table to the host. Calling ATTACH_PASID_TABLE + * while a table is already installed is allowed: it replaces the old + * table. DETACH does a comprehensive tear down of the nested mode. + */ +struct vfio_iommu_type1_attach_pasid_table { + __u32 argsz; + __u32 flags; + struct iommu_pasid_table_config config; +}; +#define VFIO_IOMMU_ATTACH_PASID_TABLE _IO(VFIO_TYPE, VFIO_BASE + 22) + +/** + * VFIO_IOMMU_DETACH_PASID_TABLE - - _IOWR(VFIO_TYPE, VFIO_BASE + 23) + * Detaches the PASID table + */ +#define VFIO_IOMMU_DETACH_PASID_TABLE _IO(VFIO_TYPE, VFIO_BASE + 23) + +/** + * VFIO_IOMMU_CACHE_INVALIDATE - _IOWR(VFIO_TYPE, VFIO_BASE + 24, + * struct vfio_iommu_type1_cache_invalidate) + * + * Propagate guest IOMMU cache invalidation to the host. + */ +struct vfio_iommu_type1_cache_invalidate { + __u32 argsz; + __u32 flags; + struct iommu_cache_invalidate_info info; +}; +#define VFIO_IOMMU_CACHE_INVALIDATE _IO(VFIO_TYPE, VFIO_BASE + 24) + +/** + * VFIO_IOMMU_BIND_MSI - _IOWR(VFIO_TYPE, VFIO_BASE + 25, + * struct vfio_iommu_type1_bind_msi) + * + * Pass a stage 1 MSI doorbell mapping to the host so that this + * latter can build a nested stage2 mapping + */ +struct vfio_iommu_type1_bind_msi { + __u32 argsz; + __u32 flags; + __u64 iova; + __u64 gpa; + __u64 size; +}; +#define VFIO_IOMMU_BIND_MSI _IO(VFIO_TYPE, VFIO_BASE + 25) + +/** + * VFIO_IOMMU_UNBIND_MSI - _IOWR(VFIO_TYPE, VFIO_BASE + 26, + * struct vfio_iommu_type1_unbind_msi) + * + * Unregister an MSI mapping + */ +struct vfio_iommu_type1_unbind_msi { + __u32 argsz; + __u32 flags; + __u64 iova; +}; +#define VFIO_IOMMU_UNBIND_MSI _IO(VFIO_TYPE, VFIO_BASE + 26) + /* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */ =20 /* diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers= .sh index a310a9072b..d209a41c4d 100755 --- a/scripts/update-linux-headers.sh +++ b/scripts/update-linux-headers.sh @@ -138,7 +138,7 @@ done =20 rm -rf "$output/linux-headers/linux" mkdir -p "$output/linux-headers/linux" -for header in kvm.h vfio.h vfio_ccw.h vhost.h \ +for header in kvm.h vfio.h vfio_ccw.h vhost.h iommu.h \ psci.h psp-sev.h userfaultfd.h; do cp "$tmpdir/include/linux/$header" "$output/linux-headers/linux" done --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:04:39 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 058A83088B82; Fri, 12 Apr 2019 10:04:37 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6550519C65; Fri, 12 Apr 2019 10:04:34 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:31 +0200 Message-Id: <20190412100354.6409-5-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Fri, 12 Apr 2019 10:04:37 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 04/27] header update against 5.1-rc3 and IOMMU/VFIO nested stage APIs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" This is an update against the following development branch: https://github.com/eauger/linux/tree/v5.1-rc3-2stage-v7. Signed-off-by: Eric Auger --- linux-headers/linux/iommu.h | 240 ++++++++++++++++++++++++++++++++++++ 1 file changed, 240 insertions(+) create mode 100644 linux-headers/linux/iommu.h diff --git a/linux-headers/linux/iommu.h b/linux-headers/linux/iommu.h new file mode 100644 index 0000000000..558f3095b9 --- /dev/null +++ b/linux-headers/linux/iommu.h @@ -0,0 +1,240 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * IOMMU user API definitions + */ + +#ifndef _IOMMU_H +#define _IOMMU_H + +#include + +#define IOMMU_FAULT_PERM_WRITE (1 << 0) /* write */ +#define IOMMU_FAULT_PERM_EXEC (1 << 1) /* exec */ +#define IOMMU_FAULT_PERM_PRIV (1 << 2) /* privileged */ + +/* Generic fault types, can be expanded IRQ remapping fault */ +enum iommu_fault_type { + IOMMU_FAULT_DMA_UNRECOV =3D 1, /* unrecoverable fault */ + IOMMU_FAULT_PAGE_REQ, /* page request fault */ +}; + +enum iommu_fault_reason { + IOMMU_FAULT_REASON_UNKNOWN =3D 0, + + /* Could not access the PASID table (fetch caused external abort) */ + IOMMU_FAULT_REASON_PASID_FETCH, + + /* pasid entry is invalid or has configuration errors */ + IOMMU_FAULT_REASON_BAD_PASID_ENTRY, + + /* + * PASID is out of range (e.g. exceeds the maximum PASID + * supported by the IOMMU) or disabled. + */ + IOMMU_FAULT_REASON_PASID_INVALID, + + /* + * An external abort occurred fetching (or updating) a translation + * table descriptor + */ + IOMMU_FAULT_REASON_WALK_EABT, + + /* + * Could not access the page table entry (Bad address), + * actual translation fault + */ + IOMMU_FAULT_REASON_PTE_FETCH, + + /* Protection flag check failed */ + IOMMU_FAULT_REASON_PERMISSION, + + /* access flag check failed */ + IOMMU_FAULT_REASON_ACCESS, + + /* Output address of a translation stage caused Address Size fault */ + IOMMU_FAULT_REASON_OOR_ADDRESS, +}; + +/** + * Unrecoverable fault data + * @reason: reason of the fault + * @addr: offending page address + * @fetch_addr: address that caused a fetch abort, if any + * @pasid: contains process address space ID, used in shared virtual memory + * @perm: Requested permission access using by the incoming transaction + * (IOMMU_FAULT_PERM_* values) + */ +struct iommu_fault_unrecoverable { + __u32 reason; /* enum iommu_fault_reason */ +#define IOMMU_FAULT_UNRECOV_PASID_VALID (1 << 0) +#define IOMMU_FAULT_UNRECOV_PERM_VALID (1 << 1) +#define IOMMU_FAULT_UNRECOV_ADDR_VALID (1 << 2) +#define IOMMU_FAULT_UNRECOV_FETCH_ADDR_VALID (1 << 3) + __u32 flags; + __u32 pasid; + __u32 perm; + __u64 addr; + __u64 fetch_addr; +}; + +/* + * Page Request data (aka. recoverable fault data) + * @flags : encodes whether the pasid is valid and whether this + * is the last page in group + * @pasid: pasid + * @grpid: page request group index + * @perm: requested page permissions (IOMMU_FAULT_PERM_* values) + * @addr: page address + */ +struct iommu_fault_page_request { +#define IOMMU_FAULT_PAGE_REQUEST_PASID_VALID (1 << 0) +#define IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE (1 << 1) +#define IOMMU_FAULT_PAGE_REQUEST_PRIV_DATA (1 << 2) + __u32 flags; + __u32 pasid; + __u32 grpid; + __u32 perm; + __u64 addr; + __u64 private_data[2]; +}; + +/** + * struct iommu_fault - Generic fault data + * + * @type contains fault type + */ + +struct iommu_fault { + __u32 type; /* enum iommu_fault_type */ + __u32 reserved; + union { + struct iommu_fault_unrecoverable event; + struct iommu_fault_page_request prm; + }; +}; + +/** + * SMMUv3 Stream Table Entry stage 1 related information + * The PASID table is referred to as the context descriptor (CD) table. + * + * @s1fmt: STE s1fmt (format of the CD table: single CD, linear table + or 2-level table) + * @s1dss: STE s1dss (specifies the behavior when pasid_bits !=3D 0 + and no pasid is passed along with the incoming transaction) + * Please refer to the smmu 3.x spec (ARM IHI 0070A) for full details + */ +struct iommu_pasid_smmuv3 { +#define PASID_TABLE_SMMUV3_CFG_VERSION_1 1 + __u32 version; + __u8 s1fmt; + __u8 s1dss; + __u8 padding[2]; +}; + +/** + * PASID table data used to bind guest PASID table to the host IOMMU + * Note PASID table corresponds to the Context Table on ARM SMMUv3. + * + * @version: API version to prepare for future extensions + * @format: format of the PASID table + * @base_ptr: guest physical address of the PASID table + * @pasid_bits: number of PASID bits used in the PASID table + * @config: indicates whether the guest translation stage must + * be translated, bypassed or aborted. + */ +struct iommu_pasid_table_config { +#define PASID_TABLE_CFG_VERSION_1 1 + __u32 version; +#define IOMMU_PASID_FORMAT_SMMUV3 1 + __u32 format; + __u64 base_ptr; + __u8 pasid_bits; +#define IOMMU_PASID_CONFIG_TRANSLATE 1 +#define IOMMU_PASID_CONFIG_BYPASS 2 +#define IOMMU_PASID_CONFIG_ABORT 3 + __u8 config; + __u8 padding[6]; + union { + struct iommu_pasid_smmuv3 smmuv3; + }; +}; + +/* defines the granularity of the invalidation */ +enum iommu_inv_granularity { + IOMMU_INV_GRANU_DOMAIN, /* domain-selective invalidation */ + IOMMU_INV_GRANU_PASID, /* pasid-selective invalidation */ + IOMMU_INV_GRANU_ADDR, /* page-selective invalidation */ +}; + +/** + * Address Selective Invalidation Structure + * + * @flags indicates the granularity of the address-selective invalidation + * - if PASID bit is set, @pasid field is populated and the invalidation + * relates to cache entries tagged with this PASID and matching the + * address range. + * - if ARCHID bit is set, @archid is populated and the invalidation relat= es + * to cache entries tagged with this architecture specific id and matchi= ng + * the address range. + * - Both PASID and ARCHID can be set as they may tag different caches. + * - if neither PASID or ARCHID is set, global addr invalidation applies + * - LEAF flag indicates whether only the leaf PTE caching needs to be + * invalidated and other paging structure caches can be preserved. + * @pasid: process address space id + * @archid: architecture-specific id + * @addr: first stage/level input address + * @granule_size: page/block size of the mapping in bytes + * @nb_granules: number of contiguous granules to be invalidated + */ +struct iommu_inv_addr_info { +#define IOMMU_INV_ADDR_FLAGS_PASID (1 << 0) +#define IOMMU_INV_ADDR_FLAGS_ARCHID (1 << 1) +#define IOMMU_INV_ADDR_FLAGS_LEAF (1 << 2) + __u32 flags; + __u32 archid; + __u64 pasid; + __u64 addr; + __u64 granule_size; + __u64 nb_granules; +}; + +/** + * First level/stage invalidation information + * @cache: bitfield that allows to select which caches to invalidate + * @granularity: defines the lowest granularity used for the invalidation: + * domain > pasid > addr + * + * Not all the combinations of cache/granularity make sense: + * + * type | DEV_IOTLB | IOTLB | PASID | + * granularity | | | cache | + * -------------+---------------+---------------+---------------+ + * DOMAIN | N/A | Y | Y | + * PASID | Y | Y | Y | + * ADDR | Y | Y | N/A | + * + * Invalidations by %IOMMU_INV_GRANU_ADDR use field @addr_info. + * Invalidations by %IOMMU_INV_GRANU_PASID use field @pasid. + * Invalidations by %IOMMU_INV_GRANU_DOMAIN don't take any argument. + * + * If multiple cache types are invalidated simultaneously, they all + * must support the used granularity. + */ +struct iommu_cache_invalidate_info { +#define IOMMU_CACHE_INVALIDATE_INFO_VERSION_1 1 + __u32 version; +/* IOMMU paging structure cache */ +#define IOMMU_CACHE_INV_TYPE_IOTLB (1 << 0) /* IOMMU IOTLB */ +#define IOMMU_CACHE_INV_TYPE_DEV_IOTLB (1 << 1) /* Device IOTLB */ +#define IOMMU_CACHE_INV_TYPE_PASID (1 << 2) /* PASID cache */ + __u8 cache; + __u8 granularity; + __u8 padding[2]; + union { + __u64 pasid; + struct iommu_inv_addr_info addr_info; + }; +}; + + +#endif /* _IOMMU_H */ --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555063961; cv=none; d=zoho.com; s=zohoarc; b=FKL82HQF3zYiA415e5lvwblwzSVL9YEY531qHWKHX+vIgAu0+FKVHuzFsd9YTQShxWiK5sqFka10prQdPfI4IbqubtMT/8o2yhioQvUknuACZ33T4/+Z/4g1M+AJ693NwWYrWSjvlGSywUz+ODUmE9G2/+2MPovKyxkqs6t3zE0= ARC-Message-Signature: i=1; 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Fri, 12 Apr 2019 10:04:37 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:32 +0200 Message-Id: <20190412100354.6409-6-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Fri, 12 Apr 2019 10:04:42 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 05/27] memory: add IOMMU_ATTR_VFIO_NESTED IOMMU memory region attribute X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We introduce a new IOMMU Memory Region attribute, IOMMU_ATTR_VFIO_NESTED which tells whether the virtual IOMMU requires physical nested stages for VFIO integration. Intel virtual IOMMU supports Caching Mode and does not require 2 stages at physical level. However virtual ARM SMMU does not implement such caching mode and requires to use physical stage 1 for VFIO integration. Signed-off-by: Eric Auger --- include/exec/memory.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 1625913f84..e4ee1d8b9b 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -204,7 +204,8 @@ struct MemoryRegionOps { }; =20 enum IOMMUMemoryRegionAttr { - IOMMU_ATTR_SPAPR_TCE_FD + IOMMU_ATTR_SPAPR_TCE_FD, + IOMMU_ATTR_VFIO_NESTED, }; =20 /** --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555063896; cv=none; d=zoho.com; s=zohoarc; b=EhzBiNqDbO7FqGsBFdhxFxjUHY55r4Y2L+9IVV64EKzP+nTr9OuFlD7OKNz2UGeIFRYHP9LVT+DXhiKgAObUxFLSHXr+TOd0wy4Gym/dLHO52M0fNmq3BEeg6MqyBwgw+vUm5r5lpekgQcG8l70MnqEIEjE9D2+/EHqP+QTe33U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1555063896; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=nYhtzfw200B1krz2qXZLWSU/OmlfbODwSBf3ari3hyM=; b=eGJap1/mhD37zZSrYfOGQWTmMu5L1RlH9LSBywmDJQtoC4ib2B4MFPNgikmUiPaTFta28EqanpoD9ARZvi9glokqVe2iOOODYO29QtdGcgvyan6gOYzBBAq9q0YxH/9hYqYc1zgpFWhAC6gdKqTSXOXxk/Df1rpjcIIXaEWYEpk= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1555063896781150.7288186357424; Fri, 12 Apr 2019 03:11:36 -0700 (PDT) Received: from localhost ([127.0.0.1]:33625 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt9j-0007al-Nk for importer@patchew.org; Fri, 12 Apr 2019 06:11:35 -0400 Received: from eggs.gnu.org ([209.51.188.92]:37841) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt3K-000178-OJ for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:05:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEt3J-0003vO-Pj for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:04:58 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34964) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEt3G-0003rz-OI; Fri, 12 Apr 2019 06:04:54 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9590B8831E; Fri, 12 Apr 2019 10:04:52 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0554619C65; Fri, 12 Apr 2019 10:04:42 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:33 +0200 Message-Id: <20190412100354.6409-7-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 12 Apr 2019 10:04:52 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 06/27] memory: add IOMMU_ATTR_MSI_TRANSLATE IOMMU memory region attribute X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We introduce a new IOMMU Memory Region attribute, IOMMU_ATTR_MSI_TRANSLATE which tells whether the virtual IOMMU translates MSIs. ARM SMMU will expose this attribute since, as opposed to Intel DMAR, MSIs are translated as any other DMA requests. Signed-off-by: Eric Auger --- include/exec/memory.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/exec/memory.h b/include/exec/memory.h index e4ee1d8b9b..ac4d06379f 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -206,6 +206,7 @@ struct MemoryRegionOps { enum IOMMUMemoryRegionAttr { IOMMU_ATTR_SPAPR_TCE_FD, IOMMU_ATTR_VFIO_NESTED, + IOMMU_ATTR_MSI_TRANSLATE, }; =20 /** --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555063633; cv=none; d=zoho.com; s=zohoarc; b=XwOzH7HxwKto4jITLzxy1teXoi5T1OWrLX/EsXYizSRbk3t4zg3CXzAaz85D8Z2H9RDs5nYt1c05Wt36tzdqwJ15NZu46r1orNAUrDGFRPykno/CsiCTU+G73ExUfueiu83zP8QEJOGfSvpNi9NvjQts0HqfHmBWo1GEgNDI6HQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1555063633; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=2ud7miD3hv8oyFKQaq1ZZmU5YdGSRmc3ihfycLgoemY=; b=jbU9NGDOvh5PhadwiYPME9rGsbBVNkHQMGkRzcSRRxRV+lXqgTceO8k9rYW1RIlejn1oYLdgWaLT3qKArT5otpUh6CZzxdVfNHusJPxQGkeCi/mRLNaiNeGj3wGuezfJ/XpqDDA1keDxokHtBl/CNIizMI56MRWDLPLt0odxNqE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1555063633525353.76771403158193; Fri, 12 Apr 2019 03:07:13 -0700 (PDT) Received: from localhost ([127.0.0.1]:33534 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt5N-00032r-Eg for importer@patchew.org; Fri, 12 Apr 2019 06:07:05 -0400 Received: from eggs.gnu.org ([209.51.188.92]:37861) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt3O-00019a-L5 for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:05:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEt3M-0003xH-Uk for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:05:02 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58870) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEt3I-0003tv-Kt; Fri, 12 Apr 2019 06:04:56 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7BE7881DFE; Fri, 12 Apr 2019 10:04:55 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id EA5CC19728; Fri, 12 Apr 2019 10:04:52 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:34 +0200 Message-Id: <20190412100354.6409-8-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Fri, 12 Apr 2019 10:04:55 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 07/27] hw/arm/smmuv3: Advertise VFIO_NESTED and MSI_TRANSLATE attributes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Virtual SMMUv3 requires physical nested stages for VFIO integration and translates MSIs. So let's advertise those attributes. Signed-off-by: Eric Auger --- v2 -> v3: - also advertise MSI_TRANSLATE --- hw/arm/smmuv3.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index fd8ec7860e..761d722395 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1490,6 +1490,20 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryRe= gion *iommu, } } =20 +static int smmuv3_get_attr(IOMMUMemoryRegion *iommu, + enum IOMMUMemoryRegionAttr attr, + void *data) +{ + if (attr =3D=3D IOMMU_ATTR_VFIO_NESTED) { + *(bool *) data =3D true; + return 0; + } else if (attr =3D=3D IOMMU_ATTR_MSI_TRANSLATE) { + *(bool *) data =3D true; + return 0; + } + return -EINVAL; +} + static void smmuv3_iommu_memory_region_class_init(ObjectClass *klass, void *data) { @@ -1497,6 +1511,7 @@ static void smmuv3_iommu_memory_region_class_init(Obj= ectClass *klass, =20 imrc->translate =3D smmuv3_translate; imrc->notify_flag_changed =3D smmuv3_notify_flag_changed; + imrc->get_attr =3D smmuv3_get_attr; } =20 static const TypeInfo smmuv3_type_info =3D { --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:05:02 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 77E1A3082B51; Fri, 12 Apr 2019 10:05:00 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id CE57C19C65; Fri, 12 Apr 2019 10:04:55 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:35 +0200 Message-Id: <20190412100354.6409-9-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Fri, 12 Apr 2019 10:05:00 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 08/27] hw/vfio/common: Force nested if iommu requires it X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In case we detect the address space is translated by a virtual IOMMU which requires nested stages, let's set up the container with the VFIO_TYPE1_NESTING_IOMMU iommu_type. Signed-off-by: Eric Auger --- v2 -> v3: - add "nested only is selected if requested by @force_nested" comment in this patch --- hw/vfio/common.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index f88fd10ca3..49ce874244 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -1119,14 +1119,19 @@ static void vfio_put_address_space(VFIOAddressSpace= *space) * vfio_get_iommu_type - selects the richest iommu_type (v2 first) */ static int vfio_get_iommu_type(VFIOContainer *container, + bool force_nested, Error **errp) { - int iommu_types[] =3D { VFIO_TYPE1v2_IOMMU, VFIO_TYPE1_IOMMU, + int iommu_types[] =3D { VFIO_TYPE1_NESTING_IOMMU, + VFIO_TYPE1v2_IOMMU, VFIO_TYPE1_IOMMU, VFIO_SPAPR_TCE_v2_IOMMU, VFIO_SPAPR_TCE_IOMMU }; int i; =20 for (i =3D 0; i < ARRAY_SIZE(iommu_types); i++) { if (ioctl(container->fd, VFIO_CHECK_EXTENSION, iommu_types[i])) { + if (iommu_types[i] =3D=3D VFIO_TYPE1_NESTING_IOMMU && !force_n= ested) { + continue; + } return iommu_types[i]; } } @@ -1135,11 +1140,11 @@ static int vfio_get_iommu_type(VFIOContainer *conta= iner, } =20 static int vfio_init_container(VFIOContainer *container, int group_fd, - Error **errp) + bool force_nested, Error **errp) { int iommu_type, ret; =20 - iommu_type =3D vfio_get_iommu_type(container, errp); + iommu_type =3D vfio_get_iommu_type(container, force_nested, errp); if (iommu_type < 0) { return iommu_type; } @@ -1175,6 +1180,14 @@ static int vfio_connect_container(VFIOGroup *group, = AddressSpace *as, VFIOContainer *container; int ret, fd; VFIOAddressSpace *space; + IOMMUMemoryRegion *iommu_mr; + bool force_nested =3D false; + + if (as !=3D &address_space_memory && memory_region_is_iommu(as->root))= { + iommu_mr =3D IOMMU_MEMORY_REGION(as->root); + memory_region_iommu_get_attr(iommu_mr, IOMMU_ATTR_VFIO_NESTED, + (void *)&force_nested); + } =20 space =3D vfio_get_address_space(as); =20 @@ -1235,12 +1248,18 @@ static int vfio_connect_container(VFIOGroup *group,= AddressSpace *as, QLIST_INIT(&container->giommu_list); QLIST_INIT(&container->hostwin_list); =20 - ret =3D vfio_init_container(container, group->fd, errp); + ret =3D vfio_init_container(container, group->fd, force_nested, errp); if (ret) { goto free_container_exit; } =20 + if (force_nested && container->iommu_type !=3D VFIO_TYPE1_NESTING_IOMM= U) { + error_setg(errp, "nested mode requested by the virtual IOMMU " + "but not supported by the vfio iommu"); + } + switch (container->iommu_type) { + case VFIO_TYPE1_NESTING_IOMMU: case VFIO_TYPE1v2_IOMMU: case VFIO_TYPE1_IOMMU: { --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 12 Apr 2019 10:05:03 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id CD2F619C65; Fri, 12 Apr 2019 10:05:00 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:36 +0200 Message-Id: <20190412100354.6409-10-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Fri, 12 Apr 2019 10:05:03 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 09/27] memory: Prepare for different kinds of IOMMU MR notifiers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Current IOMMUNotifiers dedicate to IOTLB related notifications, ie. MAP/UNMAP. We plan to introduce new types of notifiers, for instance to notify vIOMMU configuration changes. Those new notifiers may not be characterized by any associated address space range. So let's create a specialized IOMMUIOLTBNotifier datatype. The base IOMMUNotifier will be able to encapsulate either of the notifier types, including looming IOMMUConfigNotifier. We also rename: - IOMMU_NOTIFIER_* into IOMMU_NOTIFIER_IOTLB_* - *_notify_* into *iotlb_notify_* All calling sites are updated. Signed-off-by: Eric Auger --- exec.c | 12 ++++----- hw/arm/smmu-common.c | 10 ++++--- hw/arm/smmuv3.c | 8 +++--- hw/i386/amd_iommu.c | 2 +- hw/i386/intel_iommu.c | 25 ++++++++++-------- hw/misc/tz-mpc.c | 8 +++--- hw/ppc/spapr_iommu.c | 2 +- hw/s390x/s390-pci-inst.c | 4 +-- hw/vfio/common.c | 13 ++++----- hw/virtio/vhost.c | 14 +++++----- include/exec/memory.h | 57 +++++++++++++++++++++++++--------------- memory.c | 32 ++++++++++++---------- 12 files changed, 107 insertions(+), 80 deletions(-) diff --git a/exec.c b/exec.c index 6ab62f4eee..2fed338fa9 100644 --- a/exec.c +++ b/exec.c @@ -685,12 +685,12 @@ static void tcg_register_iommu_notifier(CPUState *cpu, * just register interest in the whole thing, on the assumption * that iommu reconfiguration will be rare. */ - iommu_notifier_init(¬ifier->n, - tcg_iommu_unmap_notify, - IOMMU_NOTIFIER_UNMAP, - 0, - HWADDR_MAX, - iommu_idx); + iommu_iotlb_notifier_init(¬ifier->n, + tcg_iommu_unmap_notify, + IOMMU_NOTIFIER_IOTLB_UNMAP, + 0, + HWADDR_MAX, + iommu_idx); memory_region_register_iommu_notifier(notifier->mr, ¬ifier->n); } =20 diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index e94be6db6c..ee81038fc0 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -391,11 +391,11 @@ static void smmu_unmap_notifier_range(IOMMUNotifier *= n) IOMMUTLBEntry entry; =20 entry.target_as =3D &address_space_memory; - entry.iova =3D n->start; + entry.iova =3D n->iotlb_notifier.start; entry.perm =3D IOMMU_NONE; - entry.addr_mask =3D n->end - n->start; + entry.addr_mask =3D n->iotlb_notifier.end - n->iotlb_notifier.start; =20 - memory_region_notify_one(n, &entry); + memory_region_iotlb_notify_one(n, &entry); } =20 /* Unmap all notifiers attached to @mr */ @@ -405,7 +405,9 @@ inline void smmu_inv_notifiers_mr(IOMMUMemoryRegion *mr) =20 trace_smmu_inv_notifiers_mr(mr->parent_obj.name); IOMMU_NOTIFIER_FOREACH(n, mr) { - smmu_unmap_notifier_range(n); + if (n->notifier_flags & IOMMU_NOTIFIER_IOTLB_UNMAP) { + smmu_unmap_notifier_range(n); + } } } =20 diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 761d722395..1744874e72 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -822,7 +822,7 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr, entry.addr_mask =3D (1 << tt->granule_sz) - 1; entry.perm =3D IOMMU_NONE; =20 - memory_region_notify_one(n, &entry); + memory_region_iotlb_notify_one(n, &entry); } =20 /* invalidate an asid/iova tuple in all mr's */ @@ -837,7 +837,9 @@ static void smmuv3_inv_notifiers_iova(SMMUState *s, int= asid, dma_addr_t iova) trace_smmuv3_inv_notifiers_iova(mr->parent_obj.name, asid, iova); =20 IOMMU_NOTIFIER_FOREACH(n, mr) { - smmuv3_notify_iova(mr, n, asid, iova); + if (n->notifier_flags & IOMMU_NOTIFIER_IOTLB_UNMAP) { + smmuv3_notify_iova(mr, n, asid, iova); + } } } } @@ -1473,7 +1475,7 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryReg= ion *iommu, SMMUv3State *s3 =3D sdev->smmu; SMMUState *s =3D &(s3->smmu_state); =20 - if (new & IOMMU_NOTIFIER_MAP) { + if (new & IOMMU_NOTIFIER_IOTLB_MAP) { int bus_num =3D pci_bus_num(sdev->bus); PCIDevice *pcidev =3D pci_find_device(sdev->bus, bus_num, sdev->de= vfn); =20 diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 6eabdf9917..a1e88be809 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1470,7 +1470,7 @@ static void amdvi_iommu_notify_flag_changed(IOMMUMemo= ryRegion *iommu, { AMDVIAddressSpace *as =3D container_of(iommu, AMDVIAddressSpace, iommu= ); =20 - if (new & IOMMU_NOTIFIER_MAP) { + if (new & IOMMU_NOTIFIER_IOTLB_MAP) { error_report("device %02x.%02x.%x requires iommu notifier which is= not " "currently supported", as->bus_num, PCI_SLOT(as->devf= n), PCI_FUNC(as->devfn)); diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 2558f48fe6..0d0893c523 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -174,7 +174,7 @@ static void vtd_update_scalable_state(IntelIOMMUState *= s) /* Whether the address space needs to notify new mappings */ static inline gboolean vtd_as_has_map_notifier(VTDAddressSpace *as) { - return as->notifier_flags & IOMMU_NOTIFIER_MAP; + return as->notifier_flags & IOMMU_NOTIFIER_IOTLB_MAP; } =20 /* GHashTable functions */ @@ -1361,7 +1361,7 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *= s, uint8_t bus_num, static int vtd_sync_shadow_page_hook(IOMMUTLBEntry *entry, void *private) { - memory_region_notify_iommu((IOMMUMemoryRegion *)private, 0, *entry); + memory_region_iotlb_notify_iommu((IOMMUMemoryRegion *)private, 0, *ent= ry); return 0; } =20 @@ -1928,7 +1928,7 @@ static void vtd_iotlb_page_invalidate_notify(IntelIOM= MUState *s, .addr_mask =3D size - 1, .perm =3D IOMMU_NONE, }; - memory_region_notify_iommu(&vtd_as->iommu, 0, entry); + memory_region_iotlb_notify_iommu(&vtd_as->iommu, 0, entry); } } } @@ -2393,7 +2393,7 @@ static bool vtd_process_device_iotlb_desc(IntelIOMMUS= tate *s, entry.iova =3D addr; entry.perm =3D IOMMU_NONE; entry.translated_addr =3D 0; - memory_region_notify_iommu(&vtd_dev_as->iommu, 0, entry); + memory_region_iotlb_notify_iommu(&vtd_dev_as->iommu, 0, entry); =20 done: return true; @@ -2925,7 +2925,7 @@ static void vtd_iommu_notify_flag_changed(IOMMUMemory= Region *iommu, VTDAddressSpace *vtd_as =3D container_of(iommu, VTDAddressSpace, iommu= ); IntelIOMMUState *s =3D vtd_as->iommu_state; =20 - if (!s->caching_mode && new & IOMMU_NOTIFIER_MAP) { + if (!s->caching_mode && new & IOMMU_NOTIFIER_IOTLB_MAP) { error_report("We need to set caching-mode=3Don for intel-iommu to = enable " "device assignment with IOMMU protection."); exit(1); @@ -3368,8 +3368,9 @@ static void vtd_address_space_unmap(VTDAddressSpace *= as, IOMMUNotifier *n) { IOMMUTLBEntry entry; hwaddr size; - hwaddr start =3D n->start; - hwaddr end =3D n->end; + + hwaddr start =3D n->iotlb_notifier.start; + hwaddr end =3D n->iotlb_notifier.end; IntelIOMMUState *s =3D as->iommu_state; DMAMap map; =20 @@ -3405,7 +3406,7 @@ static void vtd_address_space_unmap(VTDAddressSpace *= as, IOMMUNotifier *n) =20 entry.target_as =3D &address_space_memory; /* Adjust iova for the size */ - entry.iova =3D n->start & ~(size - 1); + entry.iova =3D n->iotlb_notifier.start & ~(size - 1); /* This field is meaningless for unmap */ entry.translated_addr =3D 0; entry.perm =3D IOMMU_NONE; @@ -3420,7 +3421,7 @@ static void vtd_address_space_unmap(VTDAddressSpace *= as, IOMMUNotifier *n) map.size =3D entry.addr_mask; iova_tree_remove(as->iova_tree, &map); =20 - memory_region_notify_one(n, &entry); + memory_region_iotlb_notify_one(n, &entry); } =20 static void vtd_address_space_unmap_all(IntelIOMMUState *s) @@ -3430,7 +3431,9 @@ static void vtd_address_space_unmap_all(IntelIOMMUSta= te *s) =20 QLIST_FOREACH(vtd_as, &s->vtd_as_with_notifiers, next) { IOMMU_NOTIFIER_FOREACH(n, &vtd_as->iommu) { - vtd_address_space_unmap(vtd_as, n); + if (n->notifier_flags & IOMMU_NOTIFIER_IOTLB_UNMAP) { + vtd_address_space_unmap(vtd_as, n); + } } } } @@ -3443,7 +3446,7 @@ static void vtd_address_space_refresh_all(IntelIOMMUS= tate *s) =20 static int vtd_replay_hook(IOMMUTLBEntry *entry, void *private) { - memory_region_notify_one((IOMMUNotifier *)private, entry); + memory_region_iotlb_notify_one((IOMMUNotifier *)private, entry); return 0; } =20 diff --git a/hw/misc/tz-mpc.c b/hw/misc/tz-mpc.c index 9a84be75ed..f735d60e0f 100644 --- a/hw/misc/tz-mpc.c +++ b/hw/misc/tz-mpc.c @@ -100,8 +100,8 @@ static void tz_mpc_iommu_notify(TZMPC *s, uint32_t luti= dx, entry.translated_addr =3D addr; =20 entry.perm =3D IOMMU_NONE; - memory_region_notify_iommu(&s->upstream, IOMMU_IDX_S, entry); - memory_region_notify_iommu(&s->upstream, IOMMU_IDX_NS, entry); + memory_region_iotlb_notify_iommu(&s->upstream, IOMMU_IDX_S, entry); + memory_region_iotlb_notify_iommu(&s->upstream, IOMMU_IDX_NS, entry= ); =20 entry.perm =3D IOMMU_RW; if (block_is_ns) { @@ -109,13 +109,13 @@ static void tz_mpc_iommu_notify(TZMPC *s, uint32_t lu= tidx, } else { entry.target_as =3D &s->downstream_as; } - memory_region_notify_iommu(&s->upstream, IOMMU_IDX_S, entry); + memory_region_iotlb_notify_iommu(&s->upstream, IOMMU_IDX_S, entry); if (block_is_ns) { entry.target_as =3D &s->downstream_as; } else { entry.target_as =3D &s->blocked_io_as; } - memory_region_notify_iommu(&s->upstream, IOMMU_IDX_NS, entry); + memory_region_iotlb_notify_iommu(&s->upstream, IOMMU_IDX_NS, entry= ); } } =20 diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index 5aff4d5a05..91da0dfb9c 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -459,7 +459,7 @@ static target_ulong put_tce_emu(SpaprTceTable *tcet, ta= rget_ulong ioba, entry.translated_addr =3D tce & page_mask; entry.addr_mask =3D ~page_mask; entry.perm =3D spapr_tce_iommu_access_flags(tce); - memory_region_notify_iommu(&tcet->iommu, 0, entry); + memory_region_iotlb_notify_iommu(&tcet->iommu, 0, entry); =20 return H_SUCCESS; } diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index be2896232d..63bb23accd 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -594,7 +594,7 @@ static void s390_pci_update_iotlb(S390PCIIOMMU *iommu, = S390IOTLBEntry *entry) } =20 notify.perm =3D IOMMU_NONE; - memory_region_notify_iommu(&iommu->iommu_mr, 0, notify); + memory_region_iotlb_notify_iommu(&iommu->iommu_mr, 0, notify); notify.perm =3D entry->perm; } =20 @@ -606,7 +606,7 @@ static void s390_pci_update_iotlb(S390PCIIOMMU *iommu, = S390IOTLBEntry *entry) g_hash_table_replace(iommu->iotlb, &cache->iova, cache); } =20 - memory_region_notify_iommu(&iommu->iommu_mr, 0, notify); + memory_region_iotlb_notify_iommu(&iommu->iommu_mr, 0, notify); } =20 int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 49ce874244..a9004b6d20 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -606,11 +606,11 @@ static void vfio_listener_region_add(MemoryListener *= listener, llend =3D int128_sub(llend, int128_one()); iommu_idx =3D memory_region_iommu_attrs_to_index(iommu_mr, MEMTXATTRS_UNSPECIF= IED); - iommu_notifier_init(&giommu->n, vfio_iommu_map_notify, - IOMMU_NOTIFIER_ALL, - section->offset_within_region, - int128_get64(llend), - iommu_idx); + iommu_iotlb_notifier_init(&giommu->n, vfio_iommu_map_notify, + IOMMU_NOTIFIER_IOTLB_ALL, + section->offset_within_region, + int128_get64(llend), + iommu_idx); QLIST_INSERT_HEAD(&container->giommu_list, giommu, giommu_next); =20 memory_region_register_iommu_notifier(section->mr, &giommu->n); @@ -704,7 +704,8 @@ static void vfio_listener_region_del(MemoryListener *li= stener, =20 QLIST_FOREACH(giommu, &container->giommu_list, giommu_next) { if (MEMORY_REGION(giommu->iommu) =3D=3D section->mr && - giommu->n.start =3D=3D section->offset_within_region) { + is_iommu_iotlb_notifier(&giommu->n) && + giommu->n.iotlb_notifier.start =3D=3D section->offset_with= in_region) { memory_region_unregister_iommu_notifier(section->mr, &giommu->n); QLIST_REMOVE(giommu, giommu_next); diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c index 7f61018f2a..263a45d05b 100644 --- a/hw/virtio/vhost.c +++ b/hw/virtio/vhost.c @@ -677,11 +677,11 @@ static void vhost_iommu_region_add(MemoryListener *li= stener, end =3D int128_sub(end, int128_one()); iommu_idx =3D memory_region_iommu_attrs_to_index(iommu_mr, MEMTXATTRS_UNSPECIFIED); - iommu_notifier_init(&iommu->n, vhost_iommu_unmap_notify, - IOMMU_NOTIFIER_UNMAP, - section->offset_within_region, - int128_get64(end), - iommu_idx); + iommu_iotlb_notifier_init(&iommu->n, vhost_iommu_unmap_notify, + IOMMU_NOTIFIER_IOTLB_UNMAP, + section->offset_within_region, + int128_get64(end), + iommu_idx); iommu->mr =3D section->mr; iommu->iommu_offset =3D section->offset_within_address_space - section->offset_within_region; @@ -703,8 +703,8 @@ static void vhost_iommu_region_del(MemoryListener *list= ener, } =20 QLIST_FOREACH(iommu, &dev->iommu_list, iommu_next) { - if (iommu->mr =3D=3D section->mr && - iommu->n.start =3D=3D section->offset_within_region) { + if (iommu->mr =3D=3D section->mr && is_iommu_iotlb_notifier(&iommu= ->n) && + iommu->n.iotlb_notifier.start =3D=3D section->offset_within_re= gion) { memory_region_unregister_iommu_notifier(iommu->mr, &iommu->n); QLIST_REMOVE(iommu, iommu_next); diff --git a/include/exec/memory.h b/include/exec/memory.h index ac4d06379f..3918352a17 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -81,23 +81,29 @@ struct IOMMUTLBEntry { typedef enum { IOMMU_NOTIFIER_NONE =3D 0, /* Notify cache invalidations */ - IOMMU_NOTIFIER_UNMAP =3D 0x1, + IOMMU_NOTIFIER_IOTLB_UNMAP =3D 0x1, /* Notify entry changes (newly created entries) */ - IOMMU_NOTIFIER_MAP =3D 0x2, + IOMMU_NOTIFIER_IOTLB_MAP =3D 0x2, } IOMMUNotifierFlag; =20 -#define IOMMU_NOTIFIER_ALL (IOMMU_NOTIFIER_MAP | IOMMU_NOTIFIER_UNMAP) +#define IOMMU_NOTIFIER_IOTLB_ALL (IOMMU_NOTIFIER_IOTLB_MAP | IOMMU_NOTIFIE= R_IOTLB_UNMAP) =20 struct IOMMUNotifier; typedef void (*IOMMUNotify)(struct IOMMUNotifier *notifier, IOMMUTLBEntry *data); =20 -struct IOMMUNotifier { +typedef struct IOMMUIOLTBNotifier { IOMMUNotify notify; - IOMMUNotifierFlag notifier_flags; /* Notify for address space range start <=3D addr <=3D end */ hwaddr start; hwaddr end; +} IOMMUIOLTBNotifier; + +struct IOMMUNotifier { + IOMMUNotifierFlag notifier_flags; + union { + IOMMUIOLTBNotifier iotlb_notifier; + }; int iommu_idx; QLIST_ENTRY(IOMMUNotifier) node; }; @@ -126,15 +132,18 @@ typedef struct IOMMUNotifier IOMMUNotifier; /* RAM is a persistent kind memory */ #define RAM_PMEM (1 << 5) =20 -static inline void iommu_notifier_init(IOMMUNotifier *n, IOMMUNotify fn, - IOMMUNotifierFlag flags, - hwaddr start, hwaddr end, - int iommu_idx) +static inline void iommu_iotlb_notifier_init(IOMMUNotifier *n, IOMMUNotify= fn, + IOMMUNotifierFlag flags, + hwaddr start, hwaddr end, + int iommu_idx) { - n->notify =3D fn; + assert(flags & IOMMU_NOTIFIER_IOTLB_MAP || + flags & IOMMU_NOTIFIER_IOTLB_UNMAP); + assert(start < end); n->notifier_flags =3D flags; - n->start =3D start; - n->end =3D end; + n->iotlb_notifier.notify =3D fn; + n->iotlb_notifier.start =3D start; + n->iotlb_notifier.end =3D end; n->iommu_idx =3D iommu_idx; } =20 @@ -633,6 +642,11 @@ void memory_region_init_resizeable_ram(MemoryRegion *m= r, uint64_t length, void *host), Error **errp); + +static inline bool is_iommu_iotlb_notifier(IOMMUNotifier *n) +{ + return n->notifier_flags & IOMMU_NOTIFIER_IOTLB_ALL; +} #ifdef CONFIG_POSIX =20 /** @@ -1018,7 +1032,8 @@ static inline IOMMUMemoryRegionClass *memory_region_g= et_iommu_class_nocheck( uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr= ); =20 /** - * memory_region_notify_iommu: notify a change in an IOMMU translation ent= ry. + * memory_region_iotlb_notify_iommu: notify a change in an IOMMU translati= on + * entry. * * The notification type will be decided by entry.perm bits: * @@ -1035,15 +1050,15 @@ uint64_t memory_region_iommu_get_min_page_size(IOMM= UMemoryRegion *iommu_mr); * replaces all old entries for the same virtual I/O address range. * Deleted entries have .@perm =3D=3D 0. */ -void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, - int iommu_idx, - IOMMUTLBEntry entry); +void memory_region_iotlb_notify_iommu(IOMMUMemoryRegion *iommu_mr, + int iommu_idx, + IOMMUTLBEntry entry); =20 /** - * memory_region_notify_one: notify a change in an IOMMU translation - * entry to a single notifier + * memory_region_iotlb_notify_one: notify a change in an IOMMU translation + * entry to a single notifier * - * This works just like memory_region_notify_iommu(), but it only + * This works just like memory_region_iotlb_notify_iommu(), but it only * notifies a specific notifier, not all of them. * * @notifier: the notifier to be notified @@ -1051,8 +1066,8 @@ void memory_region_notify_iommu(IOMMUMemoryRegion *io= mmu_mr, * replaces all old entries for the same virtual I/O address range. * Deleted entries have .@perm =3D=3D 0. */ -void memory_region_notify_one(IOMMUNotifier *notifier, - IOMMUTLBEntry *entry); +void memory_region_iotlb_notify_one(IOMMUNotifier *notifier, + IOMMUTLBEntry *entry); =20 /** * memory_region_register_iommu_notifier: register a notifier for changes = to diff --git a/memory.c b/memory.c index 9fbca52e05..bd9f425f0d 100644 --- a/memory.c +++ b/memory.c @@ -1862,7 +1862,9 @@ void memory_region_register_iommu_notifier(MemoryRegi= on *mr, /* We need to register for at least one bitfield */ iommu_mr =3D IOMMU_MEMORY_REGION(mr); assert(n->notifier_flags !=3D IOMMU_NOTIFIER_NONE); - assert(n->start <=3D n->end); + if (is_iommu_iotlb_notifier(n)) { + assert(n->iotlb_notifier.start <=3D n->iotlb_notifier.end); + } assert(n->iommu_idx >=3D 0 && n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr)); =20 @@ -1898,7 +1900,7 @@ void memory_region_iommu_replay(IOMMUMemoryRegion *io= mmu_mr, IOMMUNotifier *n) for (addr =3D 0; addr < memory_region_size(mr); addr +=3D granularity)= { iotlb =3D imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx= ); if (iotlb.perm !=3D IOMMU_NONE) { - n->notify(n, &iotlb); + n->iotlb_notifier.notify(n, &iotlb); } =20 /* if (2^64 - MR size) < granularity, it's possible to get an @@ -1932,42 +1934,44 @@ void memory_region_unregister_iommu_notifier(Memory= Region *mr, memory_region_update_iommu_notify_flags(iommu_mr); } =20 -void memory_region_notify_one(IOMMUNotifier *notifier, - IOMMUTLBEntry *entry) +void memory_region_iotlb_notify_one(IOMMUNotifier *notifier, + IOMMUTLBEntry *entry) { IOMMUNotifierFlag request_flags; =20 + assert(is_iommu_iotlb_notifier(notifier)); /* * Skip the notification if the notification does not overlap * with registered range. */ - if (notifier->start > entry->iova + entry->addr_mask || - notifier->end < entry->iova) { + if (notifier->iotlb_notifier.start > entry->iova + entry->addr_mask || + notifier->iotlb_notifier.end < entry->iova) { return; } =20 if (entry->perm & IOMMU_RW) { - request_flags =3D IOMMU_NOTIFIER_MAP; + request_flags =3D IOMMU_NOTIFIER_IOTLB_MAP; } else { - request_flags =3D IOMMU_NOTIFIER_UNMAP; + request_flags =3D IOMMU_NOTIFIER_IOTLB_UNMAP; } =20 if (notifier->notifier_flags & request_flags) { - notifier->notify(notifier, entry); + notifier->iotlb_notifier.notify(notifier, entry); } } =20 -void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, - int iommu_idx, - IOMMUTLBEntry entry) +void memory_region_iotlb_notify_iommu(IOMMUMemoryRegion *iommu_mr, + int iommu_idx, + IOMMUTLBEntry entry) { IOMMUNotifier *iommu_notifier; =20 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr))); =20 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) { - if (iommu_notifier->iommu_idx =3D=3D iommu_idx) { - memory_region_notify_one(iommu_notifier, &entry); + if (iommu_notifier->iommu_idx =3D=3D iommu_idx && + is_iommu_iotlb_notifier(iommu_notifier)) { + memory_region_iotlb_notify_one(iommu_notifier, &entry); } } } --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 12 Apr 2019 06:05:14 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6F9E17EBC4; Fri, 12 Apr 2019 10:05:13 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id D4D4C19C65; Fri, 12 Apr 2019 10:05:03 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:37 +0200 Message-Id: <20190412100354.6409-11-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Fri, 12 Apr 2019 10:05:13 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 10/27] memory: Add IOMMUConfigNotifier X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" With this patch, an IOMMUNotifier can now be either an IOTLB notifier or a config notifier. A config notifier is supposed to be called on guest translation config change. This gives host a chance to update the physical IOMMU configuration so that is consistent with the guest view. The notifier is passed an IOMMUConfig. The first type of configuration introduced here consists in the PASID configuration. We introduce the associated helpers, iommu_config_notifier_init, memory_region_config_notify_iommu Signed-off-by: Eric Auger --- v1 -> v2: - use pasid_table config - pass IOMMUNotifierFlag flags to iommu_config_notifier_init to prepare for other config flags - Introduce IOMMUConfig - s/IOMMU_NOTIFIER_S1_CFG/IOMMU_NOTIFIER_PASID_CFG - remove unused IOMMUStage1ConfigType --- hw/vfio/common.c | 15 ++++++++----- include/exec/memory.h | 52 ++++++++++++++++++++++++++++++++++++++++++- memory.c | 25 +++++++++++++++++++++ 3 files changed, 86 insertions(+), 6 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index a9004b6d20..0853c8c376 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -703,11 +703,16 @@ static void vfio_listener_region_del(MemoryListener *= listener, VFIOGuestIOMMU *giommu; =20 QLIST_FOREACH(giommu, &container->giommu_list, giommu_next) { - if (MEMORY_REGION(giommu->iommu) =3D=3D section->mr && - is_iommu_iotlb_notifier(&giommu->n) && - giommu->n.iotlb_notifier.start =3D=3D section->offset_with= in_region) { - memory_region_unregister_iommu_notifier(section->mr, - &giommu->n); + if (MEMORY_REGION(giommu->iommu) =3D=3D section->mr) { + if (is_iommu_iotlb_notifier(&giommu->n) && + giommu->n.iotlb_notifier.start =3D=3D + section->offset_within_region) { + memory_region_unregister_iommu_notifier(section->mr, + &giommu->n); + } else { + memory_region_unregister_iommu_notifier(section->mr, + &giommu->n); + } QLIST_REMOVE(giommu, giommu_next); g_free(giommu); break; diff --git a/include/exec/memory.h b/include/exec/memory.h index 3918352a17..f54052e9b3 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -26,6 +26,9 @@ #include "qom/object.h" #include "qemu/rcu.h" #include "hw/qdev-core.h" +#ifdef CONFIG_LINUX +#include +#endif =20 #define RAM_ADDR_INVALID (~(ram_addr_t)0) =20 @@ -74,6 +77,14 @@ struct IOMMUTLBEntry { IOMMUAccessFlags perm; }; =20 +typedef struct IOMMUConfig { + union { +#ifdef __linux__ + struct iommu_pasid_table_config pasid_cfg; +#endif + }; +} IOMMUConfig; + /* * Bitmap for different IOMMUNotifier capabilities. Each notifier can * register with one or multiple IOMMU Notifier capability bit(s). @@ -84,13 +95,18 @@ typedef enum { IOMMU_NOTIFIER_IOTLB_UNMAP =3D 0x1, /* Notify entry changes (newly created entries) */ IOMMU_NOTIFIER_IOTLB_MAP =3D 0x2, + /* Notify stage 1 config changes */ + IOMMU_NOTIFIER_CONFIG_PASID =3D 0x4, } IOMMUNotifierFlag; =20 #define IOMMU_NOTIFIER_IOTLB_ALL (IOMMU_NOTIFIER_IOTLB_MAP | IOMMU_NOTIFIE= R_IOTLB_UNMAP) +#define IOMMU_NOTIFIER_CONFIG_ALL (IOMMU_NOTIFIER_CONFIG_PASID) =20 struct IOMMUNotifier; typedef void (*IOMMUNotify)(struct IOMMUNotifier *notifier, IOMMUTLBEntry *data); +typedef void (*IOMMUConfigNotify)(struct IOMMUNotifier *notifier, + IOMMUConfig *cfg); =20 typedef struct IOMMUIOLTBNotifier { IOMMUNotify notify; @@ -99,10 +115,15 @@ typedef struct IOMMUIOLTBNotifier { hwaddr end; } IOMMUIOLTBNotifier; =20 +typedef struct IOMMUConfigNotifier { + IOMMUConfigNotify notify; +} IOMMUConfigNotifier; + struct IOMMUNotifier { IOMMUNotifierFlag notifier_flags; union { IOMMUIOLTBNotifier iotlb_notifier; + IOMMUConfigNotifier config_notifier; }; int iommu_idx; QLIST_ENTRY(IOMMUNotifier) node; @@ -147,6 +168,16 @@ static inline void iommu_iotlb_notifier_init(IOMMUNoti= fier *n, IOMMUNotify fn, n->iommu_idx =3D iommu_idx; } =20 +static inline void iommu_config_notifier_init(IOMMUNotifier *n, + IOMMUConfigNotify fn, + IOMMUNotifierFlag flags, + int iommu_idx) +{ + n->notifier_flags =3D flags; + n->iommu_idx =3D iommu_idx; + n->config_notifier.notify =3D fn; +} + /* * Memory region callbacks */ @@ -647,6 +678,12 @@ static inline bool is_iommu_iotlb_notifier(IOMMUNotifi= er *n) { return n->notifier_flags & IOMMU_NOTIFIER_IOTLB_ALL; } + +static inline bool is_iommu_config_notifier(IOMMUNotifier *n) +{ + return n->notifier_flags & IOMMU_NOTIFIER_CONFIG_ALL; +} + #ifdef CONFIG_POSIX =20 /** @@ -1054,6 +1091,19 @@ void memory_region_iotlb_notify_iommu(IOMMUMemoryReg= ion *iommu_mr, int iommu_idx, IOMMUTLBEntry entry); =20 +/** + * memory_region_config_notify_iommu: notify a change in a translation + * configuration structure. + * @iommu_mr: the memory region that was changed + * @iommu_idx: the IOMMU index for the translation table which has changed + * @flag: config change type + * @config: new guest config + */ +void memory_region_config_notify_iommu(IOMMUMemoryRegion *iommu_mr, + int iommu_idx, + IOMMUNotifierFlag flag, + IOMMUConfig *config); + /** * memory_region_iotlb_notify_one: notify a change in an IOMMU translation * entry to a single notifier @@ -1071,7 +1121,7 @@ void memory_region_iotlb_notify_one(IOMMUNotifier *no= tifier, =20 /** * memory_region_register_iommu_notifier: register a notifier for changes = to - * IOMMU translation entries. + * IOMMU translation entries or translation config settings. * * @mr: the memory region to observe * @n: the IOMMUNotifier to be added; the notify callback receives a diff --git a/memory.c b/memory.c index bd9f425f0d..8cd3c65872 100644 --- a/memory.c +++ b/memory.c @@ -1934,6 +1934,13 @@ void memory_region_unregister_iommu_notifier(MemoryR= egion *mr, memory_region_update_iommu_notify_flags(iommu_mr); } =20 +static void +memory_region_config_notify_one(IOMMUNotifier *notifier, + IOMMUConfig *cfg) +{ + notifier->config_notifier.notify(notifier, cfg); +} + void memory_region_iotlb_notify_one(IOMMUNotifier *notifier, IOMMUTLBEntry *entry) { @@ -1976,6 +1983,24 @@ void memory_region_iotlb_notify_iommu(IOMMUMemoryReg= ion *iommu_mr, } } =20 +void memory_region_config_notify_iommu(IOMMUMemoryRegion *iommu_mr, + int iommu_idx, + IOMMUNotifierFlag flag, + IOMMUConfig *config) +{ + IOMMUNotifier *iommu_notifier; + + assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr))); + + IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) { + if (iommu_notifier->iommu_idx =3D=3D iommu_idx && + is_iommu_config_notifier(iommu_notifier) && + iommu_notifier->notifier_flags =3D=3D flag) { + memory_region_config_notify_one(iommu_notifier, config); + } + } +} + int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr, enum IOMMUMemoryRegionAttr attr, void *data) --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; 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Fri, 12 Apr 2019 10:05:16 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id C2D3A19C65; Fri, 12 Apr 2019 10:05:13 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:38 +0200 Message-Id: <20190412100354.6409-12-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 12 Apr 2019 10:05:16 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 11/27] memory: Add arch_id and leaf fields in IOTLBEntry X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" TLB entries are usually tagged with some ids such as the asid or pasid. When propagating an invalidation command from the guest to the host, we need to pass this id. Also we add a leaf field which indicates, in case of invalidation notification whether only cache entries for the last level of translation are required to be invalidated. Signed-off-by: Eric Auger --- include/exec/memory.h | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index f54052e9b3..aedebc8471 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -69,12 +69,30 @@ typedef enum { =20 #define IOMMU_ACCESS_FLAG(r, w) (((r) ? IOMMU_RO : 0) | ((w) ? IOMMU_WO : = 0)) =20 +/** + * IOMMUTLBEntry - IOMMU TLB entry + * + * Structure used when performing a translation or when notifying MAP or + * UNMAP (invalidation) events + * + * @target_as: target address space + * @iova: IO virtual address (input) + * @translated_addr: translated address (output) + * @addr_mask: address mask (0xfff means 4K binding), must be multiple of 2 + * @perm: permission flag of the mapping (NONE encodes no mapping or + * invalidation notification) + * @arch_id: architecture specific ID tagging the TLB + * @leaf: when @perm is NONE, indicates whether only caches for the last + * level of translation need to be invalidated. + */ struct IOMMUTLBEntry { AddressSpace *target_as; hwaddr iova; hwaddr translated_addr; - hwaddr addr_mask; /* 0xfff =3D 4k translation */ + hwaddr addr_mask; IOMMUAccessFlags perm; + uint32_t arch_id; + bool leaf; }; =20 typedef struct IOMMUConfig { --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1555064481986357.7332896710958; Fri, 12 Apr 2019 03:21:21 -0700 (PDT) Received: from localhost ([127.0.0.1]:33797 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEtJ8-0007my-Ts for importer@patchew.org; Fri, 12 Apr 2019 06:21:18 -0400 Received: from eggs.gnu.org ([209.51.188.92]:38103) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt3o-0001bj-ND for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:05:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEt3n-0004LF-Mj for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:05:28 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32879) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEt3k-0004H6-ME; Fri, 12 Apr 2019 06:05:24 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5E242753EB; Fri, 12 Apr 2019 10:05:21 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id A8F0919C65; Fri, 12 Apr 2019 10:05:16 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:39 +0200 Message-Id: <20190412100354.6409-13-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Fri, 12 Apr 2019 10:05:21 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 12/27] hw/arm/smmuv3: Store the PASID table GPA in the translation config X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" For VFIO integration we will need to pass the Context Descriptor (CD) table GPA to the host. The CD table is also referred to as the PASID table. Its GPA corresponds to the s1ctrptr field of the Stream Table Entry. So let's decode and store it in the configuration structure. Signed-off-by: Eric Auger --- hw/arm/smmuv3.c | 1 + include/hw/arm/smmu-common.h | 1 + 2 files changed, 2 insertions(+) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 1744874e72..96d4147533 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -351,6 +351,7 @@ static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg, "SMMUv3 S1 stalling fault model not allowed yet\n"); goto bad_ste; } + cfg->s1ctxptr =3D STE_CTXPTR(ste); return 0; =20 bad_ste: diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index 2c7fbf4202..a1020b638c 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -68,6 +68,7 @@ typedef struct SMMUTransCfg { uint8_t tbi; /* Top Byte Ignore */ uint16_t asid; SMMUTransTableInfo tt[2]; + dma_addr_t s1ctxptr; uint32_t iotlb_hits; /* counts IOTLB hits for this asid */ uint32_t iotlb_misses; /* counts IOTLB misses for this asid */ } SMMUTransCfg; --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:05:26 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 40A13306BB6E; Fri, 12 Apr 2019 10:05:24 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id ABB6A19746; Fri, 12 Apr 2019 10:05:21 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:40 +0200 Message-Id: <20190412100354.6409-14-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Fri, 12 Apr 2019 10:05:24 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 13/27] hw/arm/smmuv3: Implement dummy replay X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The default implementation of memory_region_iommu_replay() shall not be used as it forces the translation of the whole RAM range. The purpose of this function is to update the shadow page tables. However in case of nested stage, there is no shadow page table so we can simply return. Signed-off-by: Eric Auger --- hw/arm/smmuv3.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 96d4147533..8db605adab 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1507,6 +1507,11 @@ static int smmuv3_get_attr(IOMMUMemoryRegion *iommu, return -EINVAL; } =20 +static inline void +smmuv3_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n) +{ +} + static void smmuv3_iommu_memory_region_class_init(ObjectClass *klass, void *data) { @@ -1515,6 +1520,7 @@ static void smmuv3_iommu_memory_region_class_init(Obj= ectClass *klass, imrc->translate =3D smmuv3_translate; imrc->notify_flag_changed =3D smmuv3_notify_flag_changed; imrc->get_attr =3D smmuv3_get_attr; + imrc->replay =3D smmuv3_replay; } =20 static const TypeInfo smmuv3_type_info =3D { --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:05:36 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9308C3082E8F; Fri, 12 Apr 2019 10:05:35 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9500119C65; Fri, 12 Apr 2019 10:05:24 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:41 +0200 Message-Id: <20190412100354.6409-15-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.46]); Fri, 12 Apr 2019 10:05:35 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 14/27] hw/arm/smmuv3: Fill the IOTLBEntry arch_id on NH_VA invalidation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" When the guest invalidates one S1 entry, it passes the asid. When propagating this invalidation downto the host, the asid information also must be passed. So let's fill the arch_id field introduced for that purpose. Signed-off-by: Eric Auger --- hw/arm/smmuv3.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 8db605adab..b6eb61304d 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -822,6 +822,7 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr, entry.iova =3D iova; entry.addr_mask =3D (1 << tt->granule_sz) - 1; entry.perm =3D IOMMU_NONE; + entry.arch_id =3D asid; =20 memory_region_iotlb_notify_one(n, &entry); } --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555064732; cv=none; d=zoho.com; s=zohoarc; b=aqSl8OJA6kbJ2QuBLJdt4le/KOW/I8rpt2+KFzkdxLlBoDOpBHucRb3RhSpFe+xSTz/qy2tRr6GoGjP+dZUPfTyMa6F+3taZnFhpkQ+mhCAoGQtGazqJtR1UWhv42aF9+JYnt9PW60LgLBvE5AkhTwXzzoQeshH0SRFv+KV6vTQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1555064732; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=PEOxlRwZV7MoqlvJTeKWyK3CgLB/QBz0xShKIcqnYu0=; b=kPPMLrJZI2XIL8nG/uWJKnxqOOuwNy9MrCUwEkdrYSQmQ7TdD+0ZzBemkfLO6g+dzcvk9flbhaKSX6PH2MUKYcJLIy7liXF4xPNAb7zqhfhOHW3BYbYVmfHjIZfGeuePXLJ8Vny1oP23GnxZdNZd/+9Lc3dL0fCXYaQ2j1Vr6RQ= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155506473211687.66370819613303; Fri, 12 Apr 2019 03:25:32 -0700 (PDT) Received: from localhost ([127.0.0.1]:33855 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEtN8-0003RK-4O for importer@patchew.org; Fri, 12 Apr 2019 06:25:26 -0400 Received: from eggs.gnu.org ([209.51.188.92]:38279) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt47-0001yY-5E for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:05:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEt46-0004aD-3O for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:05:47 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56134) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEt42-0004Xy-6M; Fri, 12 Apr 2019 06:05:42 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6A3AA3001C60; Fri, 12 Apr 2019 10:05:41 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id F081D19C65; Fri, 12 Apr 2019 10:05:35 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:42 +0200 Message-Id: <20190412100354.6409-16-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 12 Apr 2019 10:05:41 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 15/27] hw/arm/smmuv3: Fill the IOTLBEntry leaf field on NH_VA invalidation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let's propagate the leaf attribute throughout the invalidation path. This hint is used to reduce the scope of the invalidations to the last level of translation. Not enforcing it induces large performance penalties in nested mode. Signed-off-by: Eric Auger --- hw/arm/smmuv3.c | 16 +++++++++------- hw/arm/trace-events | 2 +- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index b6eb61304d..f2f3724686 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -792,8 +792,7 @@ epilogue: */ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr, IOMMUNotifier *n, - int asid, - dma_addr_t iova) + int asid, dma_addr_t iova, bool leaf) { SMMUDevice *sdev =3D container_of(mr, SMMUDevice, iommu); SMMUEventInfo event =3D {}; @@ -823,12 +822,14 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr, entry.addr_mask =3D (1 << tt->granule_sz) - 1; entry.perm =3D IOMMU_NONE; entry.arch_id =3D asid; + entry.leaf =3D leaf; =20 memory_region_iotlb_notify_one(n, &entry); } =20 /* invalidate an asid/iova tuple in all mr's */ -static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, dma_addr_t i= ova) +static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, + dma_addr_t iova, bool leaf) { SMMUDevice *sdev; =20 @@ -840,7 +841,7 @@ static void smmuv3_inv_notifiers_iova(SMMUState *s, int= asid, dma_addr_t iova) =20 IOMMU_NOTIFIER_FOREACH(n, mr) { if (n->notifier_flags & IOMMU_NOTIFIER_IOTLB_UNMAP) { - smmuv3_notify_iova(mr, n, asid, iova); + smmuv3_notify_iova(mr, n, asid, iova, leaf); } } } @@ -979,9 +980,10 @@ static int smmuv3_cmdq_consume(SMMUv3State *s) { dma_addr_t addr =3D CMD_ADDR(&cmd); uint16_t vmid =3D CMD_VMID(&cmd); + bool leaf =3D CMD_LEAF(&cmd); =20 - trace_smmuv3_cmdq_tlbi_nh_vaa(vmid, addr); - smmuv3_inv_notifiers_iova(bs, -1, addr); + trace_smmuv3_cmdq_tlbi_nh_vaa(vmid, addr, leaf); + smmuv3_inv_notifiers_iova(bs, -1, addr, leaf); smmu_iotlb_inv_all(bs); break; } @@ -993,7 +995,7 @@ static int smmuv3_cmdq_consume(SMMUv3State *s) bool leaf =3D CMD_LEAF(&cmd); =20 trace_smmuv3_cmdq_tlbi_nh_va(vmid, asid, addr, leaf); - smmuv3_inv_notifiers_iova(bs, asid, addr); + smmuv3_inv_notifiers_iova(bs, asid, addr, leaf); smmu_iotlb_inv_iova(bs, asid, addr); break; } diff --git a/hw/arm/trace-events b/hw/arm/trace-events index 0acedcedc6..3809005cba 100644 --- a/hw/arm/trace-events +++ b/hw/arm/trace-events @@ -43,7 +43,7 @@ smmuv3_cmdq_cfgi_cd(uint32_t sid) "streamid =3D %d" smmuv3_config_cache_hit(uint32_t sid, uint32_t hits, uint32_t misses, uint= 32_t perc) "Config cache HIT for sid %d (hits=3D%d, misses=3D%d, hit rate= =3D%d)" smmuv3_config_cache_miss(uint32_t sid, uint32_t hits, uint32_t misses, uin= t32_t perc) "Config cache MISS for sid %d (hits=3D%d, misses=3D%d, hit rate= =3D%d)" smmuv3_cmdq_tlbi_nh_va(int vmid, int asid, uint64_t addr, bool leaf) "vmid= =3D%d asid =3D%d addr=3D0x%"PRIx64" leaf=3D%d" -smmuv3_cmdq_tlbi_nh_vaa(int vmid, uint64_t addr) "vmid =3D%d addr=3D0x%"PR= Ix64 +smmuv3_cmdq_tlbi_nh_vaa(int vmid, uint64_t addr, bool leaf) "vmid =3D%d ad= dr=3D0x%"PRIx64" leaf=3D%d" smmuv3_cmdq_tlbi_nh(void) "" smmuv3_cmdq_tlbi_nh_asid(uint16_t asid) "asid=3D%d" smmu_iotlb_cache_hit(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t = miss, uint32_t p) "IOTLB cache HIT asid=3D%d addr=3D0x%"PRIx64" hit=3D%d mi= ss=3D%d hit rate=3D%d" --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1555064414353228.41236514943057; Fri, 12 Apr 2019 03:20:14 -0700 (PDT) Received: from localhost ([127.0.0.1]:33760 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEtI1-0006c8-63 for importer@patchew.org; Fri, 12 Apr 2019 06:20:09 -0400 Received: from eggs.gnu.org ([209.51.188.92]:38310) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEt4A-000223-Sf for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:05:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEt49-0004bc-9q for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:05:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59132) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEt45-0004ZU-4F; Fri, 12 Apr 2019 06:05:45 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 620D381E1B; Fri, 12 Apr 2019 10:05:44 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id C637419C65; Fri, 12 Apr 2019 10:05:41 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:43 +0200 Message-Id: <20190412100354.6409-17-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Fri, 12 Apr 2019 10:05:44 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 16/27] hw/arm/smmuv3: Notify on config changes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In case IOMMU config notifiers are attached to the IOMMU memory region, we execute them, passing as argument the iommu_pasid_table_config struct updated with the new viommu translation config. Config notifiers are called on STE changes. At physical level, they translate into CMD_CFGI_STE_* commands. Signed-off-by: Eric Auger --- v2 -> v3: - adapt to pasid_cfg field changes. Use local variable - add trace event - set version fields - use CONFIG_PASID v1 -> v2: - do not notify anymore on CD change. Anyway the smmuv3 linux driver is not sending any CD invalidation commands. If we were to propagate CD invalidation commands, we would use the CACHE_INVALIDATE VFIO ioctl. - notify a precise config flags to prepare for addition of new flags --- hw/arm/smmuv3.c | 72 ++++++++++++++++++++++++++++++++++----------- hw/arm/trace-events | 1 + 2 files changed, 56 insertions(+), 17 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index f2f3724686..2574989f2e 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -16,6 +16,8 @@ * with this program; if not, see . */ =20 +#include "linux/iommu.h" + #include "qemu/osdep.h" #include "hw/boards.h" #include "sysemu/sysemu.h" @@ -847,6 +849,57 @@ static void smmuv3_inv_notifiers_iova(SMMUState *s, in= t asid, } } =20 +static void smmuv3_notify_config_change(SMMUState *bs, uint32_t sid) +{ + IOMMUMemoryRegion *mr =3D smmu_iommu_mr(bs, sid); + SMMUEventInfo event =3D {.type =3D SMMU_EVT_NONE, .sid =3D sid}; + SMMUTransCfg *cfg; + SMMUDevice *sdev; + + if (!mr) { + return; + } + + sdev =3D container_of(mr, SMMUDevice, iommu); + + /* flush QEMU config cache */ + smmuv3_flush_config(sdev); + + if (mr->iommu_notify_flags & IOMMU_NOTIFIER_CONFIG_PASID) { + /* force a guest RAM config structure decoding */ + cfg =3D smmuv3_get_config(sdev, &event); + + if (cfg) { + IOMMUConfig iommu_config =3D { + .pasid_cfg.version =3D PASID_TABLE_CFG_VERSION_1, + .pasid_cfg.format =3D IOMMU_PASID_FORMAT_SMMUV3, + .pasid_cfg.base_ptr =3D cfg->s1ctxptr, + .pasid_cfg.smmuv3.version =3D PASID_TABLE_SMMUV3_CFG_VERSI= ON_1, + }; + + if (cfg->disabled || cfg->bypassed) { + iommu_config.pasid_cfg.config =3D IOMMU_PASID_CONFIG_BYPAS= S; + } else if (cfg->aborted) { + iommu_config.pasid_cfg.config =3D IOMMU_PASID_CONFIG_ABORT; + } else { + iommu_config.pasid_cfg.config =3D IOMMU_PASID_CONFIG_TRANS= LATE; + } + + trace_smmuv3_notify_config_change(mr->parent_obj.name, + iommu_config.pasid_cfg.confi= g, + iommu_config.pasid_cfg.base_= ptr); + + memory_region_config_notify_iommu(mr, 0, + IOMMU_NOTIFIER_CONFIG_PASID, + &iommu_config); + } else { + qemu_log_mask(LOG_GUEST_ERROR, + "%s error decoding the configuration for iommu m= r=3D%s\n", + __func__, mr->parent_obj.name); + } + } +} + static int smmuv3_cmdq_consume(SMMUv3State *s) { SMMUState *bs =3D ARM_SMMU(s); @@ -897,22 +950,14 @@ static int smmuv3_cmdq_consume(SMMUv3State *s) case SMMU_CMD_CFGI_STE: { uint32_t sid =3D CMD_SID(&cmd); - IOMMUMemoryRegion *mr =3D smmu_iommu_mr(bs, sid); - SMMUDevice *sdev; =20 if (CMD_SSEC(&cmd)) { cmd_error =3D SMMU_CERROR_ILL; break; } =20 - if (!mr) { - break; - } - trace_smmuv3_cmdq_cfgi_ste(sid); - sdev =3D container_of(mr, SMMUDevice, iommu); - smmuv3_flush_config(sdev); - + smmuv3_notify_config_change(bs, sid); break; } case SMMU_CMD_CFGI_STE_RANGE: /* same as SMMU_CMD_CFGI_ALL */ @@ -929,14 +974,7 @@ static int smmuv3_cmdq_consume(SMMUv3State *s) trace_smmuv3_cmdq_cfgi_ste_range(start, end); =20 for (i =3D start; i <=3D end; i++) { - IOMMUMemoryRegion *mr =3D smmu_iommu_mr(bs, i); - SMMUDevice *sdev; - - if (!mr) { - continue; - } - sdev =3D container_of(mr, SMMUDevice, iommu); - smmuv3_flush_config(sdev); + smmuv3_notify_config_change(bs, i); } break; } diff --git a/hw/arm/trace-events b/hw/arm/trace-events index 3809005cba..741e645ae2 100644 --- a/hw/arm/trace-events +++ b/hw/arm/trace-events @@ -52,4 +52,5 @@ smmuv3_config_cache_inv(uint32_t sid) "Config cache INV f= or sid %d" smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu= mr=3D%s" smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu= mr=3D%s" smmuv3_inv_notifiers_iova(const char *name, uint16_t asid, uint64_t iova) = "iommu mr=3D%s asid=3D%d iova=3D0x%"PRIx64 +smmuv3_notify_config_change(const char *name, uint8_t config, uint64_t s1c= txptr) "iommu mr=3D%s config=3D%d s1ctxptr=3D0x%"PRIx64 =20 --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:05:57 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 792003091753; Fri, 12 Apr 2019 10:05:55 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id BA0F419C65; Fri, 12 Apr 2019 10:05:44 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:44 +0200 Message-Id: <20190412100354.6409-18-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Fri, 12 Apr 2019 10:05:55 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 17/27] hw/vfio/common: Introduce vfio_alloc_guest_iommu helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Soon this code will be called several times. So let's introduce an helper. Signed-off-by: Eric Auger --- hw/vfio/common.c | 25 ++++++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 0853c8c376..cf876d5264 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -24,6 +24,7 @@ #include #endif #include +#include =20 #include "hw/vfio/vfio-common.h" #include "hw/vfio/vfio.h" @@ -480,6 +481,19 @@ out: rcu_read_unlock(); } =20 +static VFIOGuestIOMMU *vfio_alloc_guest_iommu(VFIOContainer *container, + IOMMUMemoryRegion *iommu, + hwaddr offset) +{ + VFIOGuestIOMMU *giommu =3D g_new0(VFIOGuestIOMMU, 1); + + giommu->container =3D container; + giommu->iommu =3D iommu; + giommu->iommu_offset =3D offset; + /* notifier will be registered separately */ + return giommu; +} + static void vfio_listener_region_add(MemoryListener *listener, MemoryRegionSection *section) { @@ -587,6 +601,7 @@ static void vfio_listener_region_add(MemoryListener *li= stener, if (memory_region_is_iommu(section->mr)) { VFIOGuestIOMMU *giommu; IOMMUMemoryRegion *iommu_mr =3D IOMMU_MEMORY_REGION(section->mr); + hwaddr offset; int iommu_idx; =20 trace_vfio_listener_region_add_iommu(iova, end); @@ -596,11 +611,11 @@ static void vfio_listener_region_add(MemoryListener *= listener, * would be the right place to wire that up (tell the KVM * device emulation the VFIO iommu handles to use). */ - giommu =3D g_malloc0(sizeof(*giommu)); - giommu->iommu =3D iommu_mr; - giommu->iommu_offset =3D section->offset_within_address_space - - section->offset_within_region; - giommu->container =3D container; + + offset =3D section->offset_within_address_space - + section->offset_within_region; + giommu =3D vfio_alloc_guest_iommu(container, iommu_mr, offset); + llend =3D int128_add(int128_make64(section->offset_within_region), section->size); llend =3D int128_sub(llend, int128_one()); --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:06:05 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4665AC057F47; Fri, 12 Apr 2019 10:06:01 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id CC02819C65; Fri, 12 Apr 2019 10:05:55 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:45 +0200 Message-Id: <20190412100354.6409-19-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 12 Apr 2019 10:06:01 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 18/27] hw/vfio/common: Introduce hostwin_from_range helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let's introduce a hostwin_from_range() helper that returns the hostwin encapsulating an IOVA range or NULL if non is found. This improves the readibility of callers and removes the usage of hostwin_found. Signed-off-by: Eric Auger --- hw/vfio/common.c | 37 ++++++++++++++++++------------------- 1 file changed, 18 insertions(+), 19 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index cf876d5264..785d9c191c 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -494,6 +494,19 @@ static VFIOGuestIOMMU *vfio_alloc_guest_iommu(VFIOCont= ainer *container, return giommu; } =20 +static VFIOHostDMAWindow * +hostwin_from_range(VFIOContainer *container, hwaddr iova, hwaddr end) +{ + VFIOHostDMAWindow *hostwin; + + QLIST_FOREACH(hostwin, &container->hostwin_list, hostwin_next) { + if (hostwin->min_iova <=3D iova && end <=3D hostwin->max_iova) { + return hostwin; + } + } + return NULL; +} + static void vfio_listener_region_add(MemoryListener *listener, MemoryRegionSection *section) { @@ -503,7 +516,6 @@ static void vfio_listener_region_add(MemoryListener *li= stener, void *vaddr; int ret; VFIOHostDMAWindow *hostwin; - bool hostwin_found; =20 if (vfio_listener_skipped_section(section)) { trace_vfio_listener_region_add_skip( @@ -580,15 +592,8 @@ static void vfio_listener_region_add(MemoryListener *l= istener, #endif } =20 - hostwin_found =3D false; - QLIST_FOREACH(hostwin, &container->hostwin_list, hostwin_next) { - if (hostwin->min_iova <=3D iova && end <=3D hostwin->max_iova) { - hostwin_found =3D true; - break; - } - } - - if (!hostwin_found) { + hostwin =3D hostwin_from_range(container, iova, end); + if (!hostwin) { error_report("vfio: IOMMU container %p can't map guest IOVA region" " 0x%"HWADDR_PRIx"..0x%"HWADDR_PRIx, container, iova, end); @@ -759,16 +764,10 @@ static void vfio_listener_region_del(MemoryListener *= listener, =20 if (memory_region_is_ram_device(section->mr)) { hwaddr pgmask; - VFIOHostDMAWindow *hostwin; - bool hostwin_found =3D false; + VFIOHostDMAWindow *hostwin =3D + hostwin_from_range(container, iova, end); =20 - QLIST_FOREACH(hostwin, &container->hostwin_list, hostwin_next) { - if (hostwin->min_iova <=3D iova && end <=3D hostwin->max_iova)= { - hostwin_found =3D true; - break; - } - } - assert(hostwin_found); /* or region_add() would have failed */ + assert(hostwin); /* or region_add() would have failed */ =20 pgmask =3D (1ULL << ctz64(hostwin->iova_pgsizes)) - 1; try_unmap =3D !((iova & pgmask) || (int128_get64(llsize) & pgmask)= ); --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555064266; cv=none; d=zoho.com; s=zohoarc; b=OcPWcg9n2ROvULJbm53GDUXR3Tu+40bBDS54YajjNKZHq25mW2evHJoWScuLbjV4u34qPn3iCQum6pm4fg8q7FrJDuKkI/TRfiX3oGWYwhhrIsajIbH70nn8EE1Vf/1Iv2QbjaOlWdqmA5Qw7X3FaGi5b2R1DLgbAFEl195ETuY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1555064266; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Fri, 12 Apr 2019 06:06:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEt4V-0004u6-0E for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:06:12 -0400 Received: from mx1.redhat.com ([209.132.183.28]:60124) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEt4P-0004pz-KL; Fri, 12 Apr 2019 06:06:07 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 31EC13086236; Fri, 12 Apr 2019 10:06:04 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9C4C919C65; Fri, 12 Apr 2019 10:06:01 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:46 +0200 Message-Id: <20190412100354.6409-20-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Fri, 12 Apr 2019 10:06:04 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 19/27] hw/vfio/common: Introduce helpers to DMA map/unap a RAM section X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let's introduce two helpers that allow to DMA map/unmap a RAM section. Those helpers will be called for nested stage setup in another call site. Also the vfio_listener_region_add/del() structure may be clearer. Signed-off-by: Eric Auger --- hw/vfio/common.c | 178 ++++++++++++++++++++++++++----------------- hw/vfio/trace-events | 4 +- 2 files changed, 109 insertions(+), 73 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 785d9c191c..cb541330d7 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -507,13 +507,116 @@ hostwin_from_range(VFIOContainer *container, hwaddr = iova, hwaddr end) return NULL; } =20 +static int vfio_dma_map_ram_section(VFIOContainer *container, + MemoryRegionSection *section) +{ + VFIOHostDMAWindow *hostwin; + Int128 llend, llsize; + hwaddr iova, end; + void *vaddr; + int ret; + + assert(memory_region_is_ram(section->mr)); + + iova =3D TARGET_PAGE_ALIGN(section->offset_within_address_space); + llend =3D int128_make64(section->offset_within_address_space); + llend =3D int128_add(llend, section->size); + llend =3D int128_and(llend, int128_exts64(TARGET_PAGE_MASK)); + end =3D int128_get64(int128_sub(llend, int128_one())); + + vaddr =3D memory_region_get_ram_ptr(section->mr) + + section->offset_within_region + + (iova - section->offset_within_address_space); + + hostwin =3D hostwin_from_range(container, iova, end); + if (!hostwin) { + error_report("vfio: IOMMU container %p can't map guest IOVA region" + " 0x%"HWADDR_PRIx"..0x%"HWADDR_PRIx, + container, iova, end); + return -EFAULT; + } + + trace_vfio_dma_map_ram(iova, end, vaddr); + + llsize =3D int128_sub(llend, int128_make64(iova)); + + if (memory_region_is_ram_device(section->mr)) { + hwaddr pgmask =3D (1ULL << ctz64(hostwin->iova_pgsizes)) - 1; + + if ((iova & pgmask) || (int128_get64(llsize) & pgmask)) { + trace_vfio_listener_region_add_no_dma_map( + memory_region_name(section->mr), + section->offset_within_address_space, + int128_getlo(section->size), + pgmask + 1); + return 0; + } + } + + ret =3D vfio_dma_map(container, iova, int128_get64(llsize), + vaddr, section->readonly); + if (ret) { + error_report("vfio_dma_map(%p, 0x%"HWADDR_PRIx", " + "0x%"HWADDR_PRIx", %p) =3D %d (%m)", + container, iova, int128_get64(llsize), vaddr, ret); + if (memory_region_is_ram_device(section->mr)) { + /* Allow unexpected mappings not to be fatal for RAM devices */ + return 0; + } + return ret; + } + return 0; +} + +static void vfio_dma_unmap_ram_section(VFIOContainer *container, + MemoryRegionSection *section) +{ + Int128 llend, llsize; + hwaddr iova, end; + bool try_unmap =3D true; + int ret; + + iova =3D TARGET_PAGE_ALIGN(section->offset_within_address_space); + llend =3D int128_make64(section->offset_within_address_space); + llend =3D int128_add(llend, section->size); + llend =3D int128_and(llend, int128_exts64(TARGET_PAGE_MASK)); + + if (int128_ge(int128_make64(iova), llend)) { + return; + } + end =3D int128_get64(int128_sub(llend, int128_one())); + + llsize =3D int128_sub(llend, int128_make64(iova)); + + trace_vfio_dma_unmap_ram(iova, end); + + if (memory_region_is_ram_device(section->mr)) { + hwaddr pgmask; + VFIOHostDMAWindow *hostwin =3D + hostwin_from_range(container, iova, end); + + assert(hostwin); /* or region_add() would have failed */ + + pgmask =3D (1ULL << ctz64(hostwin->iova_pgsizes)) - 1; + try_unmap =3D !((iova & pgmask) || (int128_get64(llsize) & pgmask)= ); + } + + if (try_unmap) { + ret =3D vfio_dma_unmap(container, iova, int128_get64(llsize)); + if (ret) { + error_report("vfio_dma_unmap(%p, 0x%"HWADDR_PRIx", " + "0x%"HWADDR_PRIx") =3D %d (%m)", + container, iova, int128_get64(llsize), ret); + } + } +} + static void vfio_listener_region_add(MemoryListener *listener, MemoryRegionSection *section) { VFIOContainer *container =3D container_of(listener, VFIOContainer, lis= tener); hwaddr iova, end; - Int128 llend, llsize; - void *vaddr; + Int128 llend; int ret; VFIOHostDMAWindow *hostwin; =20 @@ -640,41 +743,10 @@ static void vfio_listener_region_add(MemoryListener *= listener, } =20 /* Here we assume that memory_region_is_ram(section->mr)=3D=3Dtrue */ - - vaddr =3D memory_region_get_ram_ptr(section->mr) + - section->offset_within_region + - (iova - section->offset_within_address_space); - - trace_vfio_listener_region_add_ram(iova, end, vaddr); - - llsize =3D int128_sub(llend, int128_make64(iova)); - - if (memory_region_is_ram_device(section->mr)) { - hwaddr pgmask =3D (1ULL << ctz64(hostwin->iova_pgsizes)) - 1; - - if ((iova & pgmask) || (int128_get64(llsize) & pgmask)) { - trace_vfio_listener_region_add_no_dma_map( - memory_region_name(section->mr), - section->offset_within_address_space, - int128_getlo(section->size), - pgmask + 1); - return; - } - } - - ret =3D vfio_dma_map(container, iova, int128_get64(llsize), - vaddr, section->readonly); + ret =3D vfio_dma_map_ram_section(container, section); if (ret) { - error_report("vfio_dma_map(%p, 0x%"HWADDR_PRIx", " - "0x%"HWADDR_PRIx", %p) =3D %d (%m)", - container, iova, int128_get64(llsize), vaddr, ret); - if (memory_region_is_ram_device(section->mr)) { - /* Allow unexpected mappings not to be fatal for RAM devices */ - return; - } goto fail; } - return; =20 fail: @@ -700,10 +772,6 @@ static void vfio_listener_region_del(MemoryListener *l= istener, MemoryRegionSection *section) { VFIOContainer *container =3D container_of(listener, VFIOContainer, lis= tener); - hwaddr iova, end; - Int128 llend, llsize; - int ret; - bool try_unmap =3D true; =20 if (vfio_listener_skipped_section(section)) { trace_vfio_listener_region_del_skip( @@ -748,39 +816,7 @@ static void vfio_listener_region_del(MemoryListener *l= istener, */ } =20 - iova =3D TARGET_PAGE_ALIGN(section->offset_within_address_space); - llend =3D int128_make64(section->offset_within_address_space); - llend =3D int128_add(llend, section->size); - llend =3D int128_and(llend, int128_exts64(TARGET_PAGE_MASK)); - - if (int128_ge(int128_make64(iova), llend)) { - return; - } - end =3D int128_get64(int128_sub(llend, int128_one())); - - llsize =3D int128_sub(llend, int128_make64(iova)); - - trace_vfio_listener_region_del(iova, end); - - if (memory_region_is_ram_device(section->mr)) { - hwaddr pgmask; - VFIOHostDMAWindow *hostwin =3D - hostwin_from_range(container, iova, end); - - assert(hostwin); /* or region_add() would have failed */ - - pgmask =3D (1ULL << ctz64(hostwin->iova_pgsizes)) - 1; - try_unmap =3D !((iova & pgmask) || (int128_get64(llsize) & pgmask)= ); - } - - if (try_unmap) { - ret =3D vfio_dma_unmap(container, iova, int128_get64(llsize)); - if (ret) { - error_report("vfio_dma_unmap(%p, 0x%"HWADDR_PRIx", " - "0x%"HWADDR_PRIx") =3D %d (%m)", - container, iova, int128_get64(llsize), ret); - } - } + vfio_dma_unmap_ram_section(container, section); =20 memory_region_unref(section->mr); =20 diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events index eb589930a5..3c2cd15e3f 100644 --- a/hw/vfio/trace-events +++ b/hw/vfio/trace-events @@ -93,10 +93,10 @@ vfio_iommu_map_notify(const char *op, uint64_t iova_sta= rt, uint64_t iova_end) "i vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING regi= on_add 0x%"PRIx64" - 0x%"PRIx64 vfio_spapr_group_attach(int groupfd, int tablefd) "Attached groupfd %d to = liobn fd %d" vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [= iommu] 0x%"PRIx64" - 0x%"PRIx64 -vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void = *vaddr) "region_add [ram] 0x%"PRIx64" - 0x%"PRIx64" [%p]" +vfio_dma_map_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "reg= ion_add [ram] 0x%"PRIx64" - 0x%"PRIx64" [%p]" vfio_listener_region_add_no_dma_map(const char *name, uint64_t iova, uint6= 4_t size, uint64_t page_size) "Region \"%s\" 0x%"PRIx64" size=3D0x%"PRIx64"= is not aligned to 0x%"PRIx64" and cannot be mapped for DMA" vfio_listener_region_del_skip(uint64_t start, uint64_t end) "SKIPPING regi= on_del 0x%"PRIx64" - 0x%"PRIx64 -vfio_listener_region_del(uint64_t start, uint64_t end) "region_del 0x%"PRI= x64" - 0x%"PRIx64 +vfio_dma_unmap_ram(uint64_t start, uint64_t end) "region_del 0x%"PRIx64" -= 0x%"PRIx64 vfio_disconnect_container(int fd) "close container->fd=3D%d" vfio_put_group(int fd) "close group->fd=3D%d" vfio_get_device(const char * name, unsigned int flags, unsigned int num_re= gions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u" --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:06:15 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0E021308FBB1; Fri, 12 Apr 2019 10:06:14 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8555219C65; Fri, 12 Apr 2019 10:06:04 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:47 +0200 Message-Id: <20190412100354.6409-21-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 12 Apr 2019 10:06:14 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 20/27] hw/vfio/common: Setup nested stage mappings X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In nested mode, legacy vfio_iommu_map_notify cannot be used as there is no "caching" mode and we do not trap on map. On Intel, vfio_iommu_map_notify was used to DMA map the RAM through the host single stage. With nested mode, we need to setup the stage 2 and the stage 1 separately. This patch introduces a prereg_lsitener to setup the stage 2 mapping. The stage 1 mapping, owned by the guest, is passed to the host when the guest invalidates the stage 1 configuration, through a dedicated config IOMMU notifier. Guest IOTLB invalidations are cascaded downto the host through another IOMMU MR UNMAP notifier. Signed-off-by: Eric Auger --- v2 -> v3: - use VFIO_IOMMU_ATTACH_PASID_TABLE - new user API - handle leaf v1 -> v2: - adapt to uapi changes - pass the asid - pass IOMMU_NOTIFIER_S1_CFG when initializing the config notifier --- hw/vfio/common.c | 147 +++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 136 insertions(+), 11 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index cb541330d7..e9b729a503 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -428,6 +428,67 @@ static bool vfio_get_vaddr(IOMMUTLBEntry *iotlb, void = **vaddr, return true; } =20 +/* Pass the guest stage 1 config to the host */ +static void vfio_iommu_nested_notify(IOMMUNotifier *n, IOMMUConfig *cfg) +{ + VFIOGuestIOMMU *giommu =3D container_of(n, VFIOGuestIOMMU, n); + VFIOContainer *container =3D giommu->container; + struct vfio_iommu_type1_attach_pasid_table info; + int ret; + + info.argsz =3D sizeof(info); + info.flags =3D 0; + memcpy(&info.config, &cfg->pasid_cfg, sizeof(cfg->pasid_cfg)); + + ret =3D ioctl(container->fd, VFIO_IOMMU_ATTACH_PASID_TABLE, &info); + if (ret) { + error_report("%p: failed to pass S1 config to the host (%d)", + container, ret); + } +} + +/* Propagate a guest IOTLB invalidation to the host (nested mode) */ +static void vfio_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) +{ + VFIOGuestIOMMU *giommu =3D container_of(n, VFIOGuestIOMMU, n); + hwaddr start =3D iotlb->iova + giommu->iommu_offset; + + VFIOContainer *container =3D giommu->container; + struct vfio_iommu_type1_cache_invalidate ustruct; + size_t size =3D iotlb->addr_mask + 1; + int ret; + + assert(iotlb->perm =3D=3D IOMMU_NONE); + + ustruct.argsz =3D sizeof(ustruct); + ustruct.flags =3D 0; + ustruct.info.version =3D IOMMU_CACHE_INVALIDATE_INFO_VERSION_1; + + if (size <=3D 0x10000) { + ustruct.info.cache =3D IOMMU_CACHE_INV_TYPE_IOTLB; + ustruct.info.granularity =3D IOMMU_INV_GRANU_ADDR; + ustruct.info.addr_info.flags =3D IOMMU_INV_ADDR_FLAGS_PASID; + if (iotlb->leaf) { + ustruct.info.addr_info.flags |=3D IOMMU_INV_ADDR_FLAGS_LEAF; + } + ustruct.info.addr_info.pasid =3D iotlb->arch_id; + ustruct.info.addr_info.addr =3D start; + ustruct.info.addr_info.granule_size =3D size; + ustruct.info.addr_info.nb_granules =3D 1; + } else { + ustruct.info.cache =3D IOMMU_CACHE_INV_TYPE_IOTLB; + ustruct.info.granularity =3D IOMMU_INV_GRANU_PASID; + ustruct.info.pasid =3D iotlb->arch_id; + } + + ret =3D ioctl(container->fd, VFIO_IOMMU_CACHE_INVALIDATE, &ustruct); + if (ret) { + error_report("%p: failed to invalidate CACHE for 0x%"PRIx64 + " mask=3D0x%"PRIx64" (%d)", + container, start, iotlb->addr_mask, ret); + } +} + static void vfio_iommu_map_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) { VFIOGuestIOMMU *giommu =3D container_of(n, VFIOGuestIOMMU, n); @@ -611,6 +672,32 @@ static void vfio_dma_unmap_ram_section(VFIOContainer *= container, } } =20 +static void vfio_prereg_listener_region_add(MemoryListener *listener, + MemoryRegionSection *section) +{ + VFIOContainer *container =3D + container_of(listener, VFIOContainer, prereg_listener); + + if (!memory_region_is_ram(section->mr)) { + return; + } + + vfio_dma_map_ram_section(container, section); + +} +static void vfio_prereg_listener_region_del(MemoryListener *listener, + MemoryRegionSection *section) +{ + VFIOContainer *container =3D + container_of(listener, VFIOContainer, prereg_listener); + + if (!memory_region_is_ram(section->mr)) { + return; + } + + vfio_dma_unmap_ram_section(container, section); +} + static void vfio_listener_region_add(MemoryListener *listener, MemoryRegionSection *section) { @@ -722,21 +809,40 @@ static void vfio_listener_region_add(MemoryListener *= listener, =20 offset =3D section->offset_within_address_space - section->offset_within_region; - giommu =3D vfio_alloc_guest_iommu(container, iommu_mr, offset); - llend =3D int128_add(int128_make64(section->offset_within_region), section->size); llend =3D int128_sub(llend, int128_one()); iommu_idx =3D memory_region_iommu_attrs_to_index(iommu_mr, MEMTXATTRS_UNSPECIF= IED); - iommu_iotlb_notifier_init(&giommu->n, vfio_iommu_map_notify, - IOMMU_NOTIFIER_IOTLB_ALL, - section->offset_within_region, - int128_get64(llend), - iommu_idx); - QLIST_INSERT_HEAD(&container->giommu_list, giommu, giommu_next); =20 - memory_region_register_iommu_notifier(section->mr, &giommu->n); + if (container->iommu_type =3D=3D VFIO_TYPE1_NESTING_IOMMU) { + /* Config notifier to propagate guest stage 1 config changes */ + giommu =3D vfio_alloc_guest_iommu(container, iommu_mr, offset); + iommu_config_notifier_init(&giommu->n, vfio_iommu_nested_notif= y, + IOMMU_NOTIFIER_CONFIG_PASID, iommu_= idx); + QLIST_INSERT_HEAD(&container->giommu_list, giommu, giommu_next= ); + memory_region_register_iommu_notifier(section->mr, &giommu->n); + + /* IOTLB unmap notifier to propagate guest IOTLB invalidations= */ + giommu =3D vfio_alloc_guest_iommu(container, iommu_mr, offset); + iommu_iotlb_notifier_init(&giommu->n, vfio_iommu_unmap_notify, + IOMMU_NOTIFIER_IOTLB_UNMAP, + section->offset_within_region, + int128_get64(llend), + iommu_idx); + QLIST_INSERT_HEAD(&container->giommu_list, giommu, giommu_next= ); + memory_region_register_iommu_notifier(section->mr, &giommu->n); + } else { + /* MAP/UNMAP IOTLB notifier */ + giommu =3D vfio_alloc_guest_iommu(container, iommu_mr, offset); + iommu_iotlb_notifier_init(&giommu->n, vfio_iommu_map_notify, + IOMMU_NOTIFIER_IOTLB_ALL, + section->offset_within_region, + int128_get64(llend), + iommu_idx); + QLIST_INSERT_HEAD(&container->giommu_list, giommu, giommu_next= ); + memory_region_register_iommu_notifier(section->mr, &giommu->n); + } memory_region_iommu_replay(giommu->iommu, &giommu->n); =20 return; @@ -833,15 +939,21 @@ static void vfio_listener_region_del(MemoryListener *= listener, } } =20 -static const MemoryListener vfio_memory_listener =3D { +static MemoryListener vfio_memory_listener =3D { .region_add =3D vfio_listener_region_add, .region_del =3D vfio_listener_region_del, }; =20 +static MemoryListener vfio_memory_prereg_listener =3D { + .region_add =3D vfio_prereg_listener_region_add, + .region_del =3D vfio_prereg_listener_region_del, +}; + static void vfio_listener_release(VFIOContainer *container) { memory_listener_unregister(&container->listener); - if (container->iommu_type =3D=3D VFIO_SPAPR_TCE_v2_IOMMU) { + if (container->iommu_type =3D=3D VFIO_SPAPR_TCE_v2_IOMMU || + container->iommu_type =3D=3D VFIO_TYPE1_NESTING_IOMMU) { memory_listener_unregister(&container->prereg_listener); } } @@ -1337,6 +1449,19 @@ static int vfio_connect_container(VFIOGroup *group, = AddressSpace *as, } vfio_host_win_add(container, 0, (hwaddr)-1, info.iova_pgsizes); container->pgsizes =3D info.iova_pgsizes; + + if (container->iommu_type =3D=3D VFIO_TYPE1_NESTING_IOMMU) { + container->prereg_listener =3D vfio_memory_prereg_listener; + memory_listener_register(&container->prereg_listener, + &address_space_memory); + if (container->error) { + memory_listener_unregister(&container->prereg_listener); + ret =3D container->error; + error_setg(errp, "RAM memory listener initialization faile= d " + " for container"); + goto free_container_exit; + } + } break; } case VFIO_SPAPR_TCE_v2_IOMMU: --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:06:30 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7DD7F3092642; Fri, 12 Apr 2019 10:06:29 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6239219C65; Fri, 12 Apr 2019 10:06:14 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:48 +0200 Message-Id: <20190412100354.6409-22-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 12 Apr 2019 10:06:29 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 21/27] hw/vfio/common: Register a MAP notifier for MSI binding X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Instantiate a MAP notifier to register the MSI stage 1 binding (gIOVA -> gDB) to the host. This allows the host to build a nested mapping towards the physical doorbell: guest IOVA -> guest Doorbell -> physical doorbell. Stage1 Stage 2 The unregistration is done on VFIO container deallocation. Signed-off-by: Eric Auger --- v2 -> v3: - only register the notifier if the IOMMU translates MSIs - record the msi bindings in a container list and unregister on container release --- hw/vfio/common.c | 69 +++++++++++++++++++++++++++++++++++ include/hw/vfio/vfio-common.h | 8 ++++ 2 files changed, 77 insertions(+) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index e9b729a503..051be723fd 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -489,6 +489,56 @@ static void vfio_iommu_unmap_notify(IOMMUNotifier *n, = IOMMUTLBEntry *iotlb) } } =20 +static void vfio_iommu_msi_map_notify(IOMMUNotifier *n, IOMMUTLBEntry *iot= lb) +{ + VFIOGuestIOMMU *giommu =3D container_of(n, VFIOGuestIOMMU, n); + VFIOContainer *container =3D giommu->container; + int ret; + + struct vfio_iommu_type1_bind_msi ustruct; + VFIOMSIBinding *binding; + + QLIST_FOREACH(binding, &container->msibinding_list, next) { + if (binding->iova =3D=3D iotlb->iova) { + return; + } + } + ustruct.argsz =3D sizeof(struct vfio_iommu_type1_bind_msi); + ustruct.flags =3D 0; + + ustruct.iova =3D iotlb->iova; + ustruct.gpa =3D iotlb->translated_addr; + ustruct.size =3D iotlb->addr_mask + 1; + ret =3D ioctl(container->fd, VFIO_IOMMU_BIND_MSI , &ustruct); + if (ret) { + error_report("%s: failed to register the stage1 MSI binding (%d)", + __func__, ret); + } + binding =3D g_new0(VFIOMSIBinding, 1); + binding->iova =3D ustruct.iova; + binding->gpa =3D ustruct.gpa; + binding->size =3D ustruct.size; + + QLIST_INSERT_HEAD(&container->msibinding_list, binding, next); +} + +static void vfio_container_unbind_msis(VFIOContainer *container) +{ + VFIOMSIBinding *binding, *tmp; + + QLIST_FOREACH_SAFE(binding, &container->msibinding_list, next, tmp) { + struct vfio_iommu_type1_unbind_msi ustruct; + + /* the MSI doorbell is not used anymore, unregister it */ + ustruct.argsz =3D sizeof(struct vfio_iommu_type1_unbind_msi); + ustruct.flags =3D 0; + ustruct.iova =3D binding->iova; + ioctl(container->fd, VFIO_IOMMU_UNBIND_MSI , &ustruct); + QLIST_REMOVE(binding, next); + g_free(binding); + } +} + static void vfio_iommu_map_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb) { VFIOGuestIOMMU *giommu =3D container_of(n, VFIOGuestIOMMU, n); @@ -816,6 +866,8 @@ static void vfio_listener_region_add(MemoryListener *li= stener, MEMTXATTRS_UNSPECIF= IED); =20 if (container->iommu_type =3D=3D VFIO_TYPE1_NESTING_IOMMU) { + bool translate_msi; + /* Config notifier to propagate guest stage 1 config changes */ giommu =3D vfio_alloc_guest_iommu(container, iommu_mr, offset); iommu_config_notifier_init(&giommu->n, vfio_iommu_nested_notif= y, @@ -832,6 +884,21 @@ static void vfio_listener_region_add(MemoryListener *l= istener, iommu_idx); QLIST_INSERT_HEAD(&container->giommu_list, giommu, giommu_next= ); memory_region_register_iommu_notifier(section->mr, &giommu->n); + + memory_region_iommu_get_attr(iommu_mr, IOMMU_ATTR_MSI_TRANSLAT= E, + (void *)&translate_msi); + if (translate_msi) { + giommu =3D vfio_alloc_guest_iommu(container, iommu_mr, off= set); + iommu_iotlb_notifier_init(&giommu->n, + vfio_iommu_msi_map_notify, + IOMMU_NOTIFIER_IOTLB_MAP, + section->offset_within_region, + int128_get64(llend), + iommu_idx); + QLIST_INSERT_HEAD(&container->giommu_list, giommu, + giommu_next); + memory_region_register_iommu_notifier(section->mr, &giommu= ->n); + } } else { /* MAP/UNMAP IOTLB notifier */ giommu =3D vfio_alloc_guest_iommu(container, iommu_mr, offset); @@ -1608,6 +1675,8 @@ static void vfio_disconnect_container(VFIOGroup *grou= p) g_free(giommu); } =20 + vfio_container_unbind_msis(container); + trace_vfio_disconnect_container(container->fd); close(container->fd); g_free(container); diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/vfio-common.h index 686d99ff8c..c862d87725 100644 --- a/include/hw/vfio/vfio-common.h +++ b/include/hw/vfio/vfio-common.h @@ -64,6 +64,13 @@ typedef struct VFIOAddressSpace { QLIST_ENTRY(VFIOAddressSpace) list; } VFIOAddressSpace; =20 +typedef struct VFIOMSIBinding { + hwaddr iova; + hwaddr gpa; + hwaddr size; + QLIST_ENTRY(VFIOMSIBinding) next; +} VFIOMSIBinding; + struct VFIOGroup; =20 typedef struct VFIOContainer { @@ -83,6 +90,7 @@ typedef struct VFIOContainer { QLIST_HEAD(, VFIOGuestIOMMU) giommu_list; QLIST_HEAD(, VFIOHostDMAWindow) hostwin_list; QLIST_HEAD(, VFIOGroup) group_list; + QLIST_HEAD(, VFIOMSIBinding) msibinding_list; QLIST_ENTRY(VFIOContainer) next; } VFIOContainer; =20 --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555064866; cv=none; d=zoho.com; s=zohoarc; b=Kp2fZurqz/Nc+dZXdrkDah+bIv88GgdgWLG2lKJfZhi54RT0chwYCOvUxIzl9VzGQLX0H3FJCwlUu8ZFbD8RBcZvC+yPNewTlR9GBwEny28ckgbXZmb2dO9G83+ZpSqe5KjW6LqEl4c8jsKdkjbCXsquD1e/KBlX6gkjW2qot5A= ARC-Message-Signature: i=1; a=rsa-sha256; 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Fri, 12 Apr 2019 10:06:29 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:49 +0200 Message-Id: <20190412100354.6409-23-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Fri, 12 Apr 2019 10:06:41 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 22/27] vfio-pci: Expose MSI stage 1 bindings to the host X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" When the guest is exposed with a virtual IOMMU that translates MSIs, the guest allocates an IOVA (gIOVA) that maps the virtual doorbell (gDB). In nested mode, when the MSI is setup, we pass this stage1 mapping to the host so that it can use this stage1 binding to create a nested stage translating into the physical doorbell. Conversely, when the MSI setup os torn down, we unregister this binding. For registration, We directly use the iommu memory region translate() callback since the addr_mask is returned in the IOTLB entry. address_space_translate does not return this information. Now that we use a MAP notifier, let's remove warning against the usage of map notifiers (historically used along with Intel's caching mode). Signed-off-by: Eric Auger --- hw/arm/smmuv3.c | 8 -------- hw/vfio/pci.c | 48 ++++++++++++++++++++++++++++++++++++++++++++ hw/vfio/trace-events | 2 ++ 3 files changed, 50 insertions(+), 8 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 2574989f2e..a7e48e7972 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1517,14 +1517,6 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryRe= gion *iommu, SMMUv3State *s3 =3D sdev->smmu; SMMUState *s =3D &(s3->smmu_state); =20 - if (new & IOMMU_NOTIFIER_IOTLB_MAP) { - int bus_num =3D pci_bus_num(sdev->bus); - PCIDevice *pcidev =3D pci_find_device(sdev->bus, bus_num, sdev->de= vfn); - - warn_report("SMMUv3 does not support notification on MAP: " - "device %s will not function properly", pcidev->name); - } - if (old =3D=3D IOMMU_NOTIFIER_NONE) { trace_smmuv3_notify_flag_add(iommu->parent_obj.name); QLIST_INSERT_HEAD(&s->devices_with_notifiers, sdev, next); diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index cd93ff6fa3..aeb4dfa388 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -402,6 +402,48 @@ static int vfio_enable_vectors(VFIOPCIDevice *vdev, bo= ol msix) return ret; } =20 +static int vfio_register_msi_binding(VFIOPCIDevice *vdev, int vector_n) +{ + PCIDevice *dev =3D &vdev->pdev; + AddressSpace *as =3D pci_device_iommu_address_space(dev); + MSIMessage msg =3D pci_get_msi_message(dev, vector_n); + IOMMUMemoryRegionClass *imrc; + IOMMUMemoryRegion *iommu_mr; + bool msi_translate =3D false, nested =3D false;; + IOMMUTLBEntry entry; + + if (as =3D=3D &address_space_memory) { + return 0; + } + + iommu_mr =3D IOMMU_MEMORY_REGION(as->root); + memory_region_iommu_get_attr(iommu_mr, IOMMU_ATTR_MSI_TRANSLATE, + (void *)&msi_translate); + memory_region_iommu_get_attr(iommu_mr, IOMMU_ATTR_VFIO_NESTED, + (void *)&nested); + imrc =3D memory_region_get_iommu_class_nocheck(iommu_mr); + + if (!nested || !msi_translate) { + return 0; + } + + /* MSI doorbell address is translated by an IOMMU */ + + rcu_read_lock(); + entry =3D imrc->translate(iommu_mr, msg.address, IOMMU_WO, 0); + rcu_read_unlock(); + + if (entry.perm =3D=3D IOMMU_NONE) { + return -ENOENT; + } + + trace_vfio_register_msi_binding(vdev->vbasedev.name, vector_n, + msg.address, entry.translated_addr); + + memory_region_iotlb_notify_iommu(iommu_mr, 0, entry); + return 0; +} + static void vfio_add_kvm_msi_virq(VFIOPCIDevice *vdev, VFIOMSIVector *vect= or, int vector_n, bool msix) { @@ -487,6 +529,12 @@ static int vfio_msix_vector_do_use(PCIDevice *pdev, un= signed int nr, } } =20 + ret =3D vfio_register_msi_binding(vdev, nr); + + if (ret) { + error_report("%s failed to register S1 MSI binding(%d)", __func__,= ret); + } + /* * We don't want to have the host allocate all possible MSI vectors * for a device if they're not in use, so we shutdown and incrementally diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events index 3c2cd15e3f..52b96ec196 100644 --- a/hw/vfio/trace-events +++ b/hw/vfio/trace-events @@ -111,6 +111,8 @@ vfio_region_sparse_mmap_header(const char *name, int in= dex, int nr_areas) "Devic vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long en= d) "sparse entry %d [0x%lx - 0x%lx]" vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t s= ubtype) "%s index %d, %08x/%0x8" vfio_dma_unmap_overflow_workaround(void) "" +vfio_register_msi_binding(const char *name, int vector, uint64_t giova, ui= nt64_t gdb) "%s: register vector %d gIOVA=3D0x%"PRIx64 "-> gDB=3D0x%"PRIx64= " stage 1 mapping" +vfio_unregister_msi_binding(const char *name, int vector, uint64_t giova) = "%s: unregister vector %d gIOVA=3D0x%"PRIx64 " stage 1 mapping" =20 # platform.c vfio_platform_base_device_init(char *name, int groupid) "%s belongs to gro= up #%d" --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 12 Apr 2019 06:06:44 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C1489C062ED6; Fri, 12 Apr 2019 10:06:43 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3A72119C65; Fri, 12 Apr 2019 10:06:41 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:50 +0200 Message-Id: <20190412100354.6409-24-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Fri, 12 Apr 2019 10:06:43 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 23/27] memory: Introduce IOMMU Memory Region inject_faults API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" This new API allows to inject @count iommu_faults into the IOMMU memory region. Signed-off-by: Eric Auger --- include/exec/memory.h | 26 ++++++++++++++++++++++++++ memory.c | 12 ++++++++++++ 2 files changed, 38 insertions(+) diff --git a/include/exec/memory.h b/include/exec/memory.h index aedebc8471..6262de1684 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -400,6 +400,20 @@ typedef struct IOMMUMemoryRegionClass { * @iommu: the IOMMUMemoryRegion */ int (*num_indexes)(IOMMUMemoryRegion *iommu); + +#ifdef CONFIG_LINUX + /* Inject @count faults into the IOMMU memory region + * + * Optional method: if this method is not provided, then + * memory_region_injection_faults() will return -ENOENT + * + * @iommu: the IOMMU memory region to inject the faults in + * @count: number of faults to inject + * @buf: fault buffer + */ + int (*inject_faults)(IOMMUMemoryRegion *iommu, int count, + struct iommu_fault *buf); +#endif } IOMMUMemoryRegionClass; =20 typedef struct CoalescedMemoryRange CoalescedMemoryRange; @@ -1216,6 +1230,18 @@ int memory_region_iommu_attrs_to_index(IOMMUMemoryRe= gion *iommu_mr, */ int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr); =20 +#ifdef CONFIG_LINUX +/** + * memory_region_inject_faults : inject @count faults stored in @buf + * + * @iommu_mr: the IOMMU memory region + * @count: number of faults to be injected + * @buf: buffer containing the faults + */ +int memory_region_inject_faults(IOMMUMemoryRegion *iommu_mr, int count, + struct iommu_fault *buf); +#endif + /** * memory_region_name: get a memory region's name * diff --git a/memory.c b/memory.c index 8cd3c65872..2eac24cb80 100644 --- a/memory.c +++ b/memory.c @@ -2037,6 +2037,18 @@ int memory_region_iommu_num_indexes(IOMMUMemoryRegio= n *iommu_mr) return imrc->num_indexes(iommu_mr); } =20 +#ifdef CONFIG_LINUX +int memory_region_inject_faults(IOMMUMemoryRegion *iommu_mr, int count, + struct iommu_fault *buf) +{ + IOMMUMemoryRegionClass *imrc =3D IOMMU_MEMORY_REGION_GET_CLASS(iommu_m= r); + if (!imrc->inject_faults) { + return -ENOENT; + } + return imrc->inject_faults(iommu_mr, count, buf); +} +#endif + void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) { uint8_t mask =3D 1 << client; --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555064468; cv=none; d=zoho.com; s=zohoarc; b=W2IWCnVs38zfTAuc9XEiG3GwRTXkwtS/Z255Shnkwty8QJnFvjBx+VDa/dQSbEOTtAW3NfeM/U1RYbDm/v6iZmCnZ9YVxS+Bvv3//yAzx/AerdNnypSTbaIZEFsjhcWgyqm6BDPvImWKTvxnGuviH2+fmfd1dPw+Lpm+GqWHJuo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1555064468; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Fri, 12 Apr 2019 06:06:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEt58-0005Sn-6i for qemu-devel@nongnu.org; Fri, 12 Apr 2019 06:06:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54976) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEt55-0005Qh-HF; Fri, 12 Apr 2019 06:06:47 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id AE2E53082E5F; Fri, 12 Apr 2019 10:06:46 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 216D519C65; Fri, 12 Apr 2019 10:06:43 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:51 +0200 Message-Id: <20190412100354.6409-25-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.46]); Fri, 12 Apr 2019 10:06:46 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 24/27] hw/arm/smmuv3: Implement fault injection X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We convert iommu_fault structs received from the kernel into the data struct used by the emulation code and record the evnts into the virtual event queue. Signed-off-by: Eric Auger --- Exhaustive mapping remains to be done --- hw/arm/smmuv3.c | 65 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index a7e48e7972..ddd6564001 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1545,6 +1545,70 @@ smmuv3_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNoti= fier *n) { } =20 +static inline int +smmuv3_inject_faults(IOMMUMemoryRegion *iommu_mr, int count, + struct iommu_fault *buf) +{ + SMMUDevice *sdev =3D container_of(iommu_mr, SMMUDevice, iommu); + SMMUv3State *s3 =3D sdev->smmu; + uint32_t sid =3D smmu_get_sid(sdev); + int i; + + for (i =3D 0; i < count; i++) { + SMMUEventInfo info =3D {}; + struct iommu_fault_unrecoverable *record; + + if (buf[i].type !=3D IOMMU_FAULT_DMA_UNRECOV) { + continue; + } + + info.sid =3D sid; + record =3D &buf[i].event; + + switch (record->reason) { + case IOMMU_FAULT_REASON_PASID_INVALID: + info.type =3D SMMU_EVT_C_BAD_SUBSTREAMID; + /* TODO further fill info.u.c_bad_substream */ + break; + case IOMMU_FAULT_REASON_PASID_FETCH: + info.type =3D SMMU_EVT_F_CD_FETCH; + break; + case IOMMU_FAULT_REASON_BAD_PASID_ENTRY: + info.type =3D SMMU_EVT_C_BAD_CD; + /* TODO further fill info.u.c_bad_cd */ + break; + case IOMMU_FAULT_REASON_WALK_EABT: + info.type =3D SMMU_EVT_F_WALK_EABT; + info.u.f_walk_eabt.addr =3D record->addr; + info.u.f_walk_eabt.addr2 =3D record->fetch_addr; + break; + case IOMMU_FAULT_REASON_PTE_FETCH: + info.type =3D SMMU_EVT_F_TRANSLATION; + info.u.f_translation.addr =3D record->addr; + break; + case IOMMU_FAULT_REASON_OOR_ADDRESS: + info.type =3D SMMU_EVT_F_ADDR_SIZE; + info.u.f_addr_size.addr =3D record->addr; + break; + case IOMMU_FAULT_REASON_ACCESS: + info.type =3D SMMU_EVT_F_ACCESS; + info.u.f_access.addr =3D record->addr; + break; + case IOMMU_FAULT_REASON_PERMISSION: + info.type =3D SMMU_EVT_F_PERMISSION; + info.u.f_permission.addr =3D record->addr; + break; + default: + warn_report("%s Unexpected fault reason received from host: %d= ", + __func__, record->reason); + continue; + } + + smmuv3_record_event(s3, &info); + } + return 0; +} + static void smmuv3_iommu_memory_region_class_init(ObjectClass *klass, void *data) { @@ -1554,6 +1618,7 @@ static void smmuv3_iommu_memory_region_class_init(Obj= ectClass *klass, imrc->notify_flag_changed =3D smmuv3_notify_flag_changed; imrc->get_attr =3D smmuv3_get_attr; imrc->replay =3D smmuv3_replay; + imrc->inject_faults =3D smmuv3_inject_faults; } =20 static const TypeInfo smmuv3_type_info =3D { --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Fri, 12 Apr 2019 10:06:49 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0968319C65; Fri, 12 Apr 2019 10:06:46 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:52 +0200 Message-Id: <20190412100354.6409-26-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Fri, 12 Apr 2019 10:06:49 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 25/27] vfio-pci: register handler for iommu fault X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We use the VFIO_PCI_DMA_FAULT_IRQ_INDEX "irq" index to set/unset a notifier for physical DMA faults. The associated eventfd is triggered, in nested mode, whenever a fault is detected at IOMMU physical level. The actual handler will be implemented in subsequent patches. Signed-off-by: Eric Auger --- --- hw/vfio/pci.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ hw/vfio/pci.h | 1 + 2 files changed, 46 insertions(+) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index aeb4dfa388..91714cea84 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -2722,6 +2722,49 @@ static void vfio_unregister_req_notifier(VFIOPCIDevi= ce *vdev) vdev->req_enabled =3D false; } =20 +static void vfio_dma_fault_notifier_handler(void *opaque) +{ + VFIOPCIDevice *vdev =3D opaque; + + if (!event_notifier_test_and_clear(&vdev->dma_fault_notifier)) { + return; + } +} + +static void vfio_register_dma_fault_notifier(VFIOPCIDevice *vdev) +{ + Error *err =3D NULL; + int32_t fd; + + if (event_notifier_init(&vdev->dma_fault_notifier, 0)) { + error_report("vfio: Unable to init event notifier for dma fault"); + return; + } + + fd =3D event_notifier_get_fd(&vdev->dma_fault_notifier); + qemu_set_fd_handler(fd, vfio_dma_fault_notifier_handler, NULL, vdev); + + if (vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_DMA_FAULT_IRQ_IND= EX, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, fd, &err)) { + error_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name); + qemu_set_fd_handler(fd, NULL, NULL, vdev); + event_notifier_cleanup(&vdev->dma_fault_notifier); + } +} + +static void vfio_unregister_dma_fault_notifier(VFIOPCIDevice *vdev) +{ + Error *err =3D NULL; + + if (vfio_set_irq_signaling(&vdev->vbasedev, VFIO_PCI_DMA_FAULT_IRQ_IND= EX, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, -1, &err)) { + error_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name); + } + qemu_set_fd_handler(event_notifier_get_fd(&vdev->dma_fault_notifier), + NULL, NULL, vdev); + event_notifier_cleanup(&vdev->dma_fault_notifier); +} + static void vfio_realize(PCIDevice *pdev, Error **errp) { VFIOPCIDevice *vdev =3D PCI_VFIO(pdev); @@ -3007,6 +3050,7 @@ static void vfio_realize(PCIDevice *pdev, Error **err= p) =20 vfio_register_err_notifier(vdev); vfio_register_req_notifier(vdev); + vfio_register_dma_fault_notifier(vdev); vfio_setup_resetfn_quirk(vdev); =20 return; @@ -3045,6 +3089,7 @@ static void vfio_exitfn(PCIDevice *pdev) =20 vfio_unregister_req_notifier(vdev); vfio_unregister_err_notifier(vdev); + vfio_unregister_dma_fault_notifier(vdev); pci_device_set_intx_routing_notifier(&vdev->pdev, NULL); vfio_disable_interrupts(vdev); if (vdev->intx.mmap_timer) { diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index c11c3f1670..55b14a1ece 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -135,6 +135,7 @@ typedef struct VFIOPCIDevice { PCIHostDeviceAddress host; EventNotifier err_notifier; EventNotifier req_notifier; + EventNotifier dma_fault_notifier; int (*resetfn)(struct VFIOPCIDevice *); uint32_t vendor_id; uint32_t device_id; --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 12 Apr 2019 10:07:01 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-161.ams2.redhat.com [10.36.117.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id E901119C65; Fri, 12 Apr 2019 10:06:49 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:53 +0200 Message-Id: <20190412100354.6409-27-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 12 Apr 2019 10:07:01 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 26/27] vfio-pci: Set up fault regions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We setup two fault regions: the producer fault is read-only from the user space perspective. It is composed of the fault queue (mmappable) and a header written by the kernel, located in a separate page. The consumer fault is write-only from the user-space perspective. Signed-off-by: Eric Auger --- --- hw/vfio/pci.c | 99 +++++++++++++++++++++++++++++++++++++++++++++++++++ hw/vfio/pci.h | 2 ++ 2 files changed, 101 insertions(+) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 91714cea84..89399a290f 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -2498,11 +2498,100 @@ int vfio_populate_vga(VFIOPCIDevice *vdev, Error *= *errp) return 0; } =20 +static void vfio_init_fault_regions(VFIOPCIDevice *vdev, Error **errp) +{ + struct vfio_region_info *fault_region_info =3D NULL; + struct vfio_region_info_cap_fault *cap_fault; + VFIODevice *vbasedev =3D &vdev->vbasedev; + struct vfio_info_cap_header *hdr; + char *fault_region_name =3D NULL; + uint32_t max_version; + ssize_t bytes; + int ret; + + /* Producer Fault Region */ + ret =3D vfio_get_dev_region_info(&vdev->vbasedev, + VFIO_REGION_TYPE_NESTED, + VFIO_REGION_SUBTYPE_NESTED_FAULT_PROD, + &fault_region_info); + if (!ret) { + hdr =3D vfio_get_region_info_cap(fault_region_info, + VFIO_REGION_INFO_CAP_PRODUCER_FAULT= ); + if (!hdr) { + error_setg(errp, "failed to retrieve fault ABI max version"); + g_free(fault_region_info); + return; + } + cap_fault =3D container_of(hdr, struct vfio_region_info_cap_fault, + header); + max_version =3D cap_fault->version; + + fault_region_name =3D g_strdup_printf("%s FAULT PROD %d", + vbasedev->name, + fault_region_info->index); + + ret =3D vfio_region_setup(OBJECT(vdev), vbasedev, + &vdev->fault_prod_region, + fault_region_info->index, + fault_region_name); + if (ret) { + error_setg_errno(errp, -ret, + "failed to setup the fault prod region %d", + fault_region_info->index); + goto out; + } + + ret =3D vfio_region_mmap(&vdev->fault_prod_region); + if (ret) { + error_report("Failed to mmap fault queue(%d)", ret); + } + + g_free(fault_region_info); + g_free(fault_region_name); + } else { + goto out; + } + + /* Consumer Fault Region */ + ret =3D vfio_get_dev_region_info(&vdev->vbasedev, + VFIO_REGION_TYPE_NESTED, + VFIO_REGION_SUBTYPE_NESTED_FAULT_CONS, + &fault_region_info); + if (!ret) { + fault_region_name =3D g_strdup_printf("%s FAULT CONS %d", + vbasedev->name, + fault_region_info->index); + + ret =3D vfio_region_setup(OBJECT(vdev), vbasedev, + &vdev->fault_cons_region, + fault_region_info->index, + fault_region_name); + if (ret) { + error_setg_errno(errp, -ret, + "failed to setup the fault cons region %d", + fault_region_info->index); + } + + /* Set the chosen fault ABI version in the consume header*/ + bytes =3D pwrite(vdev->vbasedev.fd, &max_version, 4, + vdev->fault_cons_region.fd_offset); + if (bytes !=3D 4) { + error_setg(errp, + "Unable to set the chosen fault ABI version (%d)", + max_version); + } + } +out: + g_free(fault_region_name); + g_free(fault_region_info); +} + static void vfio_populate_device(VFIOPCIDevice *vdev, Error **errp) { VFIODevice *vbasedev =3D &vdev->vbasedev; struct vfio_region_info *reg_info; struct vfio_irq_info irq_info =3D { .argsz =3D sizeof(irq_info) }; + Error *err =3D NULL; int i, ret =3D -1; =20 /* Sanity check device */ @@ -2566,6 +2655,12 @@ static void vfio_populate_device(VFIOPCIDevice *vdev= , Error **errp) } } =20 + vfio_init_fault_regions(vdev, &err); + if (err) { + error_propagate(errp, err); + return; + } + irq_info.index =3D VFIO_PCI_ERR_IRQ_INDEX; =20 ret =3D ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_IRQ_INFO, &irq_info); @@ -3070,6 +3165,8 @@ static void vfio_instance_finalize(Object *obj) =20 vfio_display_finalize(vdev); vfio_bars_finalize(vdev); + vfio_region_finalize(&vdev->fault_prod_region); + vfio_region_finalize(&vdev->fault_cons_region); g_free(vdev->emulated_config_bits); g_free(vdev->rom); /* @@ -3090,6 +3187,8 @@ static void vfio_exitfn(PCIDevice *pdev) vfio_unregister_req_notifier(vdev); vfio_unregister_err_notifier(vdev); vfio_unregister_dma_fault_notifier(vdev); + vfio_region_exit(&vdev->fault_prod_region); + vfio_region_exit(&vdev->fault_cons_region); pci_device_set_intx_routing_notifier(&vdev->pdev, NULL); vfio_disable_interrupts(vdev); if (vdev->intx.mmap_timer) { diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index 55b14a1ece..24ec43ac81 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -136,6 +136,8 @@ typedef struct VFIOPCIDevice { EventNotifier err_notifier; EventNotifier req_notifier; EventNotifier dma_fault_notifier; + VFIORegion fault_prod_region; + VFIORegion fault_cons_region; int (*resetfn)(struct VFIOPCIDevice *); uint32_t vendor_id; uint32_t device_id; --=20 2.20.1 From nobody Fri Apr 19 03:52:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1555065022; cv=none; d=zoho.com; s=zohoarc; b=RkKmmPIfKjsrEo08nwLqCvuil5vZcUixekQ+Y+TCIhRVwmnIdFoibONAAF2jh/Zvbj8Lw7OZYRFZw99XrwTJ3i/s5UKhOjv+Z5dTru1v6Hxuyo7SFlq0RpdKf9x3gZG+0wDHBTQys3ymncSSUDnFbTN47fwnU4XvHzt4P1LeYvU= ARC-Message-Signature: i=1; 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Fri, 12 Apr 2019 10:07:01 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org Date: Fri, 12 Apr 2019 12:03:54 +0200 Message-Id: <20190412100354.6409-28-eric.auger@redhat.com> In-Reply-To: <20190412100354.6409-1-eric.auger@redhat.com> References: <20190412100354.6409-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Fri, 12 Apr 2019 10:07:07 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 27/27] vfio-pci: Implement the DMA fault handler X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yi.l.liu@intel.com, mst@redhat.com, jean-philippe.brucker@arm.com, peterx@redhat.com, alex.williamson@redhat.com, vincent.stehle@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Whenever the eventfd is triggered, we retrieve the DMA faults from the mmapped fault region and inject them in the iommu memory region. Signed-off-by: Eric Auger --- hw/vfio/pci.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++ hw/vfio/pci.h | 1 + 2 files changed, 54 insertions(+) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 89399a290f..fcbb92cf27 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -2820,10 +2820,63 @@ static void vfio_unregister_req_notifier(VFIOPCIDev= ice *vdev) static void vfio_dma_fault_notifier_handler(void *opaque) { VFIOPCIDevice *vdev =3D opaque; + PCIDevice *pdev =3D &vdev->pdev; + AddressSpace *as =3D pci_device_iommu_address_space(pdev); + IOMMUMemoryRegion *iommu_mr =3D IOMMU_MEMORY_REGION(as->root); + struct vfio_region_fault_prod header; + struct iommu_fault *queue; + char *queue_buffer =3D NULL; + ssize_t bytes; =20 if (!event_notifier_test_and_clear(&vdev->dma_fault_notifier)) { return; } + + if (!vdev->fault_prod_region.size || !vdev->fault_cons_region.size) { + return; + } + + bytes =3D pread(vdev->vbasedev.fd, &header, sizeof(header), + vdev->fault_prod_region.fd_offset); + if (bytes !=3D sizeof(header)) { + error_report("%s unable to read the fault region header (0x%lx)", + __func__, bytes); + return; + } + + /* Normally the fault queue is mmapped */ + queue =3D (struct iommu_fault *)vdev->fault_prod_region.mmaps[0].mmap; + if (!queue) { + size_t queue_size =3D header.nb_entries * header.entry_size; + + error_report("%s: fault queue not mmapped: slower fault handling", + vdev->vbasedev.name); + + queue_buffer =3D g_malloc(queue_size); + bytes =3D pread(vdev->vbasedev.fd, queue_buffer, queue_size, + vdev->fault_prod_region.fd_offset + header.offset); + if (bytes !=3D queue_size) { + error_report("%s unable to read the fault queue (0x%lx)", + __func__, bytes); + return; + } + + queue =3D (struct iommu_fault *)queue_buffer; + } + + while (vdev->fault_cons_index !=3D header.prod) { + memory_region_inject_faults(iommu_mr, 1, + &queue[vdev->fault_cons_index]); + vdev->fault_cons_index =3D + (vdev->fault_cons_index + 1) % header.nb_entries; + } + bytes =3D pwrite(vdev->vbasedev.fd, &vdev->fault_cons_index, 4, + vdev->fault_cons_region.fd_offset + 4); + if (bytes !=3D 4) { + error_report("%s unable to write the fault region cons index (0x%l= x)", + __func__, bytes); + } + g_free(queue_buffer); } =20 static void vfio_register_dma_fault_notifier(VFIOPCIDevice *vdev) diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index 24ec43ac81..aef69c4487 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -138,6 +138,7 @@ typedef struct VFIOPCIDevice { EventNotifier dma_fault_notifier; VFIORegion fault_prod_region; VFIORegion fault_cons_region; + uint32_t fault_cons_index; int (*resetfn)(struct VFIOPCIDevice *); uint32_t vendor_id; uint32_t device_id; --=20 2.20.1