From nobody Tue Feb 10 01:31:36 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1554970075; cv=none; d=zoho.com; s=zohoarc; b=GPov677SqeRgOKXCqKSojTRXsCTavZZ9exaVzjvO38Ip7ZFJOA+xJGxPru1I5/smG2C6EE/Gt2WvD4U7AgF1u2PIjUKPoKx0n3Rr75rYj7Y2AjIr3FCCrc2IGOwGXZbCdiVoFcza7mntMT2RIDnZRuTLGWGd7s3OXx32MDYw4Es= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1554970075; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=SixO0UMAKSgsO/3athTzxIo1pMzA+glty4bulHn2Zao=; b=cHxHyPtJ2DP8FngzeBVV9yAmR8OXigfUCsEXsY1EIE5w+2pHfLMt6vXqaygJrIAG9i8nWBVU446K6AMDinFDl4/8ctV7nykM+14sYJVUngYz0qBgWUf5PNi1TGR2FQhYT19I767ps/l+k9iA9my0qehrZdh+npGq4oqdVjJaIBs= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=null header.from= header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155497007539025.591823486656494; Thu, 11 Apr 2019 01:07:55 -0700 (PDT) Received: from localhost ([127.0.0.1]:43664 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEUkR-0004rM-8t for importer@patchew.org; Thu, 11 Apr 2019 04:07:51 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48394) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEUe1-00085x-UL for qemu-devel@nongnu.org; Thu, 11 Apr 2019 04:01:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEUe0-0008JO-Ot for qemu-devel@nongnu.org; Thu, 11 Apr 2019 04:01:13 -0400 Received: from 10.mo178.mail-out.ovh.net ([46.105.76.150]:53005) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hEUe0-0008Hb-FC for qemu-devel@nongnu.org; Thu, 11 Apr 2019 04:01:12 -0400 Received: from player779.ha.ovh.net (unknown [10.109.146.175]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id 877765BE7B for ; Thu, 11 Apr 2019 10:01:09 +0200 (CEST) Received: from kaod.org (lfbn-tou-1-40-22.w86-201.abo.wanadoo.fr [86.201.133.22]) (Authenticated sender: clg@kaod.org) by player779.ha.ovh.net (Postfix) with ESMTPSA id 70D0848B8D7F; Thu, 11 Apr 2019 08:01:00 +0000 (UTC) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Thu, 11 Apr 2019 10:00:02 +0200 Message-Id: <20190411080004.8690-5-clg@kaod.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190411080004.8690-1-clg@kaod.org> References: <20190411080004.8690-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 17601474719029169126 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduuddrudekgdduvddtucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 46.105.76.150 Subject: [Qemu-devel] [PATCH 4/6] ppc/hash32: Rework R and C bit updates X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Suraj Jitindar Singh , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Benjamin Herrenschmidt With MT-TCG, we are now running translation in a racy way, thus we need to mimic hardware when it comes to updating the R and C bits, by doing byte stores. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: C=C3=A9dric Le Goater --- target/ppc/mmu-hash32.c | 45 ++++++++++++++++++++++++++++------------- 1 file changed, 31 insertions(+), 14 deletions(-) diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index 3f4dee835e2d..55cf156a0b49 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -345,6 +345,24 @@ static hwaddr ppc_hash32_pteg_search(PowerPCCPU *cpu, = hwaddr pteg_off, return -1; } =20 +static void ppc_hash32_set_r(PowerPCCPU *cpu, hwaddr pte_offset, uint32_t = pte1) +{ + target_ulong base =3D ppc_hash32_hpt_base(cpu); + hwaddr offset =3D pte_offset + 6; + + /* The HW performs a non-atomic byte update */ + stb_phys(CPU(cpu)->as, base + offset, ((pte1 >> 8) & 0xff) | 0x01); +} + +static void ppc_hash32_set_c(PowerPCCPU *cpu, hwaddr pte_offset, uint64_t = pte1) +{ + target_ulong base =3D ppc_hash32_hpt_base(cpu); + hwaddr offset =3D pte_offset + 7; + + /* The HW performs a non-atomic byte update */ + stb_phys(CPU(cpu)->as, base + offset, (pte1 & 0xff) | 0x80); +} + static hwaddr ppc_hash32_htab_lookup(PowerPCCPU *cpu, target_ulong sr, target_ulong eaddr, ppc_hash_pte32_t *pte) @@ -403,7 +421,6 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr = eaddr, int rwx, hwaddr pte_offset; ppc_hash_pte32_t pte; int prot; - uint32_t new_pte1; const int need_prot[] =3D {PAGE_READ, PAGE_WRITE, PAGE_EXEC}; hwaddr raddr; =20 @@ -519,20 +536,20 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vadd= r eaddr, int rwx, =20 /* 8. Update PTE referenced and changed bits if necessary */ =20 - new_pte1 =3D pte.pte1 | HPTE32_R_R; /* set referenced bit */ - if (rwx =3D=3D 1) { - new_pte1 |=3D HPTE32_R_C; /* set changed (dirty) bit */ - } else { - /* - * Treat the page as read-only for now, so that a later write - * will pass through this function again to set the C bit - */ - prot &=3D ~PAGE_WRITE; - } - - if (new_pte1 !=3D pte.pte1) { - ppc_hash32_store_hpte1(cpu, pte_offset, new_pte1); + if (!(pte.pte1 & HPTE32_R_R)) { + ppc_hash32_set_r(cpu, pte_offset, pte.pte1); } + if (!(pte.pte1 & HPTE32_R_C)) { + if (rwx =3D=3D 1) { + ppc_hash32_set_c(cpu, pte_offset, pte.pte1); + } else { + /* + * Treat the page as read-only for now, so that a later write + * will pass through this function again to set the C bit + */ + prot &=3D ~PAGE_WRITE; + } + } =20 /* 9. Determine the real address from the PTE */ =20 --=20 2.20.1