From nobody Sat Apr 27 12:29:25 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1554793835112297.15426306765914; Tue, 9 Apr 2019 00:10:35 -0700 (PDT) Received: from localhost ([127.0.0.1]:36603 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDktf-0006VY-VQ for importer@patchew.org; Tue, 09 Apr 2019 03:10:20 -0400 Received: from eggs.gnu.org ([209.51.188.92]:55038) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDksC-0005gl-2T for qemu-devel@nongnu.org; Tue, 09 Apr 2019 03:08:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hDksA-0005Dr-QJ for qemu-devel@nongnu.org; Tue, 09 Apr 2019 03:08:48 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:35101) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hDksA-000569-0y; Tue, 09 Apr 2019 03:08:46 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44ddg73hYQz9sR7; Tue, 9 Apr 2019 17:08:35 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1554793715; bh=RmCVysMV24gNZ7avpBiZeB2tTfq2kuUFJwMOS1Wxilo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ws0GsxYwqT2UkXIE1SytV0GG1oZinCmb5rZ++bMKt6N1bYMYtQQxcgzxI1Eb6heFB TSLlubDk4hr50Y33sbUCkbrDcXf/RCUrDkYUac8+ajKFILPbHp8gUdO+VZSh1qrmdG 3Up1zAsuhPtkuPVvpYjQM9nTNbUp3YmCewWOGQCQ= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 9 Apr 2019 17:08:29 +1000 Message-Id: <20190409070830.22430-2-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190409070830.22430-1-david@gibson.dropbear.id.au> References: <20190409070830.22430-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 1/2] pci: Allow PCI bus subtypes to support extended config space accesses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, mst@redhat.com, clg@redhat.com, qemu-devel@nongnu.org, groug@kaod.org, alex.williamson@redhat.com, spopovyc@redhat.com, qemu-ppc@nongnu.org, marcel@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Greg Kurz Some PHB implementations, eg. PAPR used on pseries machine, act like a regular PCI bus rather than a PCIe bus, but allow access to the PCIe extended config space anyway. Introduce a new PCI bus class method to modelize this behaviour and use it when adjusting the config space size limit during accesses. No behaviour change for existing PCI bus types. Signed-off-by: Greg Kurz Message-Id: <155414130271.574858.4253514266378127489.stgit@bahia.lan> Signed-off-by: David Gibson --- hw/pci/pci.c | 24 ++++++++++++++++++++++++ hw/pci/pci_host.c | 2 +- include/hw/pci/pci.h | 2 ++ include/hw/pci/pci_bus.h | 1 + 4 files changed, 28 insertions(+), 1 deletion(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 35451c1e99..6d13ef877b 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -147,6 +147,11 @@ static uint16_t pcibus_numa_node(PCIBus *bus) return NUMA_NODE_UNASSIGNED; } =20 +static bool pcibus_allows_extended_config_space(PCIBus *bus) +{ + return false; +} + static void pci_bus_class_init(ObjectClass *klass, void *data) { BusClass *k =3D BUS_CLASS(klass); @@ -162,6 +167,7 @@ static void pci_bus_class_init(ObjectClass *klass, void= *data) pbc->is_root =3D pcibus_is_root; pbc->bus_num =3D pcibus_num; pbc->numa_node =3D pcibus_numa_node; + pbc->allows_extended_config_space =3D pcibus_allows_extended_config_sp= ace; } =20 static const TypeInfo pci_bus_info =3D { @@ -182,9 +188,22 @@ static const TypeInfo conventional_pci_interface_info = =3D { .parent =3D TYPE_INTERFACE, }; =20 +static bool pciebus_allows_extended_config_space(PCIBus *bus) +{ + return true; +} + +static void pcie_bus_class_init(ObjectClass *klass, void *data) +{ + PCIBusClass *pbc =3D PCI_BUS_CLASS(klass); + + pbc->allows_extended_config_space =3D pciebus_allows_extended_config_s= pace; +} + static const TypeInfo pcie_bus_info =3D { .name =3D TYPE_PCIE_BUS, .parent =3D TYPE_PCI_BUS, + .class_init =3D pcie_bus_class_init, }; =20 static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num); @@ -401,6 +420,11 @@ bool pci_bus_is_root(PCIBus *bus) return PCI_BUS_GET_CLASS(bus)->is_root(bus); } =20 +bool pci_bus_allows_extended_config_space(PCIBus *bus) +{ + return PCI_BUS_GET_CLASS(bus)->allows_extended_config_space(bus); +} + void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, const char *name, MemoryRegion *address_space_mem, diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index 5f5345dbac..9d64b2e12f 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -54,7 +54,7 @@ static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus= , uint32_t addr) static void pci_adjust_config_limit(PCIBus *bus, uint32_t *limit) { if (*limit > PCI_CONFIG_SPACE_SIZE) { - if (!pci_bus_is_express(bus)) { + if (!pci_bus_allows_extended_config_space(bus)) { *limit =3D PCI_CONFIG_SPACE_SIZE; return; } diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index d87f5f93e9..0abb06b357 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -396,6 +396,8 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, = int pin); =20 bool pci_bus_is_express(PCIBus *bus); bool pci_bus_is_root(PCIBus *bus); +bool pci_bus_allows_extended_config_space(PCIBus *bus); + void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, const char *name, MemoryRegion *address_space_mem, diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index dfb75752cb..f6df834170 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -18,6 +18,7 @@ typedef struct PCIBusClass { bool (*is_root)(PCIBus *bus); int (*bus_num)(PCIBus *bus); uint16_t (*numa_node)(PCIBus *bus); + bool (*allows_extended_config_space)(PCIBus *bus); } PCIBusClass; =20 struct PCIBus { --=20 2.20.1 From nobody Sat Apr 27 12:29:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1554793906750899.358627738014; Tue, 9 Apr 2019 00:11:46 -0700 (PDT) Received: from localhost ([127.0.0.1]:36646 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDkuz-0007jT-Rj for importer@patchew.org; Tue, 09 Apr 2019 03:11:41 -0400 Received: from eggs.gnu.org ([209.51.188.92]:55006) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hDksA-0005gU-Is for qemu-devel@nongnu.org; Tue, 09 Apr 2019 03:08:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hDks9-0005AY-JG for qemu-devel@nongnu.org; Tue, 09 Apr 2019 03:08:46 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:33043 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hDks9-00056A-4k; Tue, 09 Apr 2019 03:08:45 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44ddg74ZtVz9sRV; Tue, 9 Apr 2019 17:08:35 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1554793715; bh=ODgRAHHJFpRl+9TKFtUBGOPcpEX4KOZLMDCB3XwB+Ik=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W36LiaHewIPy+BsLnQ6y/MfV0bPX2m6yjo0UU88aRqxG09yHP+YRYOAl+okuH2UKj vKFCu1+cALc8an2wB5atFvTm7AC81itjABxVtMEUlmBM4J2UrXENGjm0DUIlsEydkQ iv7/aOlcmgCiN6s0btCqK1KuO2VuqkuC84P//HfI= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 9 Apr 2019 17:08:30 +1000 Message-Id: <20190409070830.22430-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190409070830.22430-1-david@gibson.dropbear.id.au> References: <20190409070830.22430-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 2/2] spapr_pci: Fix extended config space accesses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, mst@redhat.com, clg@redhat.com, qemu-devel@nongnu.org, groug@kaod.org, alex.williamson@redhat.com, spopovyc@redhat.com, qemu-ppc@nongnu.org, marcel@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Greg Kurz The PAPR PHB acts as a legacy PCI bus but it allows PCIe extended config space accesses anyway (for pseries-2.9 and newer machine types). Introduce a specific PCI bus subtype to inform the common PCI code about that. Fixes: c2077e2ca0da7 Signed-off-by: Greg Kurz Message-Id: <155414130834.574858.16502276132110219890.stgit@bahia.lan> [dwg: Apply fix so we don't rename the default pci bus, breaking everything] Signed-off-by: David Gibson --- hw/ppc/spapr_pci.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index b63ed9d8da..f0b6b23afc 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1638,6 +1638,28 @@ static void spapr_phb_unrealize(DeviceState *dev, Er= ror **errp) memory_region_del_subregion(get_system_memory(), &sphb->mem32window); } =20 +static bool spapr_phb_allows_extended_config_space(PCIBus *bus) +{ + SpaprPhbState *sphb =3D SPAPR_PCI_HOST_BRIDGE(BUS(bus)->parent); + + return sphb->pcie_ecs; +} + +static void spapr_phb_root_bus_class_init(ObjectClass *klass, void *data) +{ + PCIBusClass *pbc =3D PCI_BUS_CLASS(klass); + + pbc->allows_extended_config_space =3D spapr_phb_allows_extended_config= _space; +} + +#define TYPE_SPAPR_PHB_ROOT_BUS "spapr-pci-host-bridge-root-bus" + +static const TypeInfo spapr_phb_root_bus_info =3D { + .name =3D TYPE_SPAPR_PHB_ROOT_BUS, + .parent =3D TYPE_PCI_BUS, + .class_init =3D spapr_phb_root_bus_class_init, +}; + static void spapr_phb_realize(DeviceState *dev, Error **errp) { /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user @@ -1739,10 +1761,11 @@ static void spapr_phb_realize(DeviceState *dev, Err= or **errp) memory_region_add_subregion(get_system_memory(), sphb->io_win_addr, &sphb->iowindow); =20 - bus =3D pci_register_root_bus(dev, NULL, + bus =3D pci_register_root_bus(dev, "pci.0", pci_spapr_set_irq, pci_spapr_map_irq, sphb, &sphb->memspace, &sphb->iospace, - PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BU= S); + PCI_DEVFN(0, 0), PCI_NUM_PINS, + TYPE_SPAPR_PHB_ROOT_BUS); phb->bus =3D bus; qbus_set_hotplug_handler(BUS(phb->bus), OBJECT(sphb), NULL); =20 @@ -2325,6 +2348,7 @@ void spapr_pci_rtas_init(void) static void spapr_pci_register_types(void) { type_register_static(&spapr_phb_info); + type_register_static(&spapr_phb_root_bus_info); } =20 type_init(spapr_pci_register_types) --=20 2.20.1