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X-Received-From: 2607:f8b0:4864:20::531 Subject: [Qemu-devel] [PATCH 21/26] target/tricore: Convert to CPUClass::tlb_fill X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bastian Koppelmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: Bastian Koppelmann Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/tricore/cpu.h | 6 +++--- target/tricore/cpu.c | 1 + target/tricore/helper.c | 27 +++++++++++++++++++-------- target/tricore/op_helper.c | 26 -------------------------- 4 files changed, 23 insertions(+), 37 deletions(-) diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 00e69dc154..5c0b8cb94c 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -418,8 +418,8 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState= *env, target_ulong *pc, #define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU =20 /* helpers.c */ -int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address, - int rw, int mmu_idx); -#define cpu_handle_mmu_fault cpu_tricore_handle_mmu_fault +bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); =20 #endif /* TRICORE_CPU_H */ diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index e8d37e4040..ea1199d27e 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -166,6 +166,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void= *data) cc->synchronize_from_tb =3D tricore_cpu_synchronize_from_tb; cc->get_phys_page_attrs_debug =3D tricore_cpu_get_phys_page_attrs_debu= g; cc->tcg_initialize =3D tricore_tcg_init; + cc->tlb_fill =3D tricore_cpu_tlb_fill; } =20 #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \ diff --git a/target/tricore/helper.c b/target/tricore/helper.c index 0769046993..3c99a8c22b 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -49,8 +49,9 @@ static void raise_mmu_exception(CPUTriCoreState *env, tar= get_ulong address, { } =20 -int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address, - int rw, int mmu_idx) +bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType rw, int mmu_idx, + bool probe, uintptr_t retaddr) { TriCoreCPU *cpu =3D TRICORE_CPU(cs); CPUTriCoreState *env =3D &cpu->env; @@ -63,20 +64,30 @@ int cpu_tricore_handle_mmu_fault(CPUState *cs, target_u= long address, access_type =3D ACCESS_INT; ret =3D get_physical_address(env, &physical, &prot, address, rw, access_type); - qemu_log_mask(CPU_LOG_MMU, "%s address=3D" TARGET_FMT_lx " ret %d phys= ical " TARGET_FMT_plx - " prot %d\n", __func__, address, ret, physical, prot); + + qemu_log_mask(CPU_LOG_MMU, "%s address=3D" TARGET_FMT_lx " ret %d phys= ical " + TARGET_FMT_plx " prot %d\n", + __func__, (target_ulong)address, ret, physical, prot); =20 if (ret =3D=3D TLBRET_MATCH) { tlb_set_page(cs, address & TARGET_PAGE_MASK, physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, mmu_idx, TARGET_PAGE_SIZE); - ret =3D 0; - } else if (ret < 0) { + return true; + } else { + assert(ret < 0); + if (probe) { + return false; + } raise_mmu_exception(env, address, rw, ret); - ret =3D 1; + cpu_loop_exit_restore(cs, retaddr); } +} =20 - return ret; +void tlb_fill(CPUState *cs, target_ulong addr, int size, + MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) +{ + tricore_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, reta= ddr); } =20 static void tricore_cpu_list_entry(gpointer data, gpointer user_data) diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c index ed9dc0c83e..601e92f92a 100644 --- a/target/tricore/op_helper.c +++ b/target/tricore/op_helper.c @@ -2793,29 +2793,3 @@ uint32_t helper_psw_read(CPUTriCoreState *env) { return psw_read(env); } - - -static inline void QEMU_NORETURN do_raise_exception_err(CPUTriCoreState *e= nv, - uint32_t exception, - int error_code, - uintptr_t pc) -{ - CPUState *cs =3D CPU(tricore_env_get_cpu(env)); - cs->exception_index =3D exception; - env->error_code =3D error_code; - /* now we have a real cpu fault */ - cpu_loop_exit_restore(cs, pc); -} - -void tlb_fill(CPUState *cs, target_ulong addr, int size, - MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) -{ - int ret; - ret =3D cpu_tricore_handle_mmu_fault(cs, addr, access_type, mmu_idx); - if (ret) { - TriCoreCPU *cpu =3D TRICORE_CPU(cs); - CPUTriCoreState *env =3D &cpu->env; - do_raise_exception_err(env, cs->exception_index, - env->error_code, retaddr); - } -} --=20 2.17.1