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Cota" To: qemu-devel@nongnu.org Date: Fri, 22 Mar 2019 16:43:20 -0400 Message-Id: <20190322204320.17777-1-cota@braap.org> X-Mailer: git-send-email 2.17.1 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.27 Subject: [Qemu-devel] [PATCH v2 for-4.0] hardfloat: fix float32/64 fused multiply-add X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-riscv@nongnu.org, Richard Henderson , Kito Cheng , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kito Cheng Before falling back to softfloat FMA, we do not restore the original values of inputs A and C. Fix it. This bug was caught by running gcc's testsuite on RISC-V qemu. Note that this change gives a small perf increase for fp-bench: Host: Intel(R) Core(TM) i7-4790K CPU @ 4.00GHz Command: perf stat -r 3 taskset -c 0 ./fp-bench -o mulAdd -p $prec - $prec =3D single: - before: 101.71 MFlops 102.18 MFlops 100.96 MFlops - after: 103.63 MFlops 103.05 MFlops 102.96 MFlops - $prec =3D double: - before: 173.10 MFlops 173.93 MFlops 172.11 MFlops - after: 178.49 MFlops 178.88 MFlops 178.66 MFlops Signed-off-by: Kito Cheng Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson Tested-by: Palmer Dabbelt --- fpu/softfloat.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 4610738ab1..2ba36ec370 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1596,6 +1596,9 @@ float32_muladd(float32 xa, float32 xb, float32 xc, in= t flags, float_status *s) } ur.h =3D up.h + uc.h; } else { + union_float32 ua_orig =3D ua; + union_float32 uc_orig =3D uc; + if (flags & float_muladd_negate_product) { ua.h =3D -ua.h; } @@ -1608,6 +1611,8 @@ float32_muladd(float32 xa, float32 xb, float32 xc, in= t flags, float_status *s) if (unlikely(f32_is_inf(ur))) { s->float_exception_flags |=3D float_flag_overflow; } else if (unlikely(fabsf(ur.h) <=3D FLT_MIN)) { + ua =3D ua_orig; + uc =3D uc_orig; goto soft; } } @@ -1662,6 +1667,9 @@ float64_muladd(float64 xa, float64 xb, float64 xc, in= t flags, float_status *s) } ur.h =3D up.h + uc.h; } else { + union_float64 ua_orig =3D ua; + union_float64 uc_orig =3D uc; + if (flags & float_muladd_negate_product) { ua.h =3D -ua.h; } @@ -1674,6 +1682,8 @@ float64_muladd(float64 xa, float64 xb, float64 xc, in= t flags, float_status *s) if (unlikely(f64_is_inf(ur))) { s->float_exception_flags |=3D float_flag_overflow; } else if (unlikely(fabs(ur.h) <=3D FLT_MIN)) { + ua =3D ua_orig; + uc =3D uc_orig; goto soft; } } --=20 2.17.1