From nobody Thu May 2 14:10:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552854925556185.0863514040376; Sun, 17 Mar 2019 13:35:25 -0700 (PDT) Received: from localhost ([127.0.0.1]:59924 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h5cV4-0001q4-Cr for importer@patchew.org; Sun, 17 Mar 2019 16:35:18 -0400 Received: from eggs.gnu.org ([209.51.188.92]:40871) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h5cTy-0001Ge-MJ for qemu-devel@nongnu.org; Sun, 17 Mar 2019 16:34:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h5cTx-00048A-LC for qemu-devel@nongnu.org; Sun, 17 Mar 2019 16:34:10 -0400 Received: from 18.mo4.mail-out.ovh.net ([188.165.54.143]:59653) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h5cTx-00044D-DD for qemu-devel@nongnu.org; Sun, 17 Mar 2019 16:34:09 -0400 Received: from player793.ha.ovh.net (unknown [10.109.146.5]) by mo4.mail-out.ovh.net (Postfix) with ESMTP id 786F91DDBE1 for ; Sun, 17 Mar 2019 21:33:59 +0100 (CET) Received: from kaod.org (lfbn-1-2226-17.w90-76.abo.wanadoo.fr [90.76.48.17]) (Authenticated sender: clg@kaod.org) by player793.ha.ovh.net (Postfix) with ESMTPSA id F287F3D7BFC5; Sun, 17 Mar 2019 20:33:50 +0000 (UTC) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Sun, 17 Mar 2019 21:33:42 +0100 Message-Id: <20190317203342.13521-1-clg@kaod.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Ovh-Tracer-Id: 12625560082378755046 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedutddrheelgddugeduucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 188.165.54.143 Subject: [Qemu-devel] [RFC PATCH] spapr/irq: force XICS interrupt mode on non P9 machines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, Greg Kurz , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" There is no need to propose the 'dual' interrupt mode interrupt device on POWER7/8 machines and the XIVE mode will not operate. Simply force XICS in this case. This makes the check in spapr_machine_init() redundant on XIVE-only machines. Signed-off-by: C=C3=A9dric Le Goater --- hw/ppc/spapr_irq.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index f2ca1bb66c9d..d27ae68915a1 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -16,6 +16,7 @@ #include "hw/ppc/spapr_xive.h" #include "hw/ppc/xics.h" #include "hw/ppc/xics_spapr.h" +#include "cpu-models.h" #include "sysemu/kvm.h" =20 #include "trace.h" @@ -655,6 +656,7 @@ SpaprIrq spapr_irq_dual =3D { void spapr_irq_init(SpaprMachineState *spapr, Error **errp) { MachineState *machine =3D MACHINE(spapr); + Error *local_err =3D NULL; =20 if (machine_kernel_irqchip_split(machine)) { error_setg(errp, "kernel_irqchip split mode not supported on pseri= es"); @@ -667,6 +669,14 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **= errp) return; } =20 + /* Force XICS on non P9 machines */ + if (!ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, + 0, spapr->max_compat_pvr)) { + error_setg(&local_err, "forcing XICS interrupt controller"); + warn_report_err(local_err); + spapr->irq =3D &spapr_irq_xics; + } + /* Initialize the MSI IRQ allocator. */ if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { spapr_irq_msi_init(spapr, spapr->irq->nr_msis); --=20 2.20.1