From nobody Mon Nov 10 01:17:20 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552452597880226.9517240452385; Tue, 12 Mar 2019 21:49:57 -0700 (PDT) Received: from localhost ([127.0.0.1]:38272 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3vpw-0007SY-LG for importer@patchew.org; Wed, 13 Mar 2019 00:49:52 -0400 Received: from eggs.gnu.org ([209.51.188.92]:40076) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3vkG-0003Ny-PD for qemu-devel@nongnu.org; Wed, 13 Mar 2019 00:44:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h3vkF-0003cI-3n for qemu-devel@nongnu.org; Wed, 13 Mar 2019 00:44:00 -0400 Received: from mga17.intel.com ([192.55.52.151]:13008) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h3vkE-0003as-PP; Wed, 13 Mar 2019 00:43:59 -0400 Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Mar 2019 21:43:57 -0700 Received: from richard.sh.intel.com (HELO localhost) ([10.239.159.54]) by fmsmga008.fm.intel.com with ESMTP; 12 Mar 2019 21:43:56 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,473,1544515200"; d="scan'208";a="131180366" From: Wei Yang To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Wed, 13 Mar 2019 12:42:53 +0800 Message-Id: <20190313044253.31988-4-richardw.yang@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190313044253.31988-1-richardw.yang@linux.intel.com> References: <20190313044253.31988-1-richardw.yang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.151 Subject: [Qemu-devel] [RFC PATCH 3/3] hw/acpi: Extract build_mcfg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mst@redhat.com, shannon.zhaosl@gmail.com, Wei Yang , imammedo@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Now we have two identical build_mcfg function. Extract them to aml-build.c. Signed-off-by: Wei Yang --- hw/acpi/aml-build.c | 30 ++++++++++++++++++++++++++++++ hw/arm/virt-acpi-build.c | 16 ---------------- hw/i386/acpi-build.c | 31 +------------------------------ include/hw/acpi/aml-build.h | 1 + 4 files changed, 32 insertions(+), 46 deletions(-) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 555c24f21d..58d3b8f31d 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -25,6 +25,7 @@ #include "qemu/bswap.h" #include "qemu/bitops.h" #include "sysemu/numa.h" +#include "hw/pci/pcie_host.h" =20 static GArray *build_alloc_array(void) { @@ -1870,3 +1871,32 @@ build_hdr: build_header(linker, tbl, (void *)(tbl->data + fadt_start), "FACP", tbl->len - fadt_start, f->rev, oem_id, oem_table_= id); } + +void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) +{ + AcpiTableMcfg *mcfg; + const char *sig; + int len =3D sizeof(*mcfg) + sizeof(mcfg->allocation[0]); + + mcfg =3D acpi_data_push(table_data, len); + mcfg->allocation[0].address =3D cpu_to_le64(info->mcfg_base); + /* Only a single allocation so no need to play with segments */ + mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); + mcfg->allocation[0].start_bus_number =3D 0; + mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->mcfg_size = - 1); + + /* + * MCFG is used for ECAM which can be enabled or disabled by guest. + * To avoid table size changes (which create migration issues), + * always create the table even if there are no allocations, + * but set the signature to a reserved value in this case. + * ACPI spec requires OSPMs to ignore such tables. + */ + if (info->mcfg_base =3D=3D PCIE_BASE_ADDR_UNMAPPED) { + /* Reserved signature: ignored by OSPM */ + sig =3D "QEMU"; + } else { + sig =3D "MCFG"; + } + build_header(linker, table_data, (void *)mcfg, sig, len, 1, NULL, NULL= ); +} diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index ae7858a79a..92d8fccb00 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -557,22 +557,6 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) return true; } =20 -static void -build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) -{ - AcpiTableMcfg *mcfg; - int len =3D sizeof(*mcfg) + sizeof(mcfg->allocation[0]); - - mcfg =3D acpi_data_push(table_data, len); - mcfg->allocation[0].address =3D cpu_to_le64(info->mcfg_base); - /* Only a single allocation so no need to play with segments */ - mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); - mcfg->allocation[0].start_bus_number =3D 0; - mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->mcfg_size = - 1); - - build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1, NULL, N= ULL); -} - /* GTDT */ static void build_gtdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index c5b1c3be99..b537a39d42 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2392,35 +2392,6 @@ build_srat(GArray *table_data, BIOSLinker *linker, M= achineState *machine) table_data->len - srat_start, 1, NULL, NULL); } =20 -static void -build_mcfg_q35(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info) -{ - AcpiTableMcfg *mcfg; - const char *sig; - int len =3D sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); - - mcfg =3D acpi_data_push(table_data, len); - mcfg->allocation[0].address =3D cpu_to_le64(info->mcfg_base); - /* Only a single allocation so no need to play with segments */ - mcfg->allocation[0].pci_segment =3D cpu_to_le16(0); - mcfg->allocation[0].start_bus_number =3D 0; - mcfg->allocation[0].end_bus_number =3D PCIE_MMCFG_BUS(info->mcfg_size = - 1); - - /* MCFG is used for ECAM which can be enabled or disabled by guest. - * To avoid table size changes (which create migration issues), - * always create the table even if there are no allocations, - * but set the signature to a reserved value in this case. - * ACPI spec requires OSPMs to ignore such tables. - */ - if (info->mcfg_base =3D=3D PCIE_BASE_ADDR_UNMAPPED) { - /* Reserved signature: ignored by OSPM */ - sig =3D "QEMU"; - } else { - sig =3D "MCFG"; - } - build_header(linker, table_data, (void *)mcfg, sig, len, 1, NULL, NULL= ); -} - /* * VT-d spec 8.1 DMA Remapping Reporting Structure * (version Oct. 2014 or later) @@ -2687,7 +2658,7 @@ void acpi_build(AcpiBuildTables *tables, MachineState= *machine) } if (acpi_get_mcfg(&mcfg)) { acpi_add_table(table_offsets, tables_blob); - build_mcfg_q35(tables_blob, tables->linker, &mcfg); + build_mcfg(tables_blob, tables->linker, &mcfg); } if (x86_iommu_get_default()) { IommuType IOMMUType =3D x86_iommu_get_type(); diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index b63b85d67c..8f2ea3679f 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -423,4 +423,5 @@ void build_slit(GArray *table_data, BIOSLinker *linker); =20 void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, const char *oem_id, const char *oem_table_id); +void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info= ); #endif --=20 2.19.1