From nobody Tue Feb 10 04:15:05 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552383522415551.153251257558; Tue, 12 Mar 2019 02:38:42 -0700 (PDT) Received: from localhost ([127.0.0.1]:48240 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3drq-00062f-6x for importer@patchew.org; Tue, 12 Mar 2019 05:38:38 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48656) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3dDe-00037n-8U for qemu-devel@nongnu.org; Tue, 12 Mar 2019 04:57:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h3dDd-0002jy-0V for qemu-devel@nongnu.org; Tue, 12 Mar 2019 04:57:06 -0400 Received: from ozlabs.org ([203.11.71.1]:57501) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h3dDc-0002Ob-CL; Tue, 12 Mar 2019 04:57:04 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44JTMh3jYqz9sPl; Tue, 12 Mar 2019 19:55:42 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1552380944; bh=fbKunjuyvylw+im8ggBeAk3tUYzw0mjLNYlv48Le31I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Lziqf5VYS64fmaDAtT8hIfaNhnQ8LY53YC+IKnXsq5L2/1IIik65KW0tuB+W4m6Gh 6A3pZ/ZeEJCrJodxMPjMCwKL/9Ht5bGvbUBZnrLMk8xerDeWU+za0c81BN4r5xShqK GkSlX6vjhTT24l33drQL/kwetQ+b+lr/ufkANuyQ= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 12 Mar 2019 19:54:52 +1100 Message-Id: <20190312085502.8203-53-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190312085502.8203-1-david@gibson.dropbear.id.au> References: <20190312085502.8203-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 52/62] ppc/pnv: extend XSCOM core support for POWER9 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: C=C3=A9dric Le Goater Provide a new class attribute to define XSCOM operations per CPU family and add a couple of XSCOM addresses controlling the power management states of the core on POWER9. Signed-off-by: C=C3=A9dric Le Goater Message-Id: <20190307223548.20516-11-clg@kaod.org> Signed-off-by: David Gibson --- hw/ppc/pnv_core.c | 100 +++++++++++++++++++++++++++++++++----- include/hw/ppc/pnv_core.h | 2 + 2 files changed, 89 insertions(+), 13 deletions(-) diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 38179cdc53..171474e080 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -60,8 +60,8 @@ static void pnv_cpu_reset(void *opaque) #define PNV_XSCOM_EX_DTS_RESULT0 0x50000 #define PNV_XSCOM_EX_DTS_RESULT1 0x50001 =20 -static uint64_t pnv_core_xscom_read(void *opaque, hwaddr addr, - unsigned int width) +static uint64_t pnv_core_power8_xscom_read(void *opaque, hwaddr addr, + unsigned int width) { uint32_t offset =3D addr >> 3; uint64_t val =3D 0; @@ -82,16 +82,74 @@ static uint64_t pnv_core_xscom_read(void *opaque, hwadd= r addr, return val; } =20 -static void pnv_core_xscom_write(void *opaque, hwaddr addr, uint64_t val, - unsigned int width) +static void pnv_core_power8_xscom_write(void *opaque, hwaddr addr, uint64_= t val, + unsigned int width) { qemu_log_mask(LOG_UNIMP, "Warning: writing to reg=3D0x%" HWADDR_PRIx "= \n", addr); } =20 -static const MemoryRegionOps pnv_core_xscom_ops =3D { - .read =3D pnv_core_xscom_read, - .write =3D pnv_core_xscom_write, +static const MemoryRegionOps pnv_core_power8_xscom_ops =3D { + .read =3D pnv_core_power8_xscom_read, + .write =3D pnv_core_power8_xscom_write, + .valid.min_access_size =3D 8, + .valid.max_access_size =3D 8, + .impl.min_access_size =3D 8, + .impl.max_access_size =3D 8, + .endianness =3D DEVICE_BIG_ENDIAN, +}; + + +/* + * POWER9 core controls + */ +#define PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_HYP 0xf010d +#define PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_OTR 0xf010a + +static uint64_t pnv_core_power9_xscom_read(void *opaque, hwaddr addr, + unsigned int width) +{ + uint32_t offset =3D addr >> 3; + uint64_t val =3D 0; + + /* The result should be 38 C */ + switch (offset) { + case PNV_XSCOM_EX_DTS_RESULT0: + val =3D 0x26f024f023f0000ull; + break; + case PNV_XSCOM_EX_DTS_RESULT1: + val =3D 0x24f000000000000ull; + break; + case PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_HYP: + case PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_OTR: + val =3D 0x0; + break; + default: + qemu_log_mask(LOG_UNIMP, "Warning: reading reg=3D0x%" HWADDR_PRIx = "\n", + addr); + } + + return val; +} + +static void pnv_core_power9_xscom_write(void *opaque, hwaddr addr, uint64_= t val, + unsigned int width) +{ + uint32_t offset =3D addr >> 3; + + switch (offset) { + case PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_HYP: + case PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_OTR: + break; + default: + qemu_log_mask(LOG_UNIMP, "Warning: writing to reg=3D0x%" HWADDR_PR= Ix "\n", + addr); + } +} + +static const MemoryRegionOps pnv_core_power9_xscom_ops =3D { + .read =3D pnv_core_power9_xscom_read, + .write =3D pnv_core_power9_xscom_write, .valid.min_access_size =3D 8, .valid.max_access_size =3D 8, .impl.min_access_size =3D 8, @@ -138,6 +196,7 @@ static void pnv_realize_vcpu(PowerPCCPU *cpu, PnvChip *= chip, Error **errp) static void pnv_core_realize(DeviceState *dev, Error **errp) { PnvCore *pc =3D PNV_CORE(OBJECT(dev)); + PnvCoreClass *pcc =3D PNV_CORE_GET_CLASS(pc); CPUCore *cc =3D CPU_CORE(OBJECT(dev)); const char *typename =3D pnv_core_cpu_typename(pc); Error *local_err =3D NULL; @@ -180,7 +239,7 @@ static void pnv_core_realize(DeviceState *dev, Error **= errp) } =20 snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id); - pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), &pnv_core_xscom_op= s, + pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), pcc->xscom_ops, pc, name, PNV_XSCOM_EX_SIZE); return; =20 @@ -222,6 +281,20 @@ static Property pnv_core_properties[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 +static void pnv_core_power8_class_init(ObjectClass *oc, void *data) +{ + PnvCoreClass *pcc =3D PNV_CORE_CLASS(oc); + + pcc->xscom_ops =3D &pnv_core_power8_xscom_ops; +} + +static void pnv_core_power9_class_init(ObjectClass *oc, void *data) +{ + PnvCoreClass *pcc =3D PNV_CORE_CLASS(oc); + + pcc->xscom_ops =3D &pnv_core_power9_xscom_ops; +} + static void pnv_core_class_init(ObjectClass *oc, void *data) { DeviceClass *dc =3D DEVICE_CLASS(oc); @@ -231,10 +304,11 @@ static void pnv_core_class_init(ObjectClass *oc, void= *data) dc->props =3D pnv_core_properties; } =20 -#define DEFINE_PNV_CORE_TYPE(cpu_model) \ +#define DEFINE_PNV_CORE_TYPE(family, cpu_model) \ { \ .parent =3D TYPE_PNV_CORE, \ .name =3D PNV_CORE_TYPE_NAME(cpu_model), \ + .class_init =3D pnv_core_##family##_class_init, \ } =20 static const TypeInfo pnv_core_infos[] =3D { @@ -246,10 +320,10 @@ static const TypeInfo pnv_core_infos[] =3D { .class_init =3D pnv_core_class_init, .abstract =3D true, }, - DEFINE_PNV_CORE_TYPE("power8e_v2.1"), - DEFINE_PNV_CORE_TYPE("power8_v2.0"), - DEFINE_PNV_CORE_TYPE("power8nvl_v1.0"), - DEFINE_PNV_CORE_TYPE("power9_v2.0"), + DEFINE_PNV_CORE_TYPE(power8, "power8e_v2.1"), + DEFINE_PNV_CORE_TYPE(power8, "power8_v2.0"), + DEFINE_PNV_CORE_TYPE(power8, "power8nvl_v1.0"), + DEFINE_PNV_CORE_TYPE(power9, "power9_v2.0"), }; =20 DEFINE_TYPES(pnv_core_infos) diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index 6874bb847a..cbe9ad36f3 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -42,6 +42,8 @@ typedef struct PnvCore { =20 typedef struct PnvCoreClass { DeviceClass parent_class; + + const MemoryRegionOps *xscom_ops; } PnvCoreClass; =20 #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE --=20 2.20.1