From nobody Sat Sep 28 22:16:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552295539103194.75235879094612; Mon, 11 Mar 2019 02:12:19 -0700 (PDT) Received: from localhost ([127.0.0.1]:57895 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3Gyg-00014I-R6 for importer@patchew.org; Mon, 11 Mar 2019 05:12:10 -0400 Received: from eggs.gnu.org ([209.51.188.92]:42970) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h3Gqb-0002sV-7l for qemu-devel@nongnu.org; Mon, 11 Mar 2019 05:03:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h3GqZ-0005Ft-74 for qemu-devel@nongnu.org; Mon, 11 Mar 2019 05:03:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48460) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h3GqV-0005CR-BK; Mon, 11 Mar 2019 05:03:45 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C9C3C59462; Mon, 11 Mar 2019 09:03:41 +0000 (UTC) Received: from localhost (ovpn-117-96.ams2.redhat.com [10.36.117.96]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5B4C45DA62; Mon, 11 Mar 2019 09:03:39 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Mon, 11 Mar 2019 10:02:52 +0100 Message-Id: <20190311090322.21603-4-cohuck@redhat.com> In-Reply-To: <20190311090322.21603-1-cohuck@redhat.com> References: <20190311090322.21603-1-cohuck@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 11 Mar 2019 09:03:41 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 03/33] s390x/tcg: Check vector register instructions at central point X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Hildenbrand Check them at a central point. We'll use a new instruction flag to flag all vector instructions (IF_VEC) and handle it very similar to AFP, whereby we use another unused position in the PSW mask to store the state of vector register enablement per translation block. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand Message-Id: <20190307121539.12842-3-david@redhat.com> Signed-off-by: Cornelia Huck --- target/s390x/cpu.h | 7 +++++++ target/s390x/translate.c | 12 ++++++++++++ 2 files changed, 19 insertions(+) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index b71ac5183dee..cb6d77053a4d 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -257,6 +257,7 @@ extern const struct VMStateDescription vmstate_s390_cpu; /* PSW defines */ #undef PSW_MASK_PER #undef PSW_MASK_UNUSED_2 +#undef PSW_MASK_UNUSED_3 #undef PSW_MASK_DAT #undef PSW_MASK_IO #undef PSW_MASK_EXT @@ -276,6 +277,7 @@ extern const struct VMStateDescription vmstate_s390_cpu; =20 #define PSW_MASK_PER 0x4000000000000000ULL #define PSW_MASK_UNUSED_2 0x2000000000000000ULL +#define PSW_MASK_UNUSED_3 0x1000000000000000ULL #define PSW_MASK_DAT 0x0400000000000000ULL #define PSW_MASK_IO 0x0200000000000000ULL #define PSW_MASK_EXT 0x0100000000000000ULL @@ -323,12 +325,14 @@ extern const struct VMStateDescription vmstate_s390_c= pu; =20 /* we'll use some unused PSW positions to store CR flags in tb flags */ #define FLAG_MASK_AFP (PSW_MASK_UNUSED_2 >> FLAG_MASK_PSW_SHIFT) +#define FLAG_MASK_VECTOR (PSW_MASK_UNUSED_3 >> FLAG_MASK_PSW_SHIFT) =20 /* Control register 0 bits */ #define CR0_LOWPROT 0x0000000010000000ULL #define CR0_SECONDARY 0x0000000004000000ULL #define CR0_EDAT 0x0000000000800000ULL #define CR0_AFP 0x0000000000040000ULL +#define CR0_VECTOR 0x0000000000020000ULL #define CR0_EMERGENCY_SIGNAL_SC 0x0000000000004000ULL #define CR0_EXTERNAL_CALL_SC 0x0000000000002000ULL #define CR0_CKC_SC 0x0000000000000800ULL @@ -373,6 +377,9 @@ static inline void cpu_get_tb_cpu_state(CPUS390XState* = env, target_ulong *pc, if (env->cregs[0] & CR0_AFP) { *flags |=3D FLAG_MASK_AFP; } + if (env->cregs[0] & CR0_VECTOR) { + *flags |=3D FLAG_MASK_VECTOR; + } } =20 /* PER bits from control register 9 */ diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 1d8030f8cd82..d52c02c572bb 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -1203,6 +1203,7 @@ typedef struct { #define IF_BFP 0x0008 /* binary floating point instruction */ #define IF_DFP 0x0010 /* decimal floating point instruction */ #define IF_PRIV 0x0020 /* privileged instruction */ +#define IF_VEC 0x0040 /* vector instruction */ =20 struct DisasInsn { unsigned opc:16; @@ -6337,11 +6338,22 @@ static DisasJumpType translate_one(CPUS390XState *e= nv, DisasContext *s) if (insn->flags & IF_DFP) { dxc =3D 3; } + if (insn->flags & IF_VEC) { + dxc =3D 0xfe; + } if (dxc) { gen_data_exception(dxc); return DISAS_NORETURN; } } + + /* if vector instructions not enabled, executing them is forbidden= */ + if (insn->flags & IF_VEC) { + if (!((s->base.tb->flags & FLAG_MASK_VECTOR))) { + gen_data_exception(0xfe); + return DISAS_NORETURN; + } + } } =20 /* Check for insn specification exceptions. */ --=20 2.17.2