From nobody Mon Feb 9 21:11:57 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552209076159174.65401933030103; Sun, 10 Mar 2019 01:11:16 -0800 (PST) Received: from localhost ([127.0.0.1]:42407 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2uUF-0004nk-4e for importer@patchew.org; Sun, 10 Mar 2019 05:11:15 -0400 Received: from eggs.gnu.org ([209.51.188.92]:43526) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2tpD-00025O-LF for qemu-devel@nongnu.org; Sun, 10 Mar 2019 04:28:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2tpC-00022r-Td for qemu-devel@nongnu.org; Sun, 10 Mar 2019 04:28:51 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:47737) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2tpC-0001oh-E6; Sun, 10 Mar 2019 04:28:50 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44HDqt0fx1z9sPj; Sun, 10 Mar 2019 19:27:20 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1552206442; bh=d+oT/cHqlOK28e3sYVHMP+tZy6/WSbv156rV0xYgpKE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=a4/1R8P+aPQ7Q2+DjXUODCvFAlOp1zf2I3oSSxnQBdGzqIrTtrlWgCQOq0HTIETTi ginGIPnGO4hdjY5OF1NpcOQ+EGKgDledZwO1eBrmPTMqGsCi6jq0SqNiwtHUNc/m8Y MUXk37ULytR+TAMV9OWFtW1LpRtUOcYsyfq8jkX0= From: David Gibson To: peter.maydell@linaro.org Date: Sun, 10 Mar 2019 19:26:50 +1100 Message-Id: <20190310082703.1245-48-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190310082703.1245-1-david@gibson.dropbear.id.au> References: <20190310082703.1245-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 47/60] ppc/pnv: add a 'dt_isa_nodename' to the chip X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, groug@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: C=C3=A9dric Le Goater The ISA bus has a different DT nodename on POWER9. Compute the name when the PnvChip is realized, that is before it is used by the machine to populate the device tree with the ISA devices. Signed-off-by: C=C3=A9dric Le Goater Message-Id: <20190307223548.20516-6-clg@kaod.org> Signed-off-by: David Gibson --- hw/ppc/pnv.c | 18 +++++------------- include/hw/ppc/pnv.h | 2 ++ 2 files changed, 7 insertions(+), 13 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 922e3ec48b..6625562d27 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -417,24 +417,12 @@ static int pnv_dt_isa_device(DeviceState *dev, void *= opaque) return 0; } =20 -static int pnv_chip_isa_offset(PnvChip *chip, void *fdt) -{ - char *name; - int offset; - - name =3D g_strdup_printf("/xscom@%" PRIx64 "/isa@%x", - (uint64_t) PNV_XSCOM_BASE(chip), PNV_XSCOM_LPC_= BASE); - offset =3D fdt_path_offset(fdt, name); - g_free(name); - return offset; -} - /* The default LPC bus of a multichip system is on chip 0. It's * recognized by the firmware (skiboot) using a "primary" property. */ static void pnv_dt_isa(PnvMachineState *pnv, void *fdt) { - int isa_offset =3D pnv_chip_isa_offset(pnv->chips[0], fdt); + int isa_offset =3D fdt_path_offset(fdt, pnv->chips[0]->dt_isa_nodename= ); ForeachPopulateArgs args =3D { .fdt =3D fdt, .offset =3D isa_offset, @@ -866,6 +854,10 @@ static void pnv_chip_power8_realize(DeviceState *dev, = Error **errp) &error_fatal); pnv_xscom_add_subregion(chip, PNV_XSCOM_LPC_BASE, &chip8->lpc.xscom_re= gs); =20 + chip->dt_isa_nodename =3D g_strdup_printf("/xscom@%" PRIx64 "/isa@%x", + (uint64_t) PNV_XSCOM_BASE(chip= ), + PNV_XSCOM_LPC_BASE); + /* Interrupt Management Area. This is the memory region holding * all the Interrupt Control Presenter (ICP) registers */ pnv_chip_icp_realize(chip8, &local_err); diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 8d80cb34ee..c81f157f41 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -58,6 +58,8 @@ typedef struct PnvChip { MemoryRegion xscom_mmio; MemoryRegion xscom; AddressSpace xscom_as; + + gchar *dt_isa_nodename; } PnvChip; =20 #define TYPE_PNV8_CHIP "pnv8-chip" --=20 2.20.1