From nobody Mon Feb 9 23:03:43 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155220787943512.801481206555195; Sun, 10 Mar 2019 00:51:19 -0800 (PST) Received: from localhost ([127.0.0.1]:42072 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2uAu-0004Sd-CH for importer@patchew.org; Sun, 10 Mar 2019 04:51:16 -0400 Received: from eggs.gnu.org ([209.51.188.92]:42993) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2toU-0001LD-1C for qemu-devel@nongnu.org; Sun, 10 Mar 2019 04:28:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2toT-0001YY-19 for qemu-devel@nongnu.org; Sun, 10 Mar 2019 04:28:05 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:49891) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2toP-0001Ge-M2; Sun, 10 Mar 2019 04:28:03 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44HDqp3VXtz9sP7; Sun, 10 Mar 2019 19:27:16 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1552206438; bh=gNRkrsopT4gf2qrmiiQQoqGimqfukJrq+otGfGp+ZIE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fbztg3lZV6dx5cU8FYPLDyJkA2lZ6lYkeCac4hZeAxvT8znC2gY9wizpwvlgkNQkM JBLACwGEn73ZNj9CtLw8rEux0hukuBejocBpcsH/QfIU5qSzJzJ/+C6xP6s+jQfH0s eXZ5TLZccsspHbvaxQDVtesEPKfG4/Tm/5fhD41Q= From: David Gibson To: peter.maydell@linaro.org Date: Sun, 10 Mar 2019 19:26:26 +1100 Message-Id: <20190310082703.1245-24-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190310082703.1245-1-david@gibson.dropbear.id.au> References: <20190310082703.1245-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 23/60] ppc/xive: export the TIMA memory accessors X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, groug@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: C=C3=A9dric Le Goater The PowerNV machine can perform indirect loads and stores on the TIMA on behalf of another CPU. Give the controller the possibility to call the TIMA memory accessors with a XiveTCTX of its choice. Signed-off-by: C=C3=A9dric Le Goater Message-Id: <20190306085032.15744-4-clg@kaod.org> Signed-off-by: David Gibson --- hw/intc/xive.c | 23 ++++++++++++++++++----- include/hw/ppc/xive.h | 3 +++ 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/hw/intc/xive.c b/hw/intc/xive.c index b21759c938..3d7de864e9 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -317,10 +317,9 @@ static const XiveTmOp *xive_tm_find_op(hwaddr offset, = unsigned size, bool write) /* * TIMA MMIO handlers */ -static void xive_tm_write(void *opaque, hwaddr offset, - uint64_t value, unsigned size) +void xive_tctx_tm_write(XiveTCTX *tctx, hwaddr offset, uint64_t value, + unsigned size) { - XiveTCTX *tctx =3D xive_router_get_tctx(XIVE_ROUTER(opaque), current_c= pu); const XiveTmOp *xto; =20 /* @@ -356,9 +355,8 @@ static void xive_tm_write(void *opaque, hwaddr offset, xive_tm_raw_write(tctx, offset, value, size); } =20 -static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size) +uint64_t xive_tctx_tm_read(XiveTCTX *tctx, hwaddr offset, unsigned size) { - XiveTCTX *tctx =3D xive_router_get_tctx(XIVE_ROUTER(opaque), current_c= pu); const XiveTmOp *xto; =20 /* @@ -392,6 +390,21 @@ static uint64_t xive_tm_read(void *opaque, hwaddr offs= et, unsigned size) return xive_tm_raw_read(tctx, offset, size); } =20 +static void xive_tm_write(void *opaque, hwaddr offset, + uint64_t value, unsigned size) +{ + XiveTCTX *tctx =3D xive_router_get_tctx(XIVE_ROUTER(opaque), current_c= pu); + + xive_tctx_tm_write(tctx, offset, value, size); +} + +static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size) +{ + XiveTCTX *tctx =3D xive_router_get_tctx(XIVE_ROUTER(opaque), current_c= pu); + + return xive_tctx_tm_read(tctx, offset, size); +} + const MemoryRegionOps xive_tm_ops =3D { .read =3D xive_tm_read, .write =3D xive_tm_write, diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index 13a487527b..7dd80e0f46 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -410,6 +410,9 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32= _t width, Monitor *mon); #define XIVE_TM_USER_PAGE 0x3 =20 extern const MemoryRegionOps xive_tm_ops; +void xive_tctx_tm_write(XiveTCTX *tctx, hwaddr offset, uint64_t value, + unsigned size); +uint64_t xive_tctx_tm_read(XiveTCTX *tctx, hwaddr offset, unsigned size); =20 void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon); Object *xive_tctx_create(Object *cpu, XiveRouter *xrtr, Error **errp); --=20 2.20.1