From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552039026591683.3634216788106; Fri, 8 Mar 2019 01:57:06 -0800 (PST) Received: from localhost ([127.0.0.1]:40078 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CFR-0002Jm-94 for importer@patchew.org; Fri, 08 Mar 2019 04:57:01 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43256) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C5C-0002Lh-T6 for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C58-0006GH-VZ for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:26 -0500 Received: from mx1.redhat.com ([209.132.183.28]:42270) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C52-0005yf-3m; Fri, 08 Mar 2019 04:46:16 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 548EDC057F50; Fri, 8 Mar 2019 09:46:15 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 639465C1A1; Fri, 8 Mar 2019 09:46:12 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id B7E7F1138661; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:45:56 +0100 Message-Id: <20190308094610.21210-2-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 08 Mar 2019 09:46:15 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 01/15] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" flash.h's incomplete struct pflash_t is completed both in pflash_cfi01.c and in pflash_cfi02.c. The complete types are incompatible. This can hide type errors, such as passing a pflash_t created with pflash_cfi02_register() to pflash_cfi01_get_memory(). Furthermore, POSIX reserves typedef names ending with _t. Rename the two structs to PFlashCFI01 and PFlashCFI02. Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/vexpress.c | 8 ++-- hw/block/pflash_cfi01.c | 89 +++++++++++++++++++++------------------- hw/block/pflash_cfi02.c | 73 ++++++++++++++++---------------- hw/i386/pc_sysfw.c | 2 +- hw/mips/mips_malta.c | 2 +- hw/xtensa/xtfpga.c | 10 ++--- include/hw/block/flash.h | 53 ++++++++++++++---------- 7 files changed, 126 insertions(+), 111 deletions(-) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index c02d18ee61..ed46d2e730 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -512,8 +512,8 @@ static void vexpress_modify_dtb(const struct arm_boot_i= nfo *info, void *fdt) /* Open code a private version of pflash registration since we * need to set non-default device width for VExpress platform. */ -static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name, - DriveInfo *di) +static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, + DriveInfo *di) { DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); =20 @@ -536,7 +536,7 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base, = const char *name, qdev_init_nofail(dev); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01"); + return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01"); } =20 static void vexpress_common_init(MachineState *machine) @@ -548,7 +548,7 @@ static void vexpress_common_init(MachineState *machine) qemu_irq pic[64]; uint32_t sys_id; DriveInfo *dinfo; - pflash_t *pflash0; + PFlashCFI01 *pflash0; I2CBus *i2c; ram_addr_t vram_size, sram_size; MemoryRegion *sysmem =3D get_system_memory(); diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index bffb4c40e7..a51ac9f399 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -65,12 +65,13 @@ do { = \ #define DPRINTF(fmt, ...) do { } while (0) #endif =20 -#define CFI_PFLASH01(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH01) +#define CFI_PFLASH01(obj) \ + OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01) =20 #define PFLASH_BE 0 #define PFLASH_SECURE 1 =20 -struct pflash_t { +struct PFlashCFI01 { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -109,17 +110,17 @@ static const VMStateDescription vmstate_pflash =3D { .minimum_version_id =3D 1, .post_load =3D pflash_post_load, .fields =3D (VMStateField[]) { - VMSTATE_UINT8(wcycle, pflash_t), - VMSTATE_UINT8(cmd, pflash_t), - VMSTATE_UINT8(status, pflash_t), - VMSTATE_UINT64(counter, pflash_t), + VMSTATE_UINT8(wcycle, PFlashCFI01), + VMSTATE_UINT8(cmd, PFlashCFI01), + VMSTATE_UINT8(status, PFlashCFI01), + VMSTATE_UINT64(counter, PFlashCFI01), VMSTATE_END_OF_LIST() } }; =20 static void pflash_timer (void *opaque) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; =20 trace_pflash_timer_expired(pfl->cmd); /* Reset flash */ @@ -133,7 +134,7 @@ static void pflash_timer (void *opaque) * If this code is called we know we have a device_width set for * this flash. */ -static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset) +static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwaddr offset) { int i; uint32_t resp =3D 0; @@ -193,7 +194,7 @@ static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr = offset) =20 =20 /* Perform a device id query based on the bank width of the flash. */ -static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset) +static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hwaddr offset) { int i; uint32_t resp; @@ -241,7 +242,7 @@ static uint32_t pflash_devid_query(pflash_t *pfl, hwadd= r offset) return resp; } =20 -static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset, +static uint32_t pflash_data_read(PFlashCFI01 *pfl, hwaddr offset, int width, int be) { uint8_t *p; @@ -284,8 +285,8 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr = offset, return ret; } =20 -static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, - int width, int be) +static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr offset, + int width, int be) { hwaddr boff; uint32_t ret; @@ -398,7 +399,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offs= et, } =20 /* update flash content on disk */ -static void pflash_update(pflash_t *pfl, int offset, +static void pflash_update(PFlashCFI01 *pfl, int offset, int size) { int offset_end; @@ -412,7 +413,7 @@ static void pflash_update(pflash_t *pfl, int offset, } } =20 -static inline void pflash_data_write(pflash_t *pfl, hwaddr offset, +static inline void pflash_data_write(PFlashCFI01 *pfl, hwaddr offset, uint32_t value, int width, int be) { uint8_t *p =3D pfl->storage; @@ -448,7 +449,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwa= ddr offset, =20 } =20 -static void pflash_write(pflash_t *pfl, hwaddr offset, +static void pflash_write(PFlashCFI01 *pfl, hwaddr offset, uint32_t value, int width, int be) { uint8_t *p; @@ -654,7 +655,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset, static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, u= int64_t *value, unsigned len, MemTxAttrs att= rs) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; bool be =3D !!(pfl->features & (1 << PFLASH_BE)); =20 if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) { @@ -668,7 +669,7 @@ static MemTxResult pflash_mem_read_with_attrs(void *opa= que, hwaddr addr, uint64_ static MemTxResult pflash_mem_write_with_attrs(void *opaque, hwaddr addr, = uint64_t value, unsigned len, MemTxAttrs at= trs) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; bool be =3D !!(pfl->features & (1 << PFLASH_BE)); =20 if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) { @@ -687,7 +688,7 @@ static const MemoryRegionOps pflash_cfi01_ops =3D { =20 static void pflash_cfi01_realize(DeviceState *dev, Error **errp) { - pflash_t *pfl =3D CFI_PFLASH01(dev); + PFlashCFI01 *pfl =3D CFI_PFLASH01(dev); uint64_t total_len; int ret; uint64_t blocks_per_device, sector_len_per_device, device_len; @@ -864,14 +865,14 @@ static void pflash_cfi01_realize(DeviceState *dev, Er= ror **errp) } =20 static Property pflash_cfi01_properties[] =3D { - DEFINE_PROP_DRIVE("drive", struct pflash_t, blk), + DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk), /* num-blocks is the number of blocks actually visible to the guest, * ie the total size of the device divided by the sector length. * If we're emulating flash devices wired in parallel the actual * number of blocks per indvidual device will differ. */ - DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0), - DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0), + DEFINE_PROP_UINT32("num-blocks", PFlashCFI01, nb_blocs, 0), + DEFINE_PROP_UINT64("sector-length", PFlashCFI01, sector_len, 0), /* width here is the overall width of this QEMU device in bytes. * The QEMU device may be emulating a number of flash devices * wired up in parallel; the width of each individual flash @@ -888,17 +889,17 @@ static Property pflash_cfi01_properties[] =3D { * 16 bit devices making up a 32 bit wide QEMU device. This * is deprecated for new uses of this device. */ - DEFINE_PROP_UINT8("width", struct pflash_t, bank_width, 0), - DEFINE_PROP_UINT8("device-width", struct pflash_t, device_width, 0), - DEFINE_PROP_UINT8("max-device-width", struct pflash_t, max_device_widt= h, 0), - DEFINE_PROP_BIT("big-endian", struct pflash_t, features, PFLASH_BE, 0), - DEFINE_PROP_BIT("secure", struct pflash_t, features, PFLASH_SECURE, 0), - DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0), - DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0), - DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0), - DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0), - DEFINE_PROP_STRING("name", struct pflash_t, name), - DEFINE_PROP_BOOL("old-multiple-chip-handling", struct pflash_t, + DEFINE_PROP_UINT8("width", PFlashCFI01, bank_width, 0), + DEFINE_PROP_UINT8("device-width", PFlashCFI01, device_width, 0), + DEFINE_PROP_UINT8("max-device-width", PFlashCFI01, max_device_width, 0= ), + DEFINE_PROP_BIT("big-endian", PFlashCFI01, features, PFLASH_BE, 0), + DEFINE_PROP_BIT("secure", PFlashCFI01, features, PFLASH_SECURE, 0), + DEFINE_PROP_UINT16("id0", PFlashCFI01, ident0, 0), + DEFINE_PROP_UINT16("id1", PFlashCFI01, ident1, 0), + DEFINE_PROP_UINT16("id2", PFlashCFI01, ident2, 0), + DEFINE_PROP_UINT16("id3", PFlashCFI01, ident3, 0), + DEFINE_PROP_STRING("name", PFlashCFI01, name), + DEFINE_PROP_BOOL("old-multiple-chip-handling", PFlashCFI01, old_multiple_chip_handling, false), DEFINE_PROP_END_OF_LIST(), }; @@ -917,7 +918,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass,= void *data) static const TypeInfo pflash_cfi01_info =3D { .name =3D TYPE_CFI_PFLASH01, .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_size =3D sizeof(struct pflash_t), + .instance_size =3D sizeof(PFlashCFI01), .class_init =3D pflash_cfi01_class_init, }; =20 @@ -928,13 +929,15 @@ static void pflash_cfi01_register_types(void) =20 type_init(pflash_cfi01_register_types) =20 -pflash_t *pflash_cfi01_register(hwaddr base, - DeviceState *qdev, const char *name, - hwaddr size, - BlockBackend *blk, - uint32_t sector_len, int nb_blocs, - int bank_width, uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, int be) +PFlashCFI01 *pflash_cfi01_register(hwaddr base, + DeviceState *qdev, const char *name, + hwaddr size, + BlockBackend *blk, + uint32_t sector_len, int nb_blocs, + int bank_width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + int be) { DeviceState *dev =3D qdev_create(NULL, TYPE_CFI_PFLASH01); =20 @@ -956,14 +959,14 @@ pflash_t *pflash_cfi01_register(hwaddr base, return CFI_PFLASH01(dev); } =20 -MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl) +MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl) { return &fl->mem; } =20 static void postload_update_cb(void *opaque, int running, RunState state) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; =20 /* This is called after bdrv_invalidate_cache_all. */ qemu_del_vm_change_state_handler(pfl->vmstate); @@ -975,7 +978,7 @@ static void postload_update_cb(void *opaque, int runnin= g, RunState state) =20 static int pflash_post_load(void *opaque, int version_id) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; =20 if (!pfl->ro) { pfl->vmstate =3D qemu_add_vm_change_state_handler(postload_update_= cb, diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 1588aeff5a..df32e20bd7 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -57,9 +57,10 @@ do { = \ =20 #define PFLASH_LAZY_ROMD_THRESHOLD 42 =20 -#define CFI_PFLASH02(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH02) +#define CFI_PFLASH02(obj) \ + OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02) =20 -struct pflash_t { +struct PFlashCFI02 { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -101,7 +102,7 @@ struct pflash_t { /* * Set up replicated mappings of the same region. */ -static void pflash_setup_mappings(pflash_t *pfl) +static void pflash_setup_mappings(PFlashCFI02 *pfl) { unsigned i; hwaddr size =3D memory_region_size(&pfl->orig_mem); @@ -115,7 +116,7 @@ static void pflash_setup_mappings(pflash_t *pfl) } } =20 -static void pflash_register_memory(pflash_t *pfl, int rom_mode) +static void pflash_register_memory(PFlashCFI02 *pfl, int rom_mode) { memory_region_rom_device_set_romd(&pfl->orig_mem, rom_mode); pfl->rom_mode =3D rom_mode; @@ -123,7 +124,7 @@ static void pflash_register_memory(pflash_t *pfl, int r= om_mode) =20 static void pflash_timer (void *opaque) { - pflash_t *pfl =3D opaque; + PFlashCFI02 *pfl =3D opaque; =20 trace_pflash_timer_expired(pfl->cmd); /* Reset flash */ @@ -137,8 +138,8 @@ static void pflash_timer (void *opaque) pfl->cmd =3D 0; } =20 -static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, - int width, int be) +static uint32_t pflash_read(PFlashCFI02 *pfl, hwaddr offset, + int width, int be) { hwaddr boff; uint32_t ret; @@ -246,7 +247,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offs= et, } =20 /* update flash content on disk */ -static void pflash_update(pflash_t *pfl, int offset, +static void pflash_update(PFlashCFI02 *pfl, int offset, int size) { int offset_end; @@ -260,8 +261,8 @@ static void pflash_update(pflash_t *pfl, int offset, } } =20 -static void pflash_write (pflash_t *pfl, hwaddr offset, - uint32_t value, int width, int be) +static void pflash_write(PFlashCFI02 *pfl, hwaddr offset, + uint32_t value, int width, int be) { hwaddr boff; uint8_t *p; @@ -533,7 +534,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le =3D { =20 static void pflash_cfi02_realize(DeviceState *dev, Error **errp) { - pflash_t *pfl =3D CFI_PFLASH02(dev); + PFlashCFI02 *pfl =3D CFI_PFLASH02(dev); uint32_t chip_len; int ret; Error *local_err =3D NULL; @@ -679,25 +680,25 @@ static void pflash_cfi02_realize(DeviceState *dev, Er= ror **errp) } =20 static Property pflash_cfi02_properties[] =3D { - DEFINE_PROP_DRIVE("drive", struct pflash_t, blk), - DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0), - DEFINE_PROP_UINT32("sector-length", struct pflash_t, sector_len, 0), - DEFINE_PROP_UINT8("width", struct pflash_t, width, 0), - DEFINE_PROP_UINT8("mappings", struct pflash_t, mappings, 0), - DEFINE_PROP_UINT8("big-endian", struct pflash_t, be, 0), - DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0), - DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0), - DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0), - DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0), - DEFINE_PROP_UINT16("unlock-addr0", struct pflash_t, unlock_addr0, 0), - DEFINE_PROP_UINT16("unlock-addr1", struct pflash_t, unlock_addr1, 0), - DEFINE_PROP_STRING("name", struct pflash_t, name), + DEFINE_PROP_DRIVE("drive", PFlashCFI02, blk), + DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, nb_blocs, 0), + DEFINE_PROP_UINT32("sector-length", PFlashCFI02, sector_len, 0), + DEFINE_PROP_UINT8("width", PFlashCFI02, width, 0), + DEFINE_PROP_UINT8("mappings", PFlashCFI02, mappings, 0), + DEFINE_PROP_UINT8("big-endian", PFlashCFI02, be, 0), + DEFINE_PROP_UINT16("id0", PFlashCFI02, ident0, 0), + DEFINE_PROP_UINT16("id1", PFlashCFI02, ident1, 0), + DEFINE_PROP_UINT16("id2", PFlashCFI02, ident2, 0), + DEFINE_PROP_UINT16("id3", PFlashCFI02, ident3, 0), + DEFINE_PROP_UINT16("unlock-addr0", PFlashCFI02, unlock_addr0, 0), + DEFINE_PROP_UINT16("unlock-addr1", PFlashCFI02, unlock_addr1, 0), + DEFINE_PROP_STRING("name", PFlashCFI02, name), DEFINE_PROP_END_OF_LIST(), }; =20 static void pflash_cfi02_unrealize(DeviceState *dev, Error **errp) { - pflash_t *pfl =3D CFI_PFLASH02(dev); + PFlashCFI02 *pfl =3D CFI_PFLASH02(dev); timer_del(&pfl->timer); } =20 @@ -714,7 +715,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass,= void *data) static const TypeInfo pflash_cfi02_info =3D { .name =3D TYPE_CFI_PFLASH02, .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_size =3D sizeof(struct pflash_t), + .instance_size =3D sizeof(PFlashCFI02), .class_init =3D pflash_cfi02_class_init, }; =20 @@ -725,15 +726,17 @@ static void pflash_cfi02_register_types(void) =20 type_init(pflash_cfi02_register_types) =20 -pflash_t *pflash_cfi02_register(hwaddr base, - DeviceState *qdev, const char *name, - hwaddr size, - BlockBackend *blk, uint32_t sector_len, - int nb_blocs, int nb_mappings, int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - uint16_t unlock_addr0, uint16_t unlock_add= r1, - int be) +PFlashCFI02 *pflash_cfi02_register(hwaddr base, + DeviceState *qdev, const char *name, + hwaddr size, + BlockBackend *blk, + uint32_t sector_len, int nb_blocs, + int nb_mappings, int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + uint16_t unlock_addr0, + uint16_t unlock_addr1, + int be) { DeviceState *dev =3D qdev_create(NULL, TYPE_CFI_PFLASH02); =20 diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 091e22dd60..67e55342f6 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -111,7 +111,7 @@ static void pc_system_flash_init(MemoryRegion *rom_memo= ry) char *fatal_errmsg =3D NULL; hwaddr phys_addr =3D 0x100000000ULL; int sector_bits, sector_size; - pflash_t *system_flash; + PFlashCFI01 *system_flash; MemoryRegion *flash_mem; char name[64]; void *flash_ptr; diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 39aef4b6db..2827074e9b 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1189,7 +1189,7 @@ void mips_malta_init(MachineState *machine) const char *kernel_cmdline =3D machine->kernel_cmdline; const char *initrd_filename =3D machine->initrd_filename; char *filename; - pflash_t *fl; + PFlashCFI01 *fl; MemoryRegion *system_memory =3D get_system_memory(); MemoryRegion *ram_high =3D g_new(MemoryRegion, 1); MemoryRegion *ram_low_preio =3D g_new(MemoryRegion, 1); diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index ab3e52b415..3d59a7a356 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -162,9 +162,9 @@ static void xtfpga_net_init(MemoryRegion *address_space, memory_region_add_subregion(address_space, buffers, ram); } =20 -static pflash_t *xtfpga_flash_init(MemoryRegion *address_space, - const XtfpgaBoardDesc *board, - DriveInfo *dinfo, int be) +static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space, + const XtfpgaBoardDesc *board, + DriveInfo *dinfo, int be) { SysBusDevice *s; DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); @@ -181,7 +181,7 @@ static pflash_t *xtfpga_flash_init(MemoryRegion *addres= s_space, s =3D SYS_BUS_DEVICE(dev); memory_region_add_subregion(address_space, board->flash->base, sysbus_mmio_get_region(s, 0)); - return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01"); + return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01"); } =20 static uint64_t translate_phys_addr(void *opaque, uint64_t addr) @@ -229,7 +229,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, M= achineState *machine) XtensaMxPic *mx_pic =3D NULL; qemu_irq *extints; DriveInfo *dinfo; - pflash_t *flash =3D NULL; + PFlashCFI01 *flash =3D NULL; QemuOpts *machine_opts =3D qemu_get_machine_opts(); const char *kernel_filename =3D qemu_opt_get(machine_opts, "kernel"); const char *kernel_cmdline =3D qemu_opt_get(machine_opts, "append"); diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 67c3aa329e..51d8f60c65 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -5,32 +5,41 @@ =20 #include "exec/memory.h" =20 -#define TYPE_CFI_PFLASH01 "cfi.pflash01" -#define TYPE_CFI_PFLASH02 "cfi.pflash02" - -typedef struct pflash_t pflash_t; - /* pflash_cfi01.c */ -pflash_t *pflash_cfi01_register(hwaddr base, - DeviceState *qdev, const char *name, - hwaddr size, - BlockBackend *blk, - uint32_t sector_len, int nb_blocs, int wid= th, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, int be); + +#define TYPE_CFI_PFLASH01 "cfi.pflash01" + +typedef struct PFlashCFI01 PFlashCFI01; + +PFlashCFI01 *pflash_cfi01_register(hwaddr base, + DeviceState *qdev, const char *name, + hwaddr size, + BlockBackend *blk, + uint32_t sector_len, int nb_blocs, + int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + int be); +MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); =20 /* pflash_cfi02.c */ -pflash_t *pflash_cfi02_register(hwaddr base, - DeviceState *qdev, const char *name, - hwaddr size, - BlockBackend *blk, uint32_t sector_len, - int nb_blocs, int nb_mappings, int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - uint16_t unlock_addr0, uint16_t unlock_add= r1, - int be); =20 -MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl); +#define TYPE_CFI_PFLASH02 "cfi.pflash02" + +typedef struct PFlashCFI02 PFlashCFI02; + +PFlashCFI02 *pflash_cfi02_register(hwaddr base, + DeviceState *qdev, const char *name, + hwaddr size, + BlockBackend *blk, + uint32_t sector_len, int nb_blocs, + int nb_mappings, + int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + uint16_t unlock_addr0, + uint16_t unlock_addr1, + int be); =20 /* nand.c */ DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id); --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552038545373136.84673467539005; Fri, 8 Mar 2019 01:49:05 -0800 (PST) Received: from localhost ([127.0.0.1]:39940 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C7f-0003yN-2D for importer@patchew.org; Fri, 08 Mar 2019 04:48:59 -0500 Received: from eggs.gnu.org ([209.51.188.92]:42900) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C55-0002C0-4G for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C54-00064o-8Y for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:19 -0500 Received: from mx1.redhat.com ([209.132.183.28]:59986) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C52-0005yi-4n; Fri, 08 Mar 2019 04:46:16 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6235D10C6C; Fri, 8 Mar 2019 09:46:15 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6190F614C1; Fri, 8 Mar 2019 09:46:12 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id BE91B11385D4; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:45:57 +0100 Message-Id: <20190308094610.21210-3-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Fri, 08 Mar 2019 09:46:15 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 02/15] pflash_cfi01: Do not exit() on guest aborting "write to buffer" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" When a guest tries to abort "write to buffer" (command 0xE8), we print "PFLASH: Possible BUG - Write block confirm", then exit(1). Letting the guest terminate QEMU is not a good idea. Instead, LOG_UNIMP we screwed up, then reset the device. Macro PFLASH_BUG() is now unused; delete it. Suggested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e --- hw/block/pflash_cfi01.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index a51ac9f399..e6d933a06d 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -49,12 +49,6 @@ #include "sysemu/sysemu.h" #include "trace.h" =20 -#define PFLASH_BUG(fmt, ...) \ -do { \ - fprintf(stderr, "PFLASH: Possible BUG - " fmt, ## __VA_ARGS__); \ - exit(1); \ -} while(0) - /* #define PFLASH_DEBUG */ #ifdef PFLASH_DEBUG #define DPRINTF(fmt, ...) \ @@ -623,8 +617,11 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, pfl->wcycle =3D 0; pfl->status |=3D 0x80; } else { - DPRINTF("%s: unknown command for \"write block\"\n", __fun= c__); - PFLASH_BUG("Write block confirm"); + qemu_log_mask(LOG_UNIMP, + "%s: Aborting write to buffer not implemented," + " the data is already written to storage!\n" + "Flash device reset into READ mode.\n", + __func__); goto reset_flash; } break; --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155203892284633.56339512315071; Fri, 8 Mar 2019 01:55:22 -0800 (PST) Received: from localhost ([127.0.0.1]:40028 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CDk-0000n2-DE for importer@patchew.org; Fri, 08 Mar 2019 04:55:16 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43174) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C5A-0002Ix-Ts for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C59-0006H8-Q0 for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:24 -0500 Received: from mx1.redhat.com ([209.132.183.28]:58186) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C51-0005vp-LI; Fri, 08 Mar 2019 04:46:15 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D166B3005219; Fri, 8 Mar 2019 09:46:14 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 631BB1A92E; Fri, 8 Mar 2019 09:46:12 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id C228011385D5; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:45:58 +0100 Message-Id: <20190308094610.21210-4-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Fri, 08 Mar 2019 09:46:14 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 03/15] pflash_cfi01: Log use of flawed "write to buffer" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Our implementation of "write to buffer" (command 0xE8) is flawed. LOG_UNIMP its use, and add some FIXME comments. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e --- hw/block/pflash_cfi01.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index e6d933a06d..d381f14e3c 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -502,6 +502,10 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, break; case 0xe8: /* Write to buffer */ DPRINTF("%s: Write to buffer\n", __func__); + /* FIXME should save @offset, @width for case 1+ */ + qemu_log_mask(LOG_UNIMP, + "%s: Write to buffer emulation is flawed\n", + __func__); pfl->status |=3D 0x80; /* Ready! */ break; case 0xf0: /* Probe for AMD flash */ @@ -545,6 +549,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, /* Mask writeblock size based on device width, or bank width if * device width not specified. */ + /* FIXME check @offset, @width */ if (pfl->device_width) { value =3D extract32(value, 0, pfl->device_width * 8); } else { @@ -582,7 +587,13 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, case 2: switch (pfl->cmd) { case 0xe8: /* Block write */ + /* FIXME check @offset, @width */ if (!pfl->ro) { + /* + * FIXME writing straight to memory is *wrong*. We + * should write to a buffer, and flush it to memory + * only on confirm command (see below). + */ pflash_data_write(pfl, offset, value, width, be); } else { pfl->status |=3D 0x10; /* Programming error */ @@ -598,6 +609,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, pfl->wcycle++; if (!pfl->ro) { /* Flush the entire write buffer onto backing storage.= */ + /* FIXME premature! */ pflash_update(pfl, offset & mask, pfl->writeblock_size= ); } else { pfl->status |=3D 0x10; /* Programming error */ @@ -614,6 +626,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, switch (pfl->cmd) { case 0xe8: /* Block write */ if (cmd =3D=3D 0xd0) { + /* FIXME this is where we should write out the buffer */ pfl->wcycle =3D 0; pfl->status |=3D 0x80; } else { --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552038610358343.48731635363424; Fri, 8 Mar 2019 01:50:10 -0800 (PST) Received: from localhost ([127.0.0.1]:39944 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C8h-0004pp-DT for importer@patchew.org; Fri, 08 Mar 2019 04:50:03 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43238) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C5C-0002L7-F4 for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C5A-0006Iq-RU for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:26 -0500 Received: from mx1.redhat.com ([209.132.183.28]:57246) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C52-00060K-Jj; Fri, 08 Mar 2019 04:46:16 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C1F993680A; Fri, 8 Mar 2019 09:46:15 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6698E1001DF1; Fri, 8 Mar 2019 09:46:12 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id C7EF311384DA; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:45:59 +0100 Message-Id: <20190308094610.21210-5-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 08 Mar 2019 09:46:15 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 04/15] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" pflash_cfi01.c and pflash_cfi02.c start their identifiers with pflash_cfi01_ and pflash_cfi02_ respectively, except for CFI_PFLASH01(), TYPE_CFI_PFLASH01, CFI_PFLASH02(), TYPE_CFI_PFLASH02. Rename for consistency. Suggested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e --- hw/block/pflash_cfi01.c | 12 ++++++------ hw/block/pflash_cfi02.c | 14 +++++++------- include/hw/block/flash.h | 4 ++-- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index d381f14e3c..f75f0a6998 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -59,8 +59,8 @@ do { = \ #define DPRINTF(fmt, ...) do { } while (0) #endif =20 -#define CFI_PFLASH01(obj) \ - OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01) +#define PFLASH_CFI01(obj) \ + OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01) =20 #define PFLASH_BE 0 #define PFLASH_SECURE 1 @@ -698,7 +698,7 @@ static const MemoryRegionOps pflash_cfi01_ops =3D { =20 static void pflash_cfi01_realize(DeviceState *dev, Error **errp) { - PFlashCFI01 *pfl =3D CFI_PFLASH01(dev); + PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); uint64_t total_len; int ret; uint64_t blocks_per_device, sector_len_per_device, device_len; @@ -926,7 +926,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass,= void *data) =20 =20 static const TypeInfo pflash_cfi01_info =3D { - .name =3D TYPE_CFI_PFLASH01, + .name =3D TYPE_PFLASH_CFI01, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(PFlashCFI01), .class_init =3D pflash_cfi01_class_init, @@ -949,7 +949,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, uint16_t id2, uint16_t id3, int be) { - DeviceState *dev =3D qdev_create(NULL, TYPE_CFI_PFLASH01); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); =20 if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); @@ -966,7 +966,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, qdev_init_nofail(dev); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return CFI_PFLASH01(dev); + return PFLASH_CFI01(dev); } =20 MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index df32e20bd7..933de99d6a 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -57,8 +57,8 @@ do { = \ =20 #define PFLASH_LAZY_ROMD_THRESHOLD 42 =20 -#define CFI_PFLASH02(obj) \ - OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02) +#define PFLASH_CFI02(obj) \ + OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02) =20 struct PFlashCFI02 { /*< private >*/ @@ -534,7 +534,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le =3D { =20 static void pflash_cfi02_realize(DeviceState *dev, Error **errp) { - PFlashCFI02 *pfl =3D CFI_PFLASH02(dev); + PFlashCFI02 *pfl =3D PFLASH_CFI02(dev); uint32_t chip_len; int ret; Error *local_err =3D NULL; @@ -698,7 +698,7 @@ static Property pflash_cfi02_properties[] =3D { =20 static void pflash_cfi02_unrealize(DeviceState *dev, Error **errp) { - PFlashCFI02 *pfl =3D CFI_PFLASH02(dev); + PFlashCFI02 *pfl =3D PFLASH_CFI02(dev); timer_del(&pfl->timer); } =20 @@ -713,7 +713,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass,= void *data) } =20 static const TypeInfo pflash_cfi02_info =3D { - .name =3D TYPE_CFI_PFLASH02, + .name =3D TYPE_PFLASH_CFI02, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(PFlashCFI02), .class_init =3D pflash_cfi02_class_init, @@ -738,7 +738,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, uint16_t unlock_addr1, int be) { - DeviceState *dev =3D qdev_create(NULL, TYPE_CFI_PFLASH02); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI02); =20 if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); @@ -758,5 +758,5 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, qdev_init_nofail(dev); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return CFI_PFLASH02(dev); + return PFLASH_CFI02(dev); } diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 51d8f60c65..333005d9ff 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -7,7 +7,7 @@ =20 /* pflash_cfi01.c */ =20 -#define TYPE_CFI_PFLASH01 "cfi.pflash01" +#define TYPE_PFLASH_CFI01 "cfi.pflash01" =20 typedef struct PFlashCFI01 PFlashCFI01; =20 @@ -24,7 +24,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); =20 /* pflash_cfi02.c */ =20 -#define TYPE_CFI_PFLASH02 "cfi.pflash02" +#define TYPE_PFLASH_CFI02 "cfi.pflash02" =20 typedef struct PFlashCFI02 PFlashCFI02; =20 --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155203862698025.556463810772584; Fri, 8 Mar 2019 01:50:26 -0800 (PST) Received: from localhost ([127.0.0.1]:39946 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C8w-00053A-Kb for importer@patchew.org; Fri, 08 Mar 2019 04:50:19 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43039) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C58-0002Et-93 for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C56-00069w-9r for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:22 -0500 Received: from mx1.redhat.com ([209.132.183.28]:60344) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C53-00061i-DQ; Fri, 08 Mar 2019 04:46:17 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9A027821EF; Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3771C5C1A1; Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id CB35D1133040; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:00 +0100 Message-Id: <20190308094610.21210-6-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 08 Mar 2019 09:46:16 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 05/15] hw: Use PFLASH_CFI0{1, 2} and TYPE_PFLASH_CFI0{1, 2} X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We have two open-coded copies of macro PFLASH_CFI01(). Move the macro to the header, so we can ditch the copies. Move PFLASH_CFI02() to the header for symmetry. We define macros TYPE_PFLASH_CFI01 and TYPE_PFLASH_CFI02 for type name strings, then mostly use the strings. If the macros are worth defining, they are worth using. Replace the strings by the macros. Signed-off-by: Markus Armbruster Reviewed-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e --- hw/arm/vexpress.c | 4 ++-- hw/arm/virt.c | 3 ++- hw/block/pflash_cfi01.c | 3 --- hw/block/pflash_cfi02.c | 3 --- hw/xtensa/xtfpga.c | 4 ++-- include/hw/block/flash.h | 4 ++++ 6 files changed, 10 insertions(+), 11 deletions(-) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index ed46d2e730..f07134c424 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -515,7 +515,7 @@ static void vexpress_modify_dtb(const struct arm_boot_i= nfo *info, void *fdt) static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, DriveInfo *di) { - DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); =20 if (di) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(di), @@ -536,7 +536,7 @@ static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr bas= e, const char *name, qdev_init_nofail(dev); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01"); + return PFLASH_CFI01(dev); } =20 static void vexpress_common_init(MachineState *machine) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index c7fb5348ae..773637876f 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -35,6 +35,7 @@ #include "hw/arm/arm.h" #include "hw/arm/primecell.h" #include "hw/arm/virt.h" +#include "hw/block/flash.h" #include "hw/vfio/vfio-calxeda-xgmac.h" #include "hw/vfio/vfio-amd-xgbe.h" #include "hw/display/ramfb.h" @@ -879,7 +880,7 @@ static void create_one_flash(const char *name, hwaddr f= lashbase, * parameters as the flash devices on the Versatile Express board. */ DriveInfo *dinfo =3D drive_get_next(IF_PFLASH); - DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); const uint64_t sectorlength =3D 256 * 1024; =20 diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index f75f0a6998..1c99aa6e4a 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -59,9 +59,6 @@ do { = \ #define DPRINTF(fmt, ...) do { } while (0) #endif =20 -#define PFLASH_CFI01(obj) \ - OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01) - #define PFLASH_BE 0 #define PFLASH_SECURE 1 =20 diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 933de99d6a..915c6171a0 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -57,9 +57,6 @@ do { = \ =20 #define PFLASH_LAZY_ROMD_THRESHOLD 42 =20 -#define PFLASH_CFI02(obj) \ - OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02) - struct PFlashCFI02 { /*< private >*/ SysBusDevice parent_obj; diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 3d59a7a356..e05ef75a75 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -167,7 +167,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *add= ress_space, DriveInfo *dinfo, int be) { SysBusDevice *s; - DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); =20 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo), &error_abort); @@ -181,7 +181,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *add= ress_space, s =3D SYS_BUS_DEVICE(dev); memory_region_add_subregion(address_space, board->flash->base, sysbus_mmio_get_region(s, 0)); - return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01"); + return PFLASH_CFI01(dev); } =20 static uint64_t translate_phys_addr(void *opaque, uint64_t addr) diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 333005d9ff..aeea3ca99d 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -8,6 +8,8 @@ /* pflash_cfi01.c */ =20 #define TYPE_PFLASH_CFI01 "cfi.pflash01" +#define PFLASH_CFI01(obj) \ + OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01) =20 typedef struct PFlashCFI01 PFlashCFI01; =20 @@ -25,6 +27,8 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); /* pflash_cfi02.c */ =20 #define TYPE_PFLASH_CFI02 "cfi.pflash02" +#define PFLASH_CFI02(obj) \ + OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02) =20 typedef struct PFlashCFI02 PFlashCFI02; =20 --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552039081677816.293124047354; Fri, 8 Mar 2019 01:58:01 -0800 (PST) Received: from localhost ([127.0.0.1]:40084 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CGL-0003BM-8u for importer@patchew.org; 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Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id CD9AC1133056; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:01 +0100 Message-Id: <20190308094610.21210-7-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 08 Mar 2019 09:46:19 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 06/15] sam460ex: Don't size flash memory to match backing image X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Machine "sam460ex" maps its flash memory at address 0xFFF00000. When no image is supplied, its size is 1MiB (0x100000), and 512KiB of ROM get mapped on top of its second half. Else, it's the size of the image rounded up to the next multiple of 64KiB. The rounding is actually useless: pflash_cfi01_realize() fails with "failed to read the initial flash content" unless it's a no-op. I have no idea what happens when the pflash's size exceeds 1MiB. Useful outcomes seem unlikely. I guess memory at the end of the address space remains unmapped when it's smaller than 1MiB. Again, useful outcomes seem unlikely. The physical hardware appears to have 512KiB of flash memory: https://eu.mouser.com/datasheet/2/268/atmel_AT49BV040B-1180330.pdf For now, just set the flash memory size to 1MiB regardless of image size, and document the mess. Cc: BALATON Zoltan Signed-off-by: Markus Armbruster Reviewed-by: BALATON Zoltan Reviewed-by: Alex Benn=C3=A9e --- hw/ppc/sam460ex.c | 41 ++++++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index d455c4bd07..c6258ca1d0 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -91,32 +91,43 @@ struct boot_info { =20 static int sam460ex_load_uboot(void) { + /* + * This first creates 1MiB of flash memory mapped at the end of + * the 32-bit address space (0xFFF00000..0xFFFFFFFF). + * + * If_PFLASH unit 0 is defined, the flash memory is initialized + * from that block backend. + * + * Else, it's initialized to zero. And then 512KiB of ROM get + * mapped on top of its second half (0xFFF80000..0xFFFFFFFF), + * initialized from u-boot-sam460-20100605.bin. + * + * This doesn't smell right. + * + * The physical hardware appears to have 512KiB flash memory. + * + * TODO Figure out what we really need here, and clean this up. + */ + DriveInfo *dinfo; - BlockBackend *blk =3D NULL; - hwaddr base =3D FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32); - long bios_size =3D FLASH_SIZE; - int fl_sectors; =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); - if (dinfo) { - blk =3D blk_by_legacy_dinfo(dinfo); - bios_size =3D blk_getlength(blk); - } - fl_sectors =3D (bios_size + 65535) >> 16; - - if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size, - blk, 64 * KiB, fl_sectors, + if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32), + NULL, "sam460ex.flash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, FLASH_SIZE / (64 * KiB), 1, 0x89, 0x18, 0x0000, 0x0, 1)) { error_report("Error registering flash memory"); /* XXX: return an error instead? */ exit(1); } =20 - if (!blk) { + if (!dinfo) { /*error_report("No flash image given with the 'pflash' parameter," " using default u-boot image");*/ - base =3D UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32); - rom_add_file_fixed(UBOOT_FILENAME, base, -1); + rom_add_file_fixed(UBOOT_FILENAME, + UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32), + -1); } =20 return 0; --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552039078372333.38100757458506; Fri, 8 Mar 2019 01:57:58 -0800 (PST) Received: from localhost ([127.0.0.1]:40082 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CGJ-00038l-7j for importer@patchew.org; Fri, 08 Mar 2019 04:57:55 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43059) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C58-0002FS-IO for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C56-0006Aw-KG for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:22 -0500 Received: from mx1.redhat.com ([209.132.183.28]:60348) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C53-00061l-Dz; Fri, 08 Mar 2019 04:46:17 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A0639821F1; Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3A49F1A92A; Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id D2C0F113305C; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:02 +0100 Message-Id: <20190308094610.21210-8-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 08 Mar 2019 09:46:16 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 07/15] ppc405_boards: Delete stale, disabled DEBUG_BOARD_INIT code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The disabled DEBUG_BOARD_INIT code goes back to the initial commit 1a6c0886203, and has since seen only mechanical updates. It sure feels like useless clutter now. Delete it. Suggested-by: Alex Benn=C3=A9e Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e --- hw/ppc/ppc405_boards.c | 60 ------------------------------------------ 1 file changed, 60 deletions(-) diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index f47b15f10e..bb73d6d848 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -48,8 +48,6 @@ =20 #define USE_FLASH_BIOS =20 -//#define DEBUG_BOARD_INIT - /*************************************************************************= ****/ /* PPC405EP reference board (IBM) */ /* Standalone board with: @@ -171,9 +169,6 @@ static void ref405ep_init(MachineState *machine) ram_bases[1] =3D 0x00000000; ram_sizes[1] =3D 0x00000000; ram_size =3D 128 * MiB; -#ifdef DEBUG_BOARD_INIT - printf("%s: register cpu\n", __func__); -#endif env =3D ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes, 33333333, &pic, kernel_filename =3D=3D NULL ? 0 : = 1); /* allocate SRAM */ @@ -182,9 +177,6 @@ static void ref405ep_init(MachineState *machine) &error_fatal); memory_region_add_subregion(sysmem, 0xFFF00000, sram); /* allocate and load BIOS */ -#ifdef DEBUG_BOARD_INIT - printf("%s: register BIOS\n", __func__); -#endif fl_idx =3D 0; #ifdef USE_FLASH_BIOS dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); @@ -193,12 +185,6 @@ static void ref405ep_init(MachineState *machine) =20 bios_size =3D blk_getlength(blk); fl_sectors =3D (bios_size + 65535) >> 16; -#ifdef DEBUG_BOARD_INIT - printf("Register parallel flash %d size %lx" - " at addr %lx '%s' %d\n", - fl_idx, bios_size, -bios_size, - blk_name(blk), fl_sectors); -#endif pflash_cfi02_register((uint32_t)(-bios_size), NULL, "ef405ep.bios", bios_size, blk, 65536, fl_sectors, 1, @@ -208,9 +194,6 @@ static void ref405ep_init(MachineState *machine) } else #endif { -#ifdef DEBUG_BOARD_INIT - printf("Load BIOS from file\n"); -#endif bios =3D g_new(MemoryRegion, 1); memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE, &error_fatal); @@ -239,21 +222,12 @@ static void ref405ep_init(MachineState *machine) memory_region_set_readonly(bios, true); } /* Register FPGA */ -#ifdef DEBUG_BOARD_INIT - printf("%s: register FPGA\n", __func__); -#endif ref405ep_fpga_init(sysmem, 0xF0300000); /* Register NVRAM */ -#ifdef DEBUG_BOARD_INIT - printf("%s: register NVRAM\n", __func__); -#endif m48t59_init(NULL, 0xF0000000, 0, 8192, 1968, 8); /* Load kernel */ linux_boot =3D (kernel_filename !=3D NULL); if (linux_boot) { -#ifdef DEBUG_BOARD_INIT - printf("%s: load kernel\n", __func__); -#endif memset(&bd, 0, sizeof(bd)); bd.bi_memstart =3D 0x00000000; bd.bi_memsize =3D ram_size; @@ -325,10 +299,6 @@ static void ref405ep_init(MachineState *machine) initrd_size =3D 0; bdloc =3D 0; } -#ifdef DEBUG_BOARD_INIT - printf("bdloc " RAM_ADDR_FMT "\n", bdloc); - printf("%s: Done\n", __func__); -#endif } =20 static void ref405ep_class_init(ObjectClass *oc, void *data) @@ -473,15 +443,9 @@ static void taihu_405ep_init(MachineState *machine) memory_region_init_alias(&ram_memories[1], NULL, "taihu_405ep.ram-1", ram, ram_bases[1], ram_sizes[1]); -#ifdef DEBUG_BOARD_INIT - printf("%s: register cpu\n", __func__); -#endif ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes, 33333333, &pic, kernel_filename =3D=3D NULL ? 0 : 1); /* allocate and load BIOS */ -#ifdef DEBUG_BOARD_INIT - printf("%s: register BIOS\n", __func__); -#endif fl_idx =3D 0; #if defined(USE_FLASH_BIOS) dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); @@ -492,12 +456,6 @@ static void taihu_405ep_init(MachineState *machine) /* XXX: should check that size is 2MB */ // bios_size =3D 2 * 1024 * 1024; fl_sectors =3D (bios_size + 65535) >> 16; -#ifdef DEBUG_BOARD_INIT - printf("Register parallel flash %d size %lx" - " at addr %lx '%s' %d\n", - fl_idx, bios_size, -bios_size, - blk_name(blk), fl_sectors); -#endif pflash_cfi02_register((uint32_t)(-bios_size), NULL, "taihu_405ep.bios", bios_size, blk, 65536, fl_sectors, 1, @@ -507,9 +465,6 @@ static void taihu_405ep_init(MachineState *machine) } else #endif { -#ifdef DEBUG_BOARD_INIT - printf("Load BIOS from file\n"); -#endif if (bios_name =3D=3D NULL) bios_name =3D BIOS_FILENAME; bios =3D g_new(MemoryRegion, 1); @@ -542,12 +497,6 @@ static void taihu_405ep_init(MachineState *machine) /* XXX: should check that size is 32MB */ bios_size =3D 32 * MiB; fl_sectors =3D (bios_size + 65535) >> 16; -#ifdef DEBUG_BOARD_INIT - printf("Register parallel flash %d size %lx" - " at addr " TARGET_FMT_lx " '%s'\n", - fl_idx, bios_size, (target_ulong)0xfc000000, - blk_name(blk)); -#endif pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_= size, blk, 65536, fl_sectors, 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, @@ -555,16 +504,10 @@ static void taihu_405ep_init(MachineState *machine) fl_idx++; } /* Register CLPD & LCD display */ -#ifdef DEBUG_BOARD_INIT - printf("%s: register CPLD\n", __func__); -#endif taihu_cpld_init(sysmem, 0x50100000); /* Load kernel */ linux_boot =3D (kernel_filename !=3D NULL); if (linux_boot) { -#ifdef DEBUG_BOARD_INIT - printf("%s: load kernel\n", __func__); -#endif kernel_base =3D KERNEL_LOAD_ADDR; /* now we can load the kernel */ kernel_size =3D load_image_targphys(kernel_filename, kernel_base, @@ -593,9 +536,6 @@ static void taihu_405ep_init(MachineState *machine) initrd_base =3D 0; initrd_size =3D 0; } -#ifdef DEBUG_BOARD_INIT - printf("%s: Done\n", __func__); -#endif } =20 static void taihu_class_init(ObjectClass *oc, void *data) --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552039243259228.4931914629483; Fri, 8 Mar 2019 02:00:43 -0800 (PST) Received: from localhost ([127.0.0.1]:40138 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CIx-0005fJ-Oz for importer@patchew.org; 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Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id EE8DD113303F; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:03 +0100 Message-Id: <20190308094610.21210-9-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Fri, 08 Mar 2019 09:46:19 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 08/15] ppc405_boards: Don't size flash memory to match backing image X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Machine "ref405ep" maps its flash memory at address 2^32 - image size. Image size is rounded up to the next multiple of 64KiB. Useless, because pflash_cfi02_realize() fails with "failed to read the initial flash content" unless the rounding is a no-op. If the image size exceeds 0x80000 Bytes, we overlap first SRAM, then other stuff. No idea how that would play out, but useful outcomes seem unlikely. Map the flash memory at fixed address 0xFFF80000 with size 512KiB, regardless of image size, to match the physical hardware. Machine "taihu" maps its boot flash memory similarly. The code even has a comment /* XXX: should check that size is 2MB */, followed by disabled code to adjust the size to 2MiB regardless of image size. Its code to map its application flash memory looks the same, except there the XXX comment asks for 32MiB, and the code to adjust the size isn't disabled. Note that pflash_cfi02_realize() fails with "failed to read the initial flash content" for images smaller than 32MiB. Map the boot flash memory at fixed address 0xFFE00000 with size 2MiB, to match the physical hardware. Delete dead code from application flash mapping, and simplify some. Cc: David Gibson Signed-off-by: Markus Armbruster Acked-by: David Gibson Reviewed-by: Alex Benn=C3=A9e --- hw/ppc/ppc405_boards.c | 36 ++++++++++++------------------------ 1 file changed, 12 insertions(+), 24 deletions(-) diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index bb73d6d848..fe8e3cad12 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -156,7 +156,7 @@ static void ref405ep_init(MachineState *machine) target_ulong kernel_base, initrd_base; long kernel_size, initrd_size; int linux_boot; - int fl_idx, fl_sectors, len; + int len; DriveInfo *dinfo; MemoryRegion *sysmem =3D get_system_memory(); =20 @@ -177,20 +177,16 @@ static void ref405ep_init(MachineState *machine) &error_fatal); memory_region_add_subregion(sysmem, 0xFFF00000, sram); /* allocate and load BIOS */ - fl_idx =3D 0; #ifdef USE_FLASH_BIOS - dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); + dinfo =3D drive_get(IF_PFLASH, 0, 0); if (dinfo) { - BlockBackend *blk =3D blk_by_legacy_dinfo(dinfo); - - bios_size =3D blk_getlength(blk); - fl_sectors =3D (bios_size + 65535) >> 16; + bios_size =3D 8 * MiB; pflash_cfi02_register((uint32_t)(-bios_size), NULL, "ef405ep.bios", bios_size, - blk, 65536, fl_sectors, 1, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, bios_size / (64 * KiB), 1, 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); - fl_idx++; } else #endif { @@ -425,7 +421,7 @@ static void taihu_405ep_init(MachineState *machine) target_ulong kernel_base, initrd_base; long kernel_size, initrd_size; int linux_boot; - int fl_idx, fl_sectors; + int fl_idx; DriveInfo *dinfo; =20 /* RAM is soldered to the board so the size cannot be changed */ @@ -450,15 +446,11 @@ static void taihu_405ep_init(MachineState *machine) #if defined(USE_FLASH_BIOS) dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); if (dinfo) { - BlockBackend *blk =3D blk_by_legacy_dinfo(dinfo); - - bios_size =3D blk_getlength(blk); - /* XXX: should check that size is 2MB */ - // bios_size =3D 2 * 1024 * 1024; - fl_sectors =3D (bios_size + 65535) >> 16; - pflash_cfi02_register((uint32_t)(-bios_size), + bios_size =3D 2 * MiB; + pflash_cfi02_register(0xFFE00000, NULL, "taihu_405ep.bios", bios_size, - blk, 65536, fl_sectors, 1, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, bios_size / (64 * KiB), 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; @@ -491,14 +483,10 @@ static void taihu_405ep_init(MachineState *machine) /* Register Linux flash */ dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); if (dinfo) { - BlockBackend *blk =3D blk_by_legacy_dinfo(dinfo); - - bios_size =3D blk_getlength(blk); - /* XXX: should check that size is 32MB */ bios_size =3D 32 * MiB; - fl_sectors =3D (bios_size + 65535) >> 16; pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_= size, - blk, 65536, fl_sectors, 1, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, bios_size / (64 * KiB), 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552038800359952.8749462313201; Fri, 8 Mar 2019 01:53:20 -0800 (PST) Received: from localhost ([127.0.0.1]:40006 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CBp-0007UG-BB for importer@patchew.org; Fri, 08 Mar 2019 04:53:17 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43155) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C5A-0002Hz-Ex for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C59-0006Ga-Bx for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:24 -0500 Received: from mx1.redhat.com ([209.132.183.28]:49310) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C55-00067W-QE; Fri, 08 Mar 2019 04:46:19 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id F227630EBE71; Fri, 8 Mar 2019 09:46:18 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B1818611D1; Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id F1BD81132EC4; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:04 +0100 Message-Id: <20190308094610.21210-10-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.46]); Fri, 08 Mar 2019 09:46:19 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 09/15] r2d: Fix flash memory size, sector size, width, device ID X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, Magnus Damm , mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" pflash_cfi02_register() takes a size in bytes, a block size in bytes and a number of blocks. r2d_init() passes FLASH_SIZE, 16 * KiB, FLASH_SIZE >> 16. Does not compute: size doesn't match block size * number of blocks. The latter happens to win: FLASH_SIZE / 4, i.e. 8MiB. The best information we have on the physical hardware lists a Cypress S29PL127J60TFI130 128MiBit NOR flash addressable in words of 16 bits, in sectors of 4 and 32 Kibiwords. We don't model multiple sector sizes. Fix the flash size from 8 to 16MiB, and adjust the sector size from 16 to 64KiB. Fix the width from 4 to 2. While there, supply the real device IDs 0x0001, 0x227e, 0x2220, 0x2200 instead of zeros. Cc: Magnus Damm Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/sh4/r2d.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index dcdb3728cb..cd23c60b86 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -44,7 +44,7 @@ #include "exec/address-spaces.h" =20 #define FLASH_BASE 0x00000000 -#define FLASH_SIZE 0x02000000 +#define FLASH_SIZE (16 * MiB) =20 #define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */ #define SDRAM_SIZE 0x04000000 @@ -288,12 +288,20 @@ static void r2d_init(MachineState *machine) sysbus_mmio_map(busdev, 1, 0x1400080c); mmio_ide_init_drives(dev, dinfo, NULL); =20 - /* onboard flash memory */ + /* + * Onboard flash memory + * According to the old board user document in Japanese (under + * NDA) what is referred to as FROM (Area0) is connected via a + * 32-bit bus and CS0 to CN8. The docs mention a Cypress + * S29PL127J60TFI130 chipsset. Per the 'S29PL-J 002-00615 + * Rev. *E' datasheet, it is a 128Mbit NOR parallel flash + * addressable in words of 16bit. + */ dinfo =3D drive_get(IF_PFLASH, 0, 0); pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 16 * KiB, FLASH_SIZE >> 16, - 1, 4, 0x0000, 0x0000, 0x0000, 0x0000, + 64 * KiB, FLASH_SIZE >> 16, + 1, 2, 0x0001, 0x227e, 0x2220, 0x2200, 0x555, 0x2aa, 0); =20 /* NIC: rtl8139 on-board, and 2 slots. */ --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552038904980130.65775238361016; Fri, 8 Mar 2019 01:55:04 -0800 (PST) Received: from localhost ([127.0.0.1]:40024 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CDV-0000X5-0V for importer@patchew.org; Fri, 08 Mar 2019 04:55:01 -0500 Received: from eggs.gnu.org ([209.51.188.92]:42972) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C57-0002DL-5T for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C55-00068v-Rp for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:21 -0500 Received: from mx1.redhat.com ([209.132.183.28]:13874) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C53-00062r-Qd; Fri, 08 Mar 2019 04:46:17 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id F3C97307D844; Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B803B5C1A1; Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 012A61132D3C; Fri, 8 Mar 2019 10:46:10 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:05 +0100 Message-Id: <20190308094610.21210-11-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Fri, 08 Mar 2019 09:46:17 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 10/15] mips_malta: Delete disabled, broken DEBUG_BOARD_INIT code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The debug code under DEBUG_BOARD_INIT doesn't compile: hw/mips/mips_malta.c:1273:16: error: implicit declaration of function= =E2=80=98blk_name=E2=80=99; did you mean =E2=80=98basename=E2=80=99? [-Wer= ror=3Dimplicit-function-declaration] blk_name(dinfo->bdrv), fl_sectors); ^~~~~~~~ hw/mips/mips_malta.c:1273:16: error: nested extern declaration of =E2= =80=98blk_name=E2=80=99 [-Werror=3Dnested-externs] hw/mips/mips_malta.c:1273:30: error: =E2=80=98DriveInfo=E2=80=99 {aka= =E2=80=98struct DriveInfo=E2=80=99} has no member named =E2=80=98bdrv=E2= =80=99 blk_name(dinfo->bdrv), fl_sectors); ^~ Delete it. Reported-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Markus Armbruster Reviewed-by: Aleksandar Markovic Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/mips_malta.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 2827074e9b..8736d3a00e 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -58,8 +58,6 @@ #include "exec/semihost.h" #include "hw/mips/cps.h" =20 -//#define DEBUG_BOARD_INIT - #define ENVP_ADDR 0x80002000l #define ENVP_NB_ENTRIES 16 #define ENVP_ENTRY_SIZE 256 @@ -1265,14 +1263,6 @@ void mips_malta_init(MachineState *machine) =20 /* Load firmware in flash / BIOS. */ dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); -#ifdef DEBUG_BOARD_INIT - if (dinfo) { - printf("Register parallel flash %d size " TARGET_FMT_lx " at " - "addr %08llx '%s' %x\n", - fl_idx, bios_size, FLASH_ADDRESS, - blk_name(dinfo->bdrv), fl_sectors); - } -#endif fl =3D pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios", BIOS_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15520385658721018.7394705474914; Fri, 8 Mar 2019 01:49:25 -0800 (PST) Received: from localhost ([127.0.0.1]:39942 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C82-0004Df-NU for importer@patchew.org; Fri, 08 Mar 2019 04:49:22 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43171) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C5A-0002Il-Pk for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C59-0006Gh-Fk for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:24 -0500 Received: from mx1.redhat.com ([209.132.183.28]:60376) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C56-00068V-AH; Fri, 08 Mar 2019 04:46:20 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 66C8488306; Fri, 8 Mar 2019 09:46:19 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BD9E95D704; Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 08FDA1132D3F; Fri, 8 Mar 2019 10:46:11 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:06 +0100 Message-Id: <20190308094610.21210-12-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 08 Mar 2019 09:46:19 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 11/15] hw/mips/malta: Remove fl_sectors variable X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 Variable fl_sectors is used just once. Since fl_sectors =3D bios_size >> 16 and bios_size =3D FLASH_SIZE there, we can simply use FLASH_SIZE >> 16, and eliminate variable. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Signed-off-by: Markus Armbruster --- hw/mips/mips_malta.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 8736d3a00e..51a3ecab59 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1206,7 +1206,6 @@ void mips_malta_init(MachineState *machine) DriveInfo *dinfo; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; int fl_idx =3D 0; - int fl_sectors =3D bios_size >> 16; int be; =20 DeviceState *dev =3D qdev_create(NULL, TYPE_MIPS_MALTA); @@ -1266,7 +1265,7 @@ void mips_malta_init(MachineState *machine) fl =3D pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios", BIOS_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 65536, fl_sectors, + 65536, FLASH_SIZE >> 16, 4, 0x0000, 0x0000, 0x0000, 0x0000, be); bios =3D pflash_cfi01_get_memory(fl); fl_idx++; --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552038748953675.7406033003701; Fri, 8 Mar 2019 01:52:28 -0800 (PST) Received: from localhost ([127.0.0.1]:39996 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CAz-0006kl-TM for importer@patchew.org; Fri, 08 Mar 2019 04:52:25 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43166) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C5A-0002II-MA for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C59-0006H2-P2 for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:24 -0500 Received: from mx1.redhat.com ([209.132.183.28]:40528) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C55-00067v-W6; Fri, 08 Mar 2019 04:46:20 -0500 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2B0FC3082134; Fri, 8 Mar 2019 09:46:19 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C350860C5F; Fri, 8 Mar 2019 09:46:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 0F2C01132BD8; Fri, 8 Mar 2019 10:46:11 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:07 +0100 Message-Id: <20190308094610.21210-13-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Fri, 08 Mar 2019 09:46:19 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 12/15] hw/mips/malta: Restrict 'bios_size' variable scope X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The 'bios_size' variable is only used in the 'if (!kernel_filename && !dinfo)' clause. This is the case when we don't provide -pflash command line option, and also don't provide a -kernel option. In this case we will check for the -bios option, or use the default BIOS_FILENAME file. The 'bios' term is valid in this if statement, but is confuse in the whole mips_malta_init() scope. Restrict his scope. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Signed-off-by: Markus Armbruster --- hw/mips/mips_malta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 51a3ecab59..4dfe06a1a0 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1193,7 +1193,6 @@ void mips_malta_init(MachineState *machine) MemoryRegion *ram_low_preio =3D g_new(MemoryRegion, 1); MemoryRegion *ram_low_postio; MemoryRegion *bios, *bios_copy =3D g_new(MemoryRegion, 1); - target_long bios_size =3D FLASH_SIZE; const size_t smbus_eeprom_size =3D 8 * 256; uint8_t *smbus_eeprom_buf =3D g_malloc0(smbus_eeprom_size); int64_t kernel_entry, bootloader_run_addr; @@ -1301,6 +1300,7 @@ void mips_malta_init(MachineState *machine) bootloader_run_addr, kernel_entry); } } else { + target_long bios_size =3D FLASH_SIZE; /* The flash region isn't executable from a KVM guest */ if (kvm_enabled()) { error_report("KVM enabled but no -kernel argument was specifie= d. " --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552039414899983.1872492191599; Fri, 8 Mar 2019 02:03:34 -0800 (PST) Received: from localhost ([127.0.0.1]:40183 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CLb-0007mL-Nl for importer@patchew.org; Fri, 08 Mar 2019 05:03:23 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43177) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C5B-0002JJ-4u for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C5A-0006HR-0V for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:25 -0500 Received: from mx1.redhat.com ([209.132.183.28]:42074) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C56-00067z-8n; Fri, 08 Mar 2019 04:46:20 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id ECC4687648; Fri, 8 Mar 2019 09:46:18 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 55E801001DF1; Fri, 8 Mar 2019 09:46:17 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 144391132B6B; Fri, 8 Mar 2019 10:46:11 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:08 +0100 Message-Id: <20190308094610.21210-14-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 08 Mar 2019 09:46:19 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 13/15] mips_malta: Clean up definition of flash memory size somewhat X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, Aleksandar Rikalo , alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" pflash_cfi01_register() takes a size in bytes, a block size in bytes and a number of blocks. mips_malta_init() passes BIOS_SIZE, 65536, FLASH_SIZE >> 16. Actually consistent only because BIOS_SIZE (defined in include/hw/mips/bios.h as (4 * MiB)) matches FLASH_SIZE (defined locally as 0x400000). Confusing all the same. Pass FLASH_SIZE instead of BIOS_SIZE. Cc: Aurelien Jarno Cc: Aleksandar Rikalo Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/mips_malta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 4dfe06a1a0..2f20f56458 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1262,7 +1262,7 @@ void mips_malta_init(MachineState *machine) /* Load firmware in flash / BIOS. */ dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); fl =3D pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios", - BIOS_SIZE, + FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 65536, FLASH_SIZE >> 16, 4, 0x0000, 0x0000, 0x0000, 0x0000, be); --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552039341465278.92700316466517; Fri, 8 Mar 2019 02:02:21 -0800 (PST) Received: from localhost ([127.0.0.1]:40181 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CKX-00071E-As for importer@patchew.org; Fri, 08 Mar 2019 05:02:17 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43394) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C5H-0002QF-79 for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C5F-0006Pv-4e for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:31 -0500 Received: from mx1.redhat.com ([209.132.183.28]:60010) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C56-00069R-Qp; Fri, 08 Mar 2019 04:46:21 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E48EFBCD20; Fri, 8 Mar 2019 09:46:19 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 27A585D787; Fri, 8 Mar 2019 09:46:17 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 199B51132B2C; Fri, 8 Mar 2019 10:46:11 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:09 +0100 Message-Id: <20190308094610.21210-15-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Fri, 08 Mar 2019 09:46:19 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 14/15] pflash: Clean up after commit 368a354f02b, part 1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" QOMification left parameter @qdev unused in pflash_cfi01_register() and pflash_cfi02_register(). All callers pass NULL. Remove. Signed-off-by: Markus Armbruster Reviewed-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/collie.c | 4 ++-- hw/arm/digic_boards.c | 2 +- hw/arm/gumstix.c | 4 ++-- hw/arm/mainstone.c | 2 +- hw/arm/musicpal.c | 4 ++-- hw/arm/omap_sx1.c | 4 ++-- hw/arm/versatilepb.c | 2 +- hw/arm/xilinx_zynq.c | 2 +- hw/arm/z2.c | 3 +-- hw/block/pflash_cfi01.c | 2 +- hw/block/pflash_cfi02.c | 2 +- hw/i386/pc_sysfw.c | 2 +- hw/lm32/lm32_boards.c | 4 ++-- hw/lm32/milkymist.c | 2 +- hw/microblaze/petalogix_ml605_mmu.c | 3 +-- hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +- hw/mips/mips_malta.c | 2 +- hw/mips/mips_r4k.c | 2 +- hw/ppc/ppc405_boards.c | 6 +++--- hw/ppc/sam460ex.c | 2 +- hw/ppc/virtex_ml507.c | 2 +- hw/sh4/r2d.c | 2 +- include/hw/block/flash.h | 4 ++-- 23 files changed, 31 insertions(+), 33 deletions(-) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index 48b732c176..cbc4400f8e 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -36,12 +36,12 @@ static void collie_init(MachineState *machine) s =3D sa1110_init(sysmem, collie_binfo.ram_size, machine->cpu_type); =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(SA_CS0, NULL, "collie.fl1", 0x02000000, + pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); =20 dinfo =3D drive_get(IF_PFLASH, 0, 1); - pflash_cfi01_register(SA_CS1, NULL, "collie.fl2", 0x02000000, + pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); =20 diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index 9f11dcd11f..15a00a1be3 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -129,7 +129,7 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *= s, hwaddr addr, #define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024) #define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024) =20 - pflash_cfi02_register(addr, NULL, "pflash", FLASH_K8P3215UQB_SIZE, + pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE, NULL, FLASH_K8P3215UQB_SECTOR_SIZE, FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_= SIZE, DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE, diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c index 56cb763c4e..304dbeab2f 100644 --- a/hw/arm/gumstix.c +++ b/hw/arm/gumstix.c @@ -72,7 +72,7 @@ static void connex_init(MachineState *machine) #else be =3D 0; #endif - if (!pflash_cfi01_register(0x00000000, NULL, "connext.rom", connex_rom, + if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, sector_len, connex_rom / sector_len, 2, 0, 0, 0, 0, be)) { @@ -109,7 +109,7 @@ static void verdex_init(MachineState *machine) #else be =3D 0; #endif - if (!pflash_cfi01_register(0x00000000, NULL, "verdex.rom", verdex_rom, + if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, sector_len, verdex_rom / sector_len, 2, 0, 0, 0, 0, be)) { diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index 0beb5c426b..2a1c1072db 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -148,7 +148,7 @@ static void mainstone_common_init(MemoryRegion *address= _space_mem, exit(1); } =20 - if (!pflash_cfi01_register(mainstone_flash_base[i], NULL, + if (!pflash_cfi01_register(mainstone_flash_base[i], i ? "mainstone.flash1" : "mainstone.fla= sh0", MAINSTONE_FLASH, blk_by_legacy_dinfo(dinfo), diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index d22532a11c..cc780dfb37 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1636,14 +1636,14 @@ static void musicpal_init(MachineState *machine) * image is smaller than 32 MB. */ #ifdef TARGET_WORDS_BIGENDIAN - pflash_cfi02_register(0x100000000ULL-MP_FLASH_SIZE_MAX, NULL, + pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, "musicpal.flash", flash_size, blk, 0x10000, (flash_size + 0xffff) >> 16, MP_FLASH_SIZE_MAX / flash_size, 2, 0x00BF, 0x236D, 0x0000, 0x0000, 0x5555, 0x2AAA, 1); #else - pflash_cfi02_register(0x100000000ULL-MP_FLASH_SIZE_MAX, NULL, + pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, "musicpal.flash", flash_size, blk, 0x10000, (flash_size + 0xffff) >> 16, MP_FLASH_SIZE_MAX / flash_size, diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index 84550f0236..b1128777cf 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -152,7 +152,7 @@ static void sx1_init(MachineState *machine, const int v= ersion) #endif =20 if ((dinfo =3D drive_get(IF_PFLASH, 0, fl_idx)) !=3D NULL) { - if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL, + if (!pflash_cfi01_register(OMAP_CS0_BASE, "omap_sx1.flash0-1", flash_size, blk_by_legacy_dinfo(dinfo), sector_size, flash_size / sector_size, @@ -176,7 +176,7 @@ static void sx1_init(MachineState *machine, const int v= ersion) memory_region_add_subregion(address_space, OMAP_CS1_BASE + flash1_size, &cs[1]); =20 - if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL, + if (!pflash_cfi01_register(OMAP_CS1_BASE, "omap_sx1.flash1-1", flash1_size, blk_by_legacy_dinfo(dinfo), sector_size, flash1_size / sector_size, diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 22b09a1e61..82c5277462 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -365,7 +365,7 @@ static void versatile_init(MachineState *machine, int b= oard_id) /* 0x34000000 NOR Flash */ =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); - if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, NULL, "versatile.flas= h", + if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, "versatile.flash", VERSATILE_FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, VERSATILE_FLASH_SECT_SIZE, diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 57497b0c4d..1fa4a77728 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -205,7 +205,7 @@ static void zynq_init(MachineState *machine) DriveInfo *dinfo =3D drive_get(IF_PFLASH, 0, 0); =20 /* AMD */ - pflash_cfi02_register(0xe2000000, NULL, "zynq.pflash", FLASH_SIZE, + pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, FLASH_SECTOR_SIZE, FLASH_SIZE/FLASH_SECTOR_SIZE, 1, diff --git a/hw/arm/z2.c b/hw/arm/z2.c index 6f18d924df..f8081b2a10 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -324,8 +324,7 @@ static void z2_init(MachineState *machine) exit(1); } =20 - if (!pflash_cfi01_register(Z2_FLASH_BASE, - NULL, "z2.flash0", Z2_FLASH_SIZE, + if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, sector_len, Z2_FLASH_SIZE / sector_len, 4, 0, 0, 0, 0, be)) { diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 1c99aa6e4a..bd42487c0a 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -937,7 +937,7 @@ static void pflash_cfi01_register_types(void) type_init(pflash_cfi01_register_types) =20 PFlashCFI01 *pflash_cfi01_register(hwaddr base, - DeviceState *qdev, const char *name, + const char *name, hwaddr size, BlockBackend *blk, uint32_t sector_len, int nb_blocs, diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 915c6171a0..8f09d31fad 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -724,7 +724,7 @@ static void pflash_cfi02_register_types(void) type_init(pflash_cfi02_register_types) =20 PFlashCFI02 *pflash_cfi02_register(hwaddr base, - DeviceState *qdev, const char *name, + const char *name, hwaddr size, BlockBackend *blk, uint32_t sector_len, int nb_blocs, diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 67e55342f6..9a5be54a85 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -160,7 +160,7 @@ static void pc_system_flash_init(MemoryRegion *rom_memo= ry) =20 /* pflash_cfi01_register() creates a deep copy of the name */ snprintf(name, sizeof name, "system.flash%d", unit); - system_flash =3D pflash_cfi01_register(phys_addr, NULL /* qdev */,= name, + system_flash =3D pflash_cfi01_register(phys_addr, name, size, blk, sector_size, size >> sector_bits, 1 /* width */, diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index 05157f8eab..f726355309 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -114,7 +114,7 @@ static void lm32_evr_init(MachineState *machine) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); /* Spansion S29NS128P */ - pflash_cfi02_register(flash_base, NULL, "lm32_evr.flash", flash_size, + pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, flash_sector_size, flash_size / flash_sector_siz= e, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); @@ -207,7 +207,7 @@ static void lm32_uclinux_init(MachineState *machine) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); /* Spansion S29NS128P */ - pflash_cfi02_register(flash_base, NULL, "lm32_uclinux.flash", flash_si= ze, + pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, flash_sector_size, flash_size / flash_sector_siz= e, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c index b080cf1ca9..ece7e3b699 100644 --- a/hw/lm32/milkymist.c +++ b/hw/lm32/milkymist.c @@ -121,7 +121,7 @@ milkymist_init(MachineState *machine) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); /* Numonyx JS28F256J3F105 */ - pflash_cfi01_register(flash_base, NULL, "milkymist.flash", flash_size, + pflash_cfi01_register(flash_base, "milkymist.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, flash_sector_size, flash_size / flash_sector_siz= e, 2, 0x00, 0x89, 0x00, 0x1d, 1); diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_= ml605_mmu.c index c730878d25..74bcc14cda 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -107,8 +107,7 @@ petalogix_ml605_init(MachineState *machine) dinfo =3D drive_get(IF_PFLASH, 0, 0); /* 5th parameter 2 means bank-width * 10th paremeter 0 means little-endian */ - pflash_cfi01_register(FLASH_BASEADDR, - NULL, "petalogix_ml605.flash", FLASH_SIZE, + pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_S= IZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, FLASH_SIZE >> 16, 2, 0x89, 0x18, 0x0000, 0x0, 0); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petal= ogix_s3adsp1800_mmu.c index b9f0b0d06e..a07b7f8edf 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -88,7 +88,7 @@ petalogix_s3adsp1800_init(MachineState *machine) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); pflash_cfi01_register(FLASH_BASEADDR, - NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE, + "petalogix_s3adsp1800.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, FLASH_SIZE >> 16, 1, 0x89, 0x18, 0x0000, 0x0, 1); diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 2f20f56458..69182962ef 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1261,7 +1261,7 @@ void mips_malta_init(MachineState *machine) =20 /* Load firmware in flash / BIOS. */ dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); - fl =3D pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios", + fl =3D pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 65536, FLASH_SIZE >> 16, diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index a015a6d14e..0b9df466e7 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -235,7 +235,7 @@ void mips_r4k_init(MachineState *machine) load_image_targphys(filename, 0x1fc00000, BIOS_SIZE); } else if ((dinfo =3D drive_get(IF_PFLASH, 0, 0)) !=3D NULL) { uint32_t mips_rom =3D 0x00400000; - if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips= _rom, + if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom, blk_by_legacy_dinfo(dinfo), sector_len, mips_rom / sector_len, 4, 0, 0, 0, 0, be)) { diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index fe8e3cad12..43be8b68d9 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -182,7 +182,7 @@ static void ref405ep_init(MachineState *machine) if (dinfo) { bios_size =3D 8 * MiB; pflash_cfi02_register((uint32_t)(-bios_size), - NULL, "ef405ep.bios", bios_size, + "ef405ep.bios", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, bios_size / (64 * KiB), 1, 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, @@ -448,7 +448,7 @@ static void taihu_405ep_init(MachineState *machine) if (dinfo) { bios_size =3D 2 * MiB; pflash_cfi02_register(0xFFE00000, - NULL, "taihu_405ep.bios", bios_size, + "taihu_405ep.bios", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, bios_size / (64 * KiB), 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, @@ -484,7 +484,7 @@ static void taihu_405ep_init(MachineState *machine) dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); if (dinfo) { bios_size =3D 32 * MiB; - pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_= size, + pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, bios_size / (64 * KiB), 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index c6258ca1d0..9af6018c7d 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -113,7 +113,7 @@ static int sam460ex_load_uboot(void) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32), - NULL, "sam460ex.flash", FLASH_SIZE, + "sam460ex.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, FLASH_SIZE / (64 * KiB), 1, 0x89, 0x18, 0x0000, 0x0, 1)) { diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index 5a711cb3d9..d2085a839c 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -227,7 +227,7 @@ static void virtex_init(MachineState *machine) memory_region_add_subregion(address_space_mem, ram_base, phys_ram); =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZ= E, + pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, FLASH_SIZE >> 16, 1, 0x89, 0x18, 0x0000, 0x0, 1); diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index cd23c60b86..c6514bb817 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -298,7 +298,7 @@ static void r2d_init(MachineState *machine) * addressable in words of 16bit. */ dinfo =3D drive_get(IF_PFLASH, 0, 0); - pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE, + pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, FLASH_SIZE >> 16, 1, 2, 0x0001, 0x227e, 0x2220, 0x2200, diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index aeea3ca99d..3e48901c84 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -14,7 +14,7 @@ typedef struct PFlashCFI01 PFlashCFI01; =20 PFlashCFI01 *pflash_cfi01_register(hwaddr base, - DeviceState *qdev, const char *name, + const char *name, hwaddr size, BlockBackend *blk, uint32_t sector_len, int nb_blocs, @@ -33,7 +33,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); typedef struct PFlashCFI02 PFlashCFI02; =20 PFlashCFI02 *pflash_cfi02_register(hwaddr base, - DeviceState *qdev, const char *name, + const char *name, hwaddr size, BlockBackend *blk, uint32_t sector_len, int nb_blocs, --=20 2.17.2 From nobody Sun May 19 05:51:02 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1552039225520614.4968940710509; Fri, 8 Mar 2019 02:00:25 -0800 (PST) Received: from localhost ([127.0.0.1]:40120 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2CIi-0005PN-8U for importer@patchew.org; Fri, 08 Mar 2019 05:00:24 -0500 Received: from eggs.gnu.org ([209.51.188.92]:43400) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h2C5H-0002Qn-Hn for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h2C5F-0006QN-B6 for qemu-devel@nongnu.org; Fri, 08 Mar 2019 04:46:31 -0500 Received: from mx1.redhat.com ([209.132.183.28]:60018) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h2C57-0006AJ-58; Fri, 08 Mar 2019 04:46:21 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3585810C6C; Fri, 8 Mar 2019 09:46:20 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6F5225D9CD; Fri, 8 Mar 2019 09:46:19 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 23ECB11327AF; Fri, 8 Mar 2019 10:46:11 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 10:46:10 +0100 Message-Id: <20190308094610.21210-16-armbru@redhat.com> In-Reply-To: <20190308094610.21210-1-armbru@redhat.com> References: <20190308094610.21210-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Fri, 08 Mar 2019 09:46:20 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v4 15/15] pflash: Clean up after commit 368a354f02b, part 2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, philmd@redhat.com, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Our pflash devices are simplistically modelled has having "num-blocks" sectors of equal size "sector-length". Real hardware commonly has sectors of different sizes. How our "sector-length" property is related to the physical device's multiple sector sizes is unclear. Helper functions pflash_cfi01_register() and pflash_cfi02_register() create a pflash device, set properties including "sector-length" and "num-blocks", and realize. They take parameters @size, @sector_len and @nb_blocs. QOMification left parameter @size unused. Obviously, @size should match @sector_len and @nb_blocs, i.e. size =3D=3D sector_len * nb_blocs. All callers satisfy this. Remove @nb_blocs and compute it from @size and @sector_len. Signed-off-by: Markus Armbruster Reviewed-by: Laszlo Ersek Reviewed-by: Alex Benn=C3=A9e --- hw/arm/collie.c | 5 +++-- hw/arm/digic_boards.c | 1 - hw/arm/gumstix.c | 6 ++---- hw/arm/mainstone.c | 3 +-- hw/arm/musicpal.c | 4 ++-- hw/arm/omap_sx1.c | 6 ++---- hw/arm/versatilepb.c | 1 - hw/arm/xilinx_zynq.c | 5 ++--- hw/arm/z2.c | 3 +-- hw/block/pflash_cfi01.c | 5 +++-- hw/block/pflash_cfi02.c | 5 +++-- hw/i386/pc_sysfw.c | 6 +----- hw/lm32/lm32_boards.c | 4 ++-- hw/lm32/milkymist.c | 3 +-- hw/microblaze/petalogix_ml605_mmu.c | 3 +-- hw/microblaze/petalogix_s3adsp1800_mmu.c | 3 +-- hw/mips/mips_malta.c | 2 +- hw/mips/mips_r4k.c | 3 +-- hw/ppc/ppc405_boards.c | 6 +++--- hw/ppc/sam460ex.c | 3 +-- hw/ppc/virtex_ml507.c | 3 +-- hw/sh4/r2d.c | 3 +-- include/hw/block/flash.h | 4 ++-- 23 files changed, 35 insertions(+), 52 deletions(-) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index cbc4400f8e..7c9c0615f0 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -9,6 +9,7 @@ * GNU GPL, version 2 or (at your option) any later version. */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "hw/hw.h" #include "hw/sysbus.h" #include "hw/boards.h" @@ -38,12 +39,12 @@ static void collie_init(MachineState *machine) dinfo =3D drive_get(IF_PFLASH, 0, 0); pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0); =20 dinfo =3D drive_get(IF_PFLASH, 0, 1); pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0); =20 sysbus_create_simple("scoop", 0x40800000, NULL); =20 diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index 15a00a1be3..304e4d1a29 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -131,7 +131,6 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *= s, hwaddr addr, =20 pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE, NULL, FLASH_K8P3215UQB_SECTOR_SIZE, - FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_= SIZE, DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE, 4, 0x00EC, 0x007E, 0x0003, 0x0001, diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c index 304dbeab2f..79886ce378 100644 --- a/hw/arm/gumstix.c +++ b/hw/arm/gumstix.c @@ -74,8 +74,7 @@ static void connex_init(MachineState *machine) #endif if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, connex_rom / sector_len, - 2, 0, 0, 0, 0, be)) { + sector_len, 2, 0, 0, 0, 0, be)) { error_report("Error registering flash memory"); exit(1); } @@ -111,8 +110,7 @@ static void verdex_init(MachineState *machine) #endif if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, verdex_rom / sector_len, - 2, 0, 0, 0, 0, be)) { + sector_len, 2, 0, 0, 0, 0, be)) { error_report("Error registering flash memory"); exit(1); } diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index 2a1c1072db..e96738ad26 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -152,8 +152,7 @@ static void mainstone_common_init(MemoryRegion *address= _space_mem, i ? "mainstone.flash1" : "mainstone.fla= sh0", MAINSTONE_FLASH, blk_by_legacy_dinfo(dinfo), - sector_len, MAINSTONE_FLASH / sector_le= n, - 4, 0, 0, 0, 0, be)) { + sector_len, 4, 0, 0, 0, 0, be)) { error_report("Error registering flash memory"); exit(1); } diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index cc780dfb37..0f4f02df8e 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1638,14 +1638,14 @@ static void musicpal_init(MachineState *machine) #ifdef TARGET_WORDS_BIGENDIAN pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, "musicpal.flash", flash_size, - blk, 0x10000, (flash_size + 0xffff) >> 16, + blk, 0x10000, MP_FLASH_SIZE_MAX / flash_size, 2, 0x00BF, 0x236D, 0x0000, 0x0000, 0x5555, 0x2AAA, 1); #else pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, "musicpal.flash", flash_size, - blk, 0x10000, (flash_size + 0xffff) >> 16, + blk, 0x10000, MP_FLASH_SIZE_MAX / flash_size, 2, 0x00BF, 0x236D, 0x0000, 0x0000, 0x5555, 0x2AAA, 0); diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index b1128777cf..95a4fe7e7f 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -155,8 +155,7 @@ static void sx1_init(MachineState *machine, const int v= ersion) if (!pflash_cfi01_register(OMAP_CS0_BASE, "omap_sx1.flash0-1", flash_size, blk_by_legacy_dinfo(dinfo), - sector_size, flash_size / sector_size, - 4, 0, 0, 0, 0, be)) { + sector_size, 4, 0, 0, 0, 0, be)) { fprintf(stderr, "qemu: Error registering flash memory %d.\n", fl_idx); } @@ -179,8 +178,7 @@ static void sx1_init(MachineState *machine, const int v= ersion) if (!pflash_cfi01_register(OMAP_CS1_BASE, "omap_sx1.flash1-1", flash1_size, blk_by_legacy_dinfo(dinfo), - sector_size, flash1_size / sector_size, - 4, 0, 0, 0, 0, be)) { + sector_size, 4, 0, 0, 0, 0, be)) { fprintf(stderr, "qemu: Error registering flash memory %d.\n", fl_idx); } diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 82c5277462..d67181810a 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -369,7 +369,6 @@ static void versatile_init(MachineState *machine, int b= oard_id) VERSATILE_FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, VERSATILE_FLASH_SECT_SIZE, - VERSATILE_FLASH_SIZE / VERSATILE_FLASH_SECT_SIZE, 4, 0x0089, 0x0018, 0x0000, 0x0, 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); } diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 1fa4a77728..b3b8215759 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -207,10 +207,9 @@ static void zynq_init(MachineState *machine) /* AMD */ pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - FLASH_SECTOR_SIZE, - FLASH_SIZE/FLASH_SECTOR_SIZE, 1, + FLASH_SECTOR_SIZE, 1, 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, - 0); + 0); =20 dev =3D qdev_create(NULL, "xilinx,zynq_slcr"); qdev_init_nofail(dev); diff --git a/hw/arm/z2.c b/hw/arm/z2.c index f8081b2a10..1153dfe508 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -326,8 +326,7 @@ static void z2_init(MachineState *machine) =20 if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, Z2_FLASH_SIZE / sector_len, - 4, 0, 0, 0, 0, be)) { + sector_len, 4, 0, 0, 0, 0, be)) { error_report("Error registering flash memory"); exit(1); } diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index bd42487c0a..9d1c356eb6 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -940,7 +940,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, const char *name, hwaddr size, BlockBackend *blk, - uint32_t sector_len, int nb_blocs, + uint32_t sector_len, int bank_width, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, @@ -951,7 +951,8 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); } - qdev_prop_set_uint32(dev, "num-blocks", nb_blocs); + assert(size % sector_len =3D=3D 0); + qdev_prop_set_uint32(dev, "num-blocks", size / sector_len); qdev_prop_set_uint64(dev, "sector-length", sector_len); qdev_prop_set_uint8(dev, "width", bank_width); qdev_prop_set_bit(dev, "big-endian", !!be); diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 8f09d31fad..c9db430611 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -727,7 +727,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, const char *name, hwaddr size, BlockBackend *blk, - uint32_t sector_len, int nb_blocs, + uint32_t sector_len, int nb_mappings, int width, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, @@ -740,7 +740,8 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); } - qdev_prop_set_uint32(dev, "num-blocks", nb_blocs); + assert(size % sector_len =3D=3D 0); + qdev_prop_set_uint32(dev, "num-blocks", size / sector_len); qdev_prop_set_uint32(dev, "sector-length", sector_len); qdev_prop_set_uint8(dev, "width", width); qdev_prop_set_uint8(dev, "mappings", nb_mappings); diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 9a5be54a85..34727c5b1f 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -110,16 +110,13 @@ static void pc_system_flash_init(MemoryRegion *rom_me= mory) int64_t size; char *fatal_errmsg =3D NULL; hwaddr phys_addr =3D 0x100000000ULL; - int sector_bits, sector_size; + uint32_t sector_size =3D 4096; PFlashCFI01 *system_flash; MemoryRegion *flash_mem; char name[64]; void *flash_ptr; int ret, flash_size; =20 - sector_bits =3D 12; - sector_size =3D 1 << sector_bits; - for (unit =3D 0; (unit < FLASH_MAP_UNIT_MAX && (pflash_drv =3D drive_get(IF_PFLASH, 0, unit)) !=3D NULL); @@ -162,7 +159,6 @@ static void pc_system_flash_init(MemoryRegion *rom_memo= ry) snprintf(name, sizeof name, "system.flash%d", unit); system_flash =3D pflash_cfi01_register(phys_addr, name, size, blk, sector_size, - size >> sector_bits, 1 /* width */, 0x0000 /* id0 */, 0x0000 /* id1 */, diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index f726355309..09f411ed07 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -116,7 +116,7 @@ static void lm32_evr_init(MachineState *machine) /* Spansion S29NS128P */ pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - flash_sector_size, flash_size / flash_sector_siz= e, + flash_sector_size, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); =20 /* create irq lines */ @@ -209,7 +209,7 @@ static void lm32_uclinux_init(MachineState *machine) /* Spansion S29NS128P */ pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - flash_sector_size, flash_size / flash_sector_siz= e, + flash_sector_size, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); =20 /* create irq lines */ diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c index ece7e3b699..ee307d5feb 100644 --- a/hw/lm32/milkymist.c +++ b/hw/lm32/milkymist.c @@ -123,8 +123,7 @@ milkymist_init(MachineState *machine) /* Numonyx JS28F256J3F105 */ pflash_cfi01_register(flash_base, "milkymist.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - flash_sector_size, flash_size / flash_sector_siz= e, - 2, 0x00, 0x89, 0x00, 0x1d, 1); + flash_sector_size, 2, 0x00, 0x89, 0x00, 0x1d, 1); =20 /* create irq lines */ env->pic_state =3D lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, cp= u, 0)); diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_= ml605_mmu.c index 74bcc14cda..51afefebef 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -109,8 +109,7 @@ petalogix_ml605_init(MachineState *machine) * 10th paremeter 0 means little-endian */ pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_S= IZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, FLASH_SIZE >> 16, - 2, 0x89, 0x18, 0x0000, 0x0, 0); + 64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 0); =20 =20 dev =3D qdev_create(NULL, "xlnx.xps-intc"); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petal= ogix_s3adsp1800_mmu.c index a07b7f8edf..bd5e93558c 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -90,8 +90,7 @@ petalogix_s3adsp1800_init(MachineState *machine) pflash_cfi01_register(FLASH_BASEADDR, "petalogix_s3adsp1800.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, FLASH_SIZE >> 16, - 1, 0x89, 0x18, 0x0000, 0x0, 1); + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); =20 dev =3D qdev_create(NULL, "xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 69182962ef..439665ab45 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1264,7 +1264,7 @@ void mips_malta_init(MachineState *machine) fl =3D pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 65536, FLASH_SIZE >> 16, + 65536, 4, 0x0000, 0x0000, 0x0000, 0x0000, be); bios =3D pflash_cfi01_get_memory(fl); fl_idx++; diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index 0b9df466e7..93dbf76bb4 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -237,8 +237,7 @@ void mips_r4k_init(MachineState *machine) uint32_t mips_rom =3D 0x00400000; if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom, blk_by_legacy_dinfo(dinfo), - sector_len, mips_rom / sector_len, - 4, 0, 0, 0, 0, be)) { + sector_len, 4, 0, 0, 0, 0, be)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); } } else if (!qtest_enabled()) { diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 43be8b68d9..13318a9faf 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -184,7 +184,7 @@ static void ref405ep_init(MachineState *machine) pflash_cfi02_register((uint32_t)(-bios_size), "ef405ep.bios", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, bios_size / (64 * KiB), 1, + 64 * KiB, 1, 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); } else @@ -450,7 +450,7 @@ static void taihu_405ep_init(MachineState *machine) pflash_cfi02_register(0xFFE00000, "taihu_405ep.bios", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, bios_size / (64 * KiB), 1, + 64 * KiB, 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; @@ -486,7 +486,7 @@ static void taihu_405ep_init(MachineState *machine) bios_size =3D 32 * MiB; pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, bios_size / (64 * KiB), 1, + 64 * KiB, 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 9af6018c7d..fbcddc5b00 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -115,8 +115,7 @@ static int sam460ex_load_uboot(void) if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32), "sam460ex.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, FLASH_SIZE / (64 * KiB), - 1, 0x89, 0x18, 0x0000, 0x0, 1)) { + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1)) { error_report("Error registering flash memory"); /* XXX: return an error instead? */ exit(1); diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index d2085a839c..848a5bf05a 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -229,8 +229,7 @@ static void virtex_init(MachineState *machine) dinfo =3D drive_get(IF_PFLASH, 0, 0); pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, FLASH_SIZE >> 16, - 1, 0x89, 0x18, 0x0000, 0x0, 1); + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); =20 cpu_irq =3D (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT]; dev =3D qdev_create(NULL, "xlnx.xps-intc"); diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index c6514bb817..a6253afbb6 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -300,8 +300,7 @@ static void r2d_init(MachineState *machine) dinfo =3D drive_get(IF_PFLASH, 0, 0); pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, FLASH_SIZE >> 16, - 1, 2, 0x0001, 0x227e, 0x2220, 0x2200, + 64 * KiB, 1, 2, 0x0001, 0x227e, 0x2220, 0x2200, 0x555, 0x2aa, 0); =20 /* NIC: rtl8139 on-board, and 2 slots. */ diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 3e48901c84..914932eaec 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -17,7 +17,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, const char *name, hwaddr size, BlockBackend *blk, - uint32_t sector_len, int nb_blocs, + uint32_t sector_len, int width, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, @@ -36,7 +36,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, const char *name, hwaddr size, BlockBackend *blk, - uint32_t sector_len, int nb_blocs, + uint32_t sector_len, int nb_mappings, int width, uint16_t id0, uint16_t id1, --=20 2.17.2