From nobody Sun Nov 9 22:32:41 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551998696586373.94316433326003; Thu, 7 Mar 2019 14:44:56 -0800 (PST) Received: from localhost ([127.0.0.1]:60630 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h21l1-0005lu-3i for importer@patchew.org; Thu, 07 Mar 2019 17:44:55 -0500 Received: from eggs.gnu.org ([209.51.188.92]:34197) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h21dD-0007SS-HZ for qemu-devel@nongnu.org; Thu, 07 Mar 2019 17:36:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h21d4-00035W-Tz for qemu-devel@nongnu.org; Thu, 07 Mar 2019 17:36:44 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:35328) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h21cy-000243-6d for qemu-devel@nongnu.org; Thu, 07 Mar 2019 17:36:38 -0500 Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x27MMaOB042909 for ; Thu, 7 Mar 2019 17:36:05 -0500 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0a-001b2d01.pphosted.com with ESMTP id 2r3a1ynth6-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 07 Mar 2019 17:36:04 -0500 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 7 Mar 2019 22:36:00 -0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x27MZxcW46334000 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 7 Mar 2019 22:35:59 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5EFE3AE36D; Thu, 7 Mar 2019 22:35:59 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 44E98AE370; Thu, 7 Mar 2019 22:35:59 +0000 (GMT) Received: from smtp.lab.toulouse-stg.fr.ibm.com (unknown [9.101.4.1]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 7 Mar 2019 22:35:59 +0000 (GMT) Received: from zorba.kaod.org.com (sig-9-145-48-25.uk.ibm.com [9.145.48.25]) by smtp.lab.toulouse-stg.fr.ibm.com (Postfix) with ESMTP id B3A5D220062; Thu, 7 Mar 2019 23:35:58 +0100 (CET) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Thu, 7 Mar 2019 23:35:43 +0100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190307223548.20516-1-clg@kaod.org> References: <20190307223548.20516-1-clg@kaod.org> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19030722-0016-0000-0000-0000025F4198 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19030722-0017-0000-0000-000032B9D1B2 Message-Id: <20190307223548.20516-11-clg@kaod.org> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-07_13:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903070147 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0a-001b2d01.pphosted.com id x27MMaOB042909 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH v2 10/15] ppc/pnv: extend XSCOM core support for POWER9 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Provide a new class attribute to define XSCOM operations per CPU family and add a couple of XSCOM addresses controlling the power management states of the core on POWER9. Signed-off-by: C=C3=A9dric Le Goater --- Changes in v2 : - new class attribute to define XSCOM operations per CPU family include/hw/ppc/pnv_core.h | 2 + hw/ppc/pnv_core.c | 100 +++++++++++++++++++++++++++++++++----- 2 files changed, 89 insertions(+), 13 deletions(-) diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index 6874bb847a01..cbe9ad36f32c 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -42,6 +42,8 @@ typedef struct PnvCore { =20 typedef struct PnvCoreClass { DeviceClass parent_class; + + const MemoryRegionOps *xscom_ops; } PnvCoreClass; =20 #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 38179cdc53dc..171474e0805c 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -60,8 +60,8 @@ static void pnv_cpu_reset(void *opaque) #define PNV_XSCOM_EX_DTS_RESULT0 0x50000 #define PNV_XSCOM_EX_DTS_RESULT1 0x50001 =20 -static uint64_t pnv_core_xscom_read(void *opaque, hwaddr addr, - unsigned int width) +static uint64_t pnv_core_power8_xscom_read(void *opaque, hwaddr addr, + unsigned int width) { uint32_t offset =3D addr >> 3; uint64_t val =3D 0; @@ -82,16 +82,74 @@ static uint64_t pnv_core_xscom_read(void *opaque, hwadd= r addr, return val; } =20 -static void pnv_core_xscom_write(void *opaque, hwaddr addr, uint64_t val, - unsigned int width) +static void pnv_core_power8_xscom_write(void *opaque, hwaddr addr, uint64_= t val, + unsigned int width) { qemu_log_mask(LOG_UNIMP, "Warning: writing to reg=3D0x%" HWADDR_PRIx "= \n", addr); } =20 -static const MemoryRegionOps pnv_core_xscom_ops =3D { - .read =3D pnv_core_xscom_read, - .write =3D pnv_core_xscom_write, +static const MemoryRegionOps pnv_core_power8_xscom_ops =3D { + .read =3D pnv_core_power8_xscom_read, + .write =3D pnv_core_power8_xscom_write, + .valid.min_access_size =3D 8, + .valid.max_access_size =3D 8, + .impl.min_access_size =3D 8, + .impl.max_access_size =3D 8, + .endianness =3D DEVICE_BIG_ENDIAN, +}; + + +/* + * POWER9 core controls + */ +#define PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_HYP 0xf010d +#define PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_OTR 0xf010a + +static uint64_t pnv_core_power9_xscom_read(void *opaque, hwaddr addr, + unsigned int width) +{ + uint32_t offset =3D addr >> 3; + uint64_t val =3D 0; + + /* The result should be 38 C */ + switch (offset) { + case PNV_XSCOM_EX_DTS_RESULT0: + val =3D 0x26f024f023f0000ull; + break; + case PNV_XSCOM_EX_DTS_RESULT1: + val =3D 0x24f000000000000ull; + break; + case PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_HYP: + case PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_OTR: + val =3D 0x0; + break; + default: + qemu_log_mask(LOG_UNIMP, "Warning: reading reg=3D0x%" HWADDR_PRIx = "\n", + addr); + } + + return val; +} + +static void pnv_core_power9_xscom_write(void *opaque, hwaddr addr, uint64_= t val, + unsigned int width) +{ + uint32_t offset =3D addr >> 3; + + switch (offset) { + case PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_HYP: + case PNV9_XSCOM_EC_PPM_SPECIAL_WKUP_OTR: + break; + default: + qemu_log_mask(LOG_UNIMP, "Warning: writing to reg=3D0x%" HWADDR_PR= Ix "\n", + addr); + } +} + +static const MemoryRegionOps pnv_core_power9_xscom_ops =3D { + .read =3D pnv_core_power9_xscom_read, + .write =3D pnv_core_power9_xscom_write, .valid.min_access_size =3D 8, .valid.max_access_size =3D 8, .impl.min_access_size =3D 8, @@ -138,6 +196,7 @@ static void pnv_realize_vcpu(PowerPCCPU *cpu, PnvChip *= chip, Error **errp) static void pnv_core_realize(DeviceState *dev, Error **errp) { PnvCore *pc =3D PNV_CORE(OBJECT(dev)); + PnvCoreClass *pcc =3D PNV_CORE_GET_CLASS(pc); CPUCore *cc =3D CPU_CORE(OBJECT(dev)); const char *typename =3D pnv_core_cpu_typename(pc); Error *local_err =3D NULL; @@ -180,7 +239,7 @@ static void pnv_core_realize(DeviceState *dev, Error **= errp) } =20 snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id); - pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), &pnv_core_xscom_op= s, + pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), pcc->xscom_ops, pc, name, PNV_XSCOM_EX_SIZE); return; =20 @@ -222,6 +281,20 @@ static Property pnv_core_properties[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 +static void pnv_core_power8_class_init(ObjectClass *oc, void *data) +{ + PnvCoreClass *pcc =3D PNV_CORE_CLASS(oc); + + pcc->xscom_ops =3D &pnv_core_power8_xscom_ops; +} + +static void pnv_core_power9_class_init(ObjectClass *oc, void *data) +{ + PnvCoreClass *pcc =3D PNV_CORE_CLASS(oc); + + pcc->xscom_ops =3D &pnv_core_power9_xscom_ops; +} + static void pnv_core_class_init(ObjectClass *oc, void *data) { DeviceClass *dc =3D DEVICE_CLASS(oc); @@ -231,10 +304,11 @@ static void pnv_core_class_init(ObjectClass *oc, void= *data) dc->props =3D pnv_core_properties; } =20 -#define DEFINE_PNV_CORE_TYPE(cpu_model) \ +#define DEFINE_PNV_CORE_TYPE(family, cpu_model) \ { \ .parent =3D TYPE_PNV_CORE, \ .name =3D PNV_CORE_TYPE_NAME(cpu_model), \ + .class_init =3D pnv_core_##family##_class_init, \ } =20 static const TypeInfo pnv_core_infos[] =3D { @@ -246,10 +320,10 @@ static const TypeInfo pnv_core_infos[] =3D { .class_init =3D pnv_core_class_init, .abstract =3D true, }, - DEFINE_PNV_CORE_TYPE("power8e_v2.1"), - DEFINE_PNV_CORE_TYPE("power8_v2.0"), - DEFINE_PNV_CORE_TYPE("power8nvl_v1.0"), - DEFINE_PNV_CORE_TYPE("power9_v2.0"), + DEFINE_PNV_CORE_TYPE(power8, "power8e_v2.1"), + DEFINE_PNV_CORE_TYPE(power8, "power8_v2.0"), + DEFINE_PNV_CORE_TYPE(power8, "power8nvl_v1.0"), + DEFINE_PNV_CORE_TYPE(power9, "power9_v2.0"), }; =20 DEFINE_TYPES(pnv_core_infos) --=20 2.20.1