From nobody Sun Nov 9 22:25:16 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551962834772604.1911440447276; Thu, 7 Mar 2019 04:47:14 -0800 (PST) Received: from localhost ([127.0.0.1]:50639 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h1sQS-0004eF-NZ for importer@patchew.org; Thu, 07 Mar 2019 07:47:04 -0500 Received: from eggs.gnu.org ([209.51.188.92]:42642) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h1rz3-0006I6-2Q for qemu-devel@nongnu.org; Thu, 07 Mar 2019 07:18:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h1rz2-0001OO-4s for qemu-devel@nongnu.org; Thu, 07 Mar 2019 07:18:45 -0500 Received: from mx1.redhat.com ([209.132.183.28]:55270) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h1rz1-0001Nm-US for qemu-devel@nongnu.org; Thu, 07 Mar 2019 07:18:44 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3768A305B16F; Thu, 7 Mar 2019 12:18:43 +0000 (UTC) Received: from dhcp-17-75.lcy.redhat.com (unknown [10.42.17.75]) by smtp.corp.redhat.com (Postfix) with ESMTP id 413E6608C3; Thu, 7 Mar 2019 12:18:42 +0000 (UTC) From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= To: qemu-devel@nongnu.org Date: Thu, 7 Mar 2019 12:18:38 +0000 Message-Id: <20190307121838.6345-3-berrange@redhat.com> In-Reply-To: <20190307121838.6345-1-berrange@redhat.com> References: <20190307121838.6345-1-berrange@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Thu, 07 Mar 2019 12:18:43 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 2/2] docs: add note about stibp CPU feature for spectre v2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eduardo Habkost , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" While the stibp CPU feature is not commonly used by guest OS for spectre mitigation due to its performance impact, it is none the less best practice to expose it to all guest OS. This allows the guest OS to decide whether to make use or it. Signed-off-by: Daniel P. Berrang=C3=A9 --- docs/qemu-cpu-models.texi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/docs/qemu-cpu-models.texi b/docs/qemu-cpu-models.texi index 0ce528806d..23c11dc86f 100644 --- a/docs/qemu-cpu-models.texi +++ b/docs/qemu-cpu-models.texi @@ -168,6 +168,17 @@ Requires the host CPU microcode to support this featur= e before it can be used for guest CPUs. =20 =20 +@item @code{stibp} + +Required to enable stronger Spectre v2 (CVE-2017-5715) fixes in some +operating systems. + +Must be explicitly turned on for all Intel CPU models. + +Requires the host CPU microcode to support this feature before it +can be used for guest CPUs. + + @item @code{ssbd} =20 Required to enable the CVE-2018-3639 fix @@ -258,6 +269,17 @@ Requires the host CPU microcode to support this featur= e before it can be used for guest CPUs. =20 =20 +@item @code{stibp} + +Required to enable stronger Spectre v2 (CVE-2017-5715) fixes in some +operating systems. + +Must be explicitly turned on for all AMD CPU models. + +Requires the host CPU microcode to support this feature before it +can be used for guest CPUs. + + @item @code{virt-ssbd} =20 Required to enable the CVE-2018-3639 fix --=20 2.20.1