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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id 2sm10071495wrg.89.2019.03.05.08.51.13 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Mar 2019 08:51:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=BXvcIOjMOV2lLoMS08bHfexYpAtDhIbDmyRWy8KxZ/8=; b=FP58uoQLPciBTcuMxfjrEDxKHyntgHr8Pq3jS7VlX2iRS+WV4spPUMioQE0mv/35fy CICK2FBvJ2Ac9or+LE53S7e8CcNHUeau9LFboj5hnx0ABFH8TPxqgqqeSOKpWovdgFOV YxytE8JhFuCiXfasZ+MAjqT8V8h2qH2OqfsxT/VdDLPsTQ14T7u4hS0Ric4inxS9UV7K 3gssmZhjB5n+wcJDyq5d9p9GV2GJ01DtV90wzOyDhE1R72rFIgBj+9os6yFcHkU2D3RR JLxbDDa5o3LBcW8wDWqG5tIGEKKMmK2hBho8VtkBbn0ZhqkZx+8vaUwMgSnqIhnAkRaL /GJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BXvcIOjMOV2lLoMS08bHfexYpAtDhIbDmyRWy8KxZ/8=; b=Dx0278fLF40rots3NehnfUacEqjWVfl07344pHDGZ/axDkxs80KHjc0lN3pKsSANRe uPfnas59ILpuG8ktn9Yk5lfc55mIP+F77gNS0+xAsE4QSKmRnoblSiO0QEBrn+cCXUja oi7X/WvA2A4x+1jVAgQHvQ8HNM6iYhlyXkCPy+vlSN9bFdpSLpc7ejBa4VlP6pVeOV7h iLnUKnWe100ha8FvE4T60usU3VAPllAktzQvpsdiD8Z8daBX0VJyyU5svOR8+PHJaoyR +uBkMoy4bVgdxhDsc3cRjFveDGKYCyGduyQ3Fw5mHhN5F+o6SQvvi7FtyIMYm6g8duEt TclQ== X-Gm-Message-State: APjAAAUwas+UeIlHiwecoPNzVL+7xIBgk+/oE4JjI0Gjxj34Fav6+IN9 zt8GvSAAi5Zt87OLCDYz7mYrPiEz+EM= X-Google-Smtp-Source: APXvYqzkYis8j4O2UlhpKeSHfAn+Ld7+PCCb9jk47BNbb/Rx+NEFjtPPaDpnhHjKZ0p38SeIRHmtYA== X-Received: by 2002:adf:e982:: with SMTP id h2mr18055824wrm.241.1551804674469; Tue, 05 Mar 2019 08:51:14 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 5 Mar 2019 16:50:47 +0000 Message-Id: <20190305165051.26860-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190305165051.26860-1-peter.maydell@linaro.org> References: <20190305165051.26860-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::436 Subject: [Qemu-devel] [PULL 18/22] hw/arm/virt: Dynamic memory map depending on RAM requirements X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Eric Auger Up to now the memory map has been static and the high IO region base has always been 256GiB. This patch modifies the virt_set_memmap() function, which freezes the memory map, so that the high IO range base becomes floating, located after the initial RAM and the device memory. The function computes - the base of the device memory, - the size of the device memory, - the high IO region base - the highest GPA used in the memory map. Entries of the high IO region are assigned a base address. The device memory is initialized. The highest GPA used in the memory map will be used at VM creation to choose the requested IPA size. Setting all the existing highmem IO regions beyond the RAM allows to have a single contiguous RAM region (initial RAM and possible hotpluggable device memory). That way we do not need to do invasive changes in the EDK2 FW to support a dynamic RAM base. Still the user cannot request an initial RAM size greater than 255GB. Signed-off-by: Eric Auger Reviewed-by: Igor Mammedov Message-id: 20190304101339.25970-8-eric.auger@redhat.com Signed-off-by: Peter Maydell --- include/hw/arm/virt.h | 1 + hw/arm/virt.c | 52 ++++++++++++++++++++++++++++++++++++++----- 2 files changed, 47 insertions(+), 6 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index f3f7fae4acd..507517c603b 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -131,6 +131,7 @@ typedef struct { uint32_t msi_phandle; uint32_t iommu_phandle; int psci_conduit; + hwaddr highest_gpa; } VirtMachineState; =20 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 9596c7c7f13..2e788a0361e 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -59,6 +59,7 @@ #include "qapi/visitor.h" #include "standard-headers/linux/input.h" #include "hw/arm/smmuv3.h" +#include "hw/acpi/acpi.h" =20 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \ static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ @@ -107,8 +108,8 @@ * of a terabyte of RAM will be doing it on a host with more than a * terabyte of physical address space.) */ -#define RAMLIMIT_GB 255 -#define RAMLIMIT_BYTES (RAMLIMIT_GB * 1024ULL * 1024 * 1024) +#define LEGACY_RAMLIMIT_GB 255 +#define LEGACY_RAMLIMIT_BYTES (LEGACY_RAMLIMIT_GB * GiB) =20 /* Addresses and sizes of our components. * 0..128MB is space for a flash device so we can run bootrom code such as= UEFI. @@ -149,7 +150,8 @@ static const MemMapEntry base_memmap[] =3D { [VIRT_PCIE_MMIO] =3D { 0x10000000, 0x2eff0000 }, [VIRT_PCIE_PIO] =3D { 0x3eff0000, 0x00010000 }, [VIRT_PCIE_ECAM] =3D { 0x3f000000, 0x01000000 }, - [VIRT_MEM] =3D { 0x40000000, RAMLIMIT_BYTES }, + /* Actual RAM size depends on initial RAM and device memory settings */ + [VIRT_MEM] =3D { GiB, LEGACY_RAMLIMIT_BYTES }, }; =20 /* @@ -1370,7 +1372,8 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState= *vms, int idx) =20 static void virt_set_memmap(VirtMachineState *vms) { - hwaddr base; + MachineState *ms =3D MACHINE(vms); + hwaddr base, device_memory_base, device_memory_size; int i; =20 vms->memmap =3D extended_memmap; @@ -1379,7 +1382,32 @@ static void virt_set_memmap(VirtMachineState *vms) vms->memmap[i] =3D base_memmap[i]; } =20 - base =3D 256 * GiB; /* Top of the legacy initial RAM region */ + if (ms->ram_slots > ACPI_MAX_RAM_SLOTS) { + error_report("unsupported number of memory slots: %"PRIu64, + ms->ram_slots); + exit(EXIT_FAILURE); + } + + /* + * We compute the base of the high IO region depending on the + * amount of initial and device memory. The device memory start/size + * is aligned on 1GiB. We never put the high IO region below 256GiB + * so that if maxram_size is < 255GiB we keep the legacy memory map. + * The device region size assumes 1GiB page max alignment per slot. + */ + device_memory_base =3D + ROUND_UP(vms->memmap[VIRT_MEM].base + ms->ram_size, GiB); + device_memory_size =3D ms->maxram_size - ms->ram_size + ms->ram_slots = * GiB; + + /* Base address of the high IO region */ + base =3D device_memory_base + ROUND_UP(device_memory_size, GiB); + if (base < device_memory_base) { + error_report("maxmem/slots too huge"); + exit(EXIT_FAILURE); + } + if (base < vms->memmap[VIRT_MEM].base + LEGACY_RAMLIMIT_BYTES) { + base =3D vms->memmap[VIRT_MEM].base + LEGACY_RAMLIMIT_BYTES; + } =20 for (i =3D VIRT_LOWMEMMAP_LAST; i < ARRAY_SIZE(extended_memmap); i++) { hwaddr size =3D extended_memmap[i].size; @@ -1389,6 +1417,13 @@ static void virt_set_memmap(VirtMachineState *vms) vms->memmap[i].size =3D size; base +=3D size; } + vms->highest_gpa =3D base - 1; + if (device_memory_size > 0) { + ms->device_memory =3D g_malloc0(sizeof(*ms->device_memory)); + ms->device_memory->base =3D device_memory_base; + memory_region_init(&ms->device_memory->mr, OBJECT(vms), + "device-memory", device_memory_size); + } } =20 static void machvirt_init(MachineState *machine) @@ -1475,7 +1510,8 @@ static void machvirt_init(MachineState *machine) vms->smp_cpus =3D smp_cpus; =20 if (machine->ram_size > vms->memmap[VIRT_MEM].size) { - error_report("mach-virt: cannot model more than %dGB RAM", RAMLIMI= T_GB); + error_report("mach-virt: cannot model more than %dGB RAM", + LEGACY_RAMLIMIT_GB); exit(1); } =20 @@ -1569,6 +1605,10 @@ static void machvirt_init(MachineState *machine) memory_region_allocate_system_memory(ram, NULL, "mach-virt.ram", machine->ram_size); memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base, ram); + if (machine->device_memory) { + memory_region_add_subregion(sysmem, machine->device_memory->base, + &machine->device_memory->mr); + } =20 create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem); =20 --=20 2.20.1