From nobody Sun Nov 9 19:12:54 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155170110741750.24832096385251; Mon, 4 Mar 2019 04:05:07 -0800 (PST) Received: from localhost ([127.0.0.1]:52696 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h0mL8-0001Q1-3K for importer@patchew.org; Mon, 04 Mar 2019 07:05:02 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46171) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h0mIk-0008OV-GM for qemu-devel@nongnu.org; Mon, 04 Mar 2019 07:02:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h0mIe-0008Dp-Dp for qemu-devel@nongnu.org; Mon, 04 Mar 2019 07:02:34 -0500 Received: from mx1.redhat.com ([209.132.183.28]:59024) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h0mIc-0008AT-Ca; Mon, 04 Mar 2019 07:02:28 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A14BB30842CD; Mon, 4 Mar 2019 12:02:25 +0000 (UTC) Received: from localhost (ovpn-116-85.ams2.redhat.com [10.36.116.85]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 2652D5D71E; Mon, 4 Mar 2019 12:02:22 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Mon, 4 Mar 2019 13:01:46 +0100 Message-Id: <20190304120210.31500-4-cohuck@redhat.com> In-Reply-To: <20190304120210.31500-1-cohuck@redhat.com> References: <20190304120210.31500-1-cohuck@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Mon, 04 Mar 2019 12:02:25 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 03/27] s390x/tcg: Save vregs to extended mchk save area X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Hildenbrand If we have vector registers and the designation is not zero, we have to try to write the vector registers. If the designation is zero or if storing fails, we must not indicate validity. s390_build_validity_mcic() automatically already sets validity if the vector instruction facility is installed. As long as we don't support the guarded-storage facility, the alignment and size of the area is always 1024 bytes. Signed-off-by: David Hildenbrand Message-Id: <20190222081153.14206-4-david@redhat.com> Reviewed-by: Thomas Huth Signed-off-by: Cornelia Huck --- target/s390x/excp_helper.c | 46 ++++++++++++++++++++++++++++++++++++-- target/s390x/internal.h | 4 +++- 2 files changed, 47 insertions(+), 3 deletions(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index a758649f47fe..f84bfb1284b4 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -347,10 +347,41 @@ static void do_io_interrupt(CPUS390XState *env) load_psw(env, mask, addr); } =20 +typedef struct MchkExtSaveArea { + uint64_t vregs[32][2]; /* 0x0000 */ + uint8_t pad_0x0200[0x0400 - 0x0200]; /* 0x0200 */ +} MchkExtSaveArea; +QEMU_BUILD_BUG_ON(sizeof(MchkExtSaveArea) !=3D 1024); + +static int mchk_store_vregs(CPUS390XState *env, uint64_t mcesao) +{ + hwaddr len =3D sizeof(MchkExtSaveArea); + MchkExtSaveArea *sa; + int i; + + sa =3D cpu_physical_memory_map(mcesao, &len, 1); + if (!sa) { + return -EFAULT; + } + if (len !=3D sizeof(MchkExtSaveArea)) { + cpu_physical_memory_unmap(sa, len, 1, 0); + return -EFAULT; + } + + for (i =3D 0; i < 32; i++) { + sa->vregs[i][0] =3D cpu_to_be64(env->vregs[i][0].ll); + sa->vregs[i][1] =3D cpu_to_be64(env->vregs[i][1].ll); + } + + cpu_physical_memory_unmap(sa, len, 1, len); + return 0; +} + static void do_mchk_interrupt(CPUS390XState *env) { QEMUS390FLICState *flic =3D QEMU_S390_FLIC(s390_get_flic()); - uint64_t mask, addr; + uint64_t mcic =3D s390_build_validity_mcic() | MCIC_SC_CP; + uint64_t mask, addr, mcesao =3D 0; LowCore *lowcore; int i; =20 @@ -362,6 +393,17 @@ static void do_mchk_interrupt(CPUS390XState *env) =20 lowcore =3D cpu_map_lowcore(env); =20 + /* extended save area */ + if (mcic & MCIC_VB_VR) { + /* length and alignment is 1024 bytes */ + mcesao =3D be64_to_cpu(lowcore->mcesad) & ~0x3ffull; + } + + /* try to store vector registers */ + if (!mcesao || mchk_store_vregs(env, mcesao)) { + mcic &=3D ~MCIC_VB_VR; + } + /* we are always in z/Architecture mode */ lowcore->ar_access_id =3D 1; =20 @@ -377,7 +419,7 @@ static void do_mchk_interrupt(CPUS390XState *env) lowcore->cpu_timer_save_area =3D cpu_to_be64(env->cputm); lowcore->clock_comp_save_area =3D cpu_to_be64(env->ckc >> 8); =20 - lowcore->mcic =3D cpu_to_be64(s390_build_validity_mcic() | MCIC_SC_CP); + lowcore->mcic =3D cpu_to_be64(mcic); lowcore->mcck_old_psw.mask =3D cpu_to_be64(get_psw_mask(env)); lowcore->mcck_old_psw.addr =3D cpu_to_be64(env->psw.addr); mask =3D be64_to_cpu(lowcore->mcck_new_psw.mask); diff --git a/target/s390x/internal.h b/target/s390x/internal.h index f2a771e2b444..b2966a3adcb8 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -101,7 +101,9 @@ typedef struct LowCore { /* whether the kernel died with panic() or not */ uint32_t panic_magic; /* 0xe00 */ =20 - uint8_t pad13[0x11b8 - 0xe04]; /* 0xe04 */ + uint8_t pad13[0x11b0 - 0xe04]; /* 0xe04 */ + + uint64_t mcesad; /* 0x11B0 */ =20 /* 64 bit extparam used for pfault, diag 250 etc */ uint64_t ext_params2; /* 0x11B8 */ --=20 2.17.2