From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551448275296136.4650182100852; Fri, 1 Mar 2019 05:51:15 -0800 (PST) Received: from localhost ([127.0.0.1]:38153 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziZE-0005FZ-8o for importer@patchew.org; Fri, 01 Mar 2019 08:51:12 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59650) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziVo-0002n7-RB for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziVm-0002dG-Bl for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:40 -0500 Received: from mx1.redhat.com ([209.132.183.28]:49450) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziVb-0002Tp-2l; Fri, 01 Mar 2019 08:47:27 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 49AA54CEAB; Fri, 1 Mar 2019 13:47:23 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id 85D915D704; Fri, 1 Mar 2019 13:47:20 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:00 +0100 Message-Id: <20190301134709.4695-2-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 01 Mar 2019 13:47:23 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 01/10] hw/arm/boot: introduce fdt_add_memory_node helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Shameer Kolothum We introduce an helper to create a memory node. Signed-off-by: Eric Auger Signed-off-by: Shameer Kolothum Reviewed-by: Igor Mammedov Reviewed-by: Richard Henderson --- v7 -> v8: - Added Igor's R-b v6 -> v7: - msg error in the caller - add comment about NUMA ID --- hw/arm/boot.c | 54 ++++++++++++++++++++++++++++++++------------------- 1 file changed, 34 insertions(+), 20 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index d90af2f17d..a830655e1a 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -423,6 +423,32 @@ static void set_kernel_args_old(const struct arm_boot_= info *info, } } =20 +static int fdt_add_memory_node(void *fdt, uint32_t acells, hwaddr mem_base, + uint32_t scells, hwaddr mem_len, + int numa_node_id) +{ + char *nodename; + int ret; + + nodename =3D g_strdup_printf("/memory@%" PRIx64, mem_base); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory"); + ret =3D qemu_fdt_setprop_sized_cells(fdt, nodename, "reg", acells, mem= _base, + scells, mem_len); + if (ret < 0) { + goto out; + } + + /* only set the NUMA ID if it is specified */ + if (numa_node_id >=3D 0) { + ret =3D qemu_fdt_setprop_cell(fdt, nodename, + "numa-node-id", numa_node_id); + } +out: + g_free(nodename); + return ret; +} + static void fdt_add_psci_node(void *fdt) { uint32_t cpu_suspend_fn; @@ -502,7 +528,6 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_inf= o *binfo, void *fdt =3D NULL; int size, rc, n =3D 0; uint32_t acells, scells; - char *nodename; unsigned int i; hwaddr mem_base, mem_len; char **node_path; @@ -576,35 +601,24 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_i= nfo *binfo, mem_base =3D binfo->loader_start; for (i =3D 0; i < nb_numa_nodes; i++) { mem_len =3D numa_info[i].node_mem; - nodename =3D g_strdup_printf("/memory@%" PRIx64, mem_base); - qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory"= ); - rc =3D qemu_fdt_setprop_sized_cells(fdt, nodename, "reg", - acells, mem_base, - scells, mem_len); + rc =3D fdt_add_memory_node(fdt, acells, mem_base, + scells, mem_len, i); if (rc < 0) { - fprintf(stderr, "couldn't set %s/reg for node %d\n", noden= ame, - i); + fprintf(stderr, "couldn't add /memory@%"PRIx64" node\n", + mem_base); goto fail; } =20 - qemu_fdt_setprop_cell(fdt, nodename, "numa-node-id", i); mem_base +=3D mem_len; - g_free(nodename); } } else { - nodename =3D g_strdup_printf("/memory@%" PRIx64, binfo->loader_sta= rt); - qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory"); - - rc =3D qemu_fdt_setprop_sized_cells(fdt, nodename, "reg", - acells, binfo->loader_start, - scells, binfo->ram_size); + rc =3D fdt_add_memory_node(fdt, acells, binfo->loader_start, + scells, binfo->ram_size, -1); if (rc < 0) { - fprintf(stderr, "couldn't set %s reg\n", nodename); + fprintf(stderr, "couldn't add /memory@%"PRIx64" node\n", + binfo->loader_start); goto fail; } - g_free(nodename); } =20 rc =3D fdt_path_offset(fdt, "/chosen"); --=20 2.20.1 From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551448230430415.3817718169653; Fri, 1 Mar 2019 05:50:30 -0800 (PST) Received: from localhost ([127.0.0.1]:38116 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziYX-0004ZO-7H for importer@patchew.org; Fri, 01 Mar 2019 08:50:29 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59705) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziVr-0002pK-6L for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziVo-0002fC-Q1 for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:42 -0500 Received: from mx1.redhat.com ([209.132.183.28]:43660) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziVf-0002Wv-8z; Fri, 01 Mar 2019 08:47:31 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 76EB43087E96; Fri, 1 Mar 2019 13:47:27 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9E4F45D707; Fri, 1 Mar 2019 13:47:23 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:01 +0100 Message-Id: <20190301134709.4695-3-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Fri, 01 Mar 2019 13:47:27 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 02/10] hw/arm/virt: Rename highmem IO regions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In preparation for a split of the memory map into a static part and a dynamic part floating after the RAM, let's rename the regions located after the RAM Signed-off-by: Eric Auger Reviewed-by: Peter Maydell Reviewed-by: Igor Mammedov --- v8: - added Igor's R-b and fixed "line over 80 characters" warnings - nit: potential indent issue reported by Igor looks a false positive to me v7: added Peter's R-b v6: creation --- hw/arm/virt-acpi-build.c | 10 ++++++---- hw/arm/virt.c | 33 ++++++++++++++++++--------------- include/hw/arm/virt.h | 8 ++++---- 3 files changed, 28 insertions(+), 23 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 04b62c714d..d7e2e4885b 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -229,8 +229,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapE= ntry *memmap, size_pio)); =20 if (use_highmem) { - hwaddr base_mmio_high =3D memmap[VIRT_PCIE_MMIO_HIGH].base; - hwaddr size_mmio_high =3D memmap[VIRT_PCIE_MMIO_HIGH].size; + hwaddr base_mmio_high =3D memmap[VIRT_HIGH_PCIE_MMIO].base; + hwaddr size_mmio_high =3D memmap[VIRT_HIGH_PCIE_MMIO].size; =20 aml_append(rbuf, aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED, @@ -663,8 +663,10 @@ build_madt(GArray *table_data, BIOSLinker *linker, Vir= tMachineState *vms) gicr =3D acpi_data_push(table_data, sizeof(*gicr)); gicr->type =3D ACPI_APIC_GENERIC_REDISTRIBUTOR; gicr->length =3D sizeof(*gicr); - gicr->base_address =3D cpu_to_le64(memmap[VIRT_GIC_REDIST2].ba= se); - gicr->range_length =3D cpu_to_le32(memmap[VIRT_GIC_REDIST2].si= ze); + gicr->base_address =3D + cpu_to_le64(memmap[VIRT_HIGH_GIC_REDIST2].base); + gicr->range_length =3D + cpu_to_le32(memmap[VIRT_HIGH_GIC_REDIST2].size); } =20 if (its_class_name() && !vmc->no_its) { diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 99c2b6e60d..892bae4f3a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -150,10 +150,10 @@ static const MemMapEntry a15memmap[] =3D { [VIRT_PCIE_ECAM] =3D { 0x3f000000, 0x01000000 }, [VIRT_MEM] =3D { 0x40000000, RAMLIMIT_BYTES }, /* Additional 64 MB redist region (can contain up to 512 redistributor= s) */ - [VIRT_GIC_REDIST2] =3D { 0x4000000000ULL, 0x4000000 }, - [VIRT_PCIE_ECAM_HIGH] =3D { 0x4010000000ULL, 0x10000000 }, + [VIRT_HIGH_GIC_REDIST2] =3D { 0x4000000000ULL, 0x4000000 }, + [VIRT_HIGH_PCIE_ECAM] =3D { 0x4010000000ULL, 0x10000000 }, /* Second PCIe window, 512GB wide at the 512GB boundary */ - [VIRT_PCIE_MMIO_HIGH] =3D { 0x8000000000ULL, 0x8000000000ULL }, + [VIRT_HIGH_PCIE_MMIO] =3D { 0x8000000000ULL, 0x8000000000ULL }, }; =20 static const int a15irqmap[] =3D { @@ -431,12 +431,12 @@ static void fdt_add_gic_node(VirtMachineState *vms) 2, vms->memmap[VIRT_GIC_REDIST].s= ize); } else { qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", - 2, vms->memmap[VIRT_GIC_DIST].bas= e, - 2, vms->memmap[VIRT_GIC_DIST].siz= e, - 2, vms->memmap[VIRT_GIC_REDIST].b= ase, - 2, vms->memmap[VIRT_GIC_REDIST].s= ize, - 2, vms->memmap[VIRT_GIC_REDIST2].= base, - 2, vms->memmap[VIRT_GIC_REDIST2].= size); + 2, vms->memmap[VIRT_GIC_DIST].base, + 2, vms->memmap[VIRT_GIC_DIST].size, + 2, vms->memmap[VIRT_GIC_REDIST].base, + 2, vms->memmap[VIRT_GIC_REDIST].size, + 2, vms->memmap[VIRT_HIGH_GIC_REDIST2].bas= e, + 2, vms->memmap[VIRT_HIGH_GIC_REDIST2].siz= e); } =20 if (vms->virt) { @@ -584,7 +584,7 @@ static void create_gic(VirtMachineState *vms, qemu_irq = *pic) =20 if (nb_redist_regions =3D=3D 2) { uint32_t redist1_capacity =3D - vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIST_= SIZE; + vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST= _SIZE; =20 qdev_prop_set_uint32(gicdev, "redist-region-count[1]", MIN(smp_cpus - redist0_count, redist1_capacity)); @@ -601,7 +601,8 @@ static void create_gic(VirtMachineState *vms, qemu_irq = *pic) if (type =3D=3D 3) { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base); if (nb_redist_regions =3D=3D 2) { - sysbus_mmio_map(gicbusdev, 2, vms->memmap[VIRT_GIC_REDIST2].ba= se); + sysbus_mmio_map(gicbusdev, 2, + vms->memmap[VIRT_HIGH_GIC_REDIST2].base); } } else { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_CPU].base); @@ -1088,8 +1089,8 @@ static void create_pcie(VirtMachineState *vms, qemu_i= rq *pic) { hwaddr base_mmio =3D vms->memmap[VIRT_PCIE_MMIO].base; hwaddr size_mmio =3D vms->memmap[VIRT_PCIE_MMIO].size; - hwaddr base_mmio_high =3D vms->memmap[VIRT_PCIE_MMIO_HIGH].base; - hwaddr size_mmio_high =3D vms->memmap[VIRT_PCIE_MMIO_HIGH].size; + hwaddr base_mmio_high =3D vms->memmap[VIRT_HIGH_PCIE_MMIO].base; + hwaddr size_mmio_high =3D vms->memmap[VIRT_HIGH_PCIE_MMIO].size; hwaddr base_pio =3D vms->memmap[VIRT_PCIE_PIO].base; hwaddr size_pio =3D vms->memmap[VIRT_PCIE_PIO].size; hwaddr base_ecam, size_ecam; @@ -1417,8 +1418,10 @@ static void machvirt_init(MachineState *machine) * many redistributors we can fit into the memory map. */ if (vms->gic_version =3D=3D 3) { - virt_max_cpus =3D vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST= _SIZE; - virt_max_cpus +=3D vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDI= ST_SIZE; + virt_max_cpus =3D + vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; + virt_max_cpus +=3D + vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST_SIZE; } else { virt_max_cpus =3D GIC_NCPU; } diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 4cc57a7ef6..a27086d524 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -64,7 +64,7 @@ enum { VIRT_GIC_VCPU, VIRT_GIC_ITS, VIRT_GIC_REDIST, - VIRT_GIC_REDIST2, + VIRT_HIGH_GIC_REDIST2, VIRT_SMMU, VIRT_UART, VIRT_MMIO, @@ -74,9 +74,9 @@ enum { VIRT_PCIE_MMIO, VIRT_PCIE_PIO, VIRT_PCIE_ECAM, - VIRT_PCIE_ECAM_HIGH, + VIRT_HIGH_PCIE_ECAM, VIRT_PLATFORM_BUS, - VIRT_PCIE_MMIO_HIGH, + VIRT_HIGH_PCIE_MMIO, VIRT_GPIO, VIRT_SECURE_UART, VIRT_SECURE_MEM, @@ -128,7 +128,7 @@ typedef struct { int psci_conduit; } VirtMachineState; =20 -#define VIRT_ECAM_ID(high) (high ? VIRT_PCIE_ECAM_HIGH : VIRT_PCIE_ECAM) +#define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) =20 #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") #define VIRT_MACHINE(obj) \ --=20 2.20.1 From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15514482069121001.9311787546036; Fri, 1 Mar 2019 05:50:06 -0800 (PST) Received: from localhost ([127.0.0.1]:38114 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziY4-0004DH-BJ for importer@patchew.org; Fri, 01 Mar 2019 08:50:00 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59764) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziVt-0002rZ-Cp for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziVr-0002hi-2a for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:45 -0500 Received: from mx1.redhat.com ([209.132.183.28]:20949) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziVg-0002Z6-Fk; Fri, 01 Mar 2019 08:47:33 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8EC378F892; Fri, 1 Mar 2019 13:47:30 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id CCAA15D782; Fri, 1 Mar 2019 13:47:27 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:02 +0100 Message-Id: <20190301134709.4695-4-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Fri, 01 Mar 2019 13:47:30 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 03/10] hw/arm/virt: Split the memory map description X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In the prospect to introduce an extended memory map supporting more RAM, let's split the memory map array into two parts: - the former a15memmap, renamed base_memmap, contains regions below and including the RAM. MemMapEntries initialized in this array have a static size and base address. - extended_memmap, only initialized with entries located after the RAM. MemMapEntries initialized in this array only get their size initialized. Their base address is dynamically computed depending on the the top of the RAM, with same alignment as their size. Eventually base_memmap entries are copied into the extended_memmap array. Using two separate arrays however clarifies which entries are statically allocated and those which are dynamically allocated. This new split will allow to grow the RAM size without changing the description of the high IO entries. We introduce a new virt_set_memmap() helper function which "freezes" the memory map. We call it in machvirt_init as memory attributes of the machine are not yet set when virt_instance_init() gets called. The memory map is unchanged (the top of the initial RAM still is 256GiB). Then come the high IO regions with same layout as before. Signed-off-by: Eric Auger Reviewed-by: Igor Mammedov --- v10 -> v11: - remove vms->high_io_base - initialize vms->memmamp to NULL in the instance_init v8 -> v9: - restore virt_set_memmap call in machvirt_init as otherwise it does not work in TCG mode v7 -> v8: - removed Peter's R-b due to the changes induced by Igor's comments - call set_memmap back in virt_instance_init - add comments about sizing of extended_memmap - s/region/entries as suggested by Igor - rewording of the commit message v6 -> v7: - s/a15memmap/base_memmap - slight rewording of the commit message - add "if there is less than 256GiB of RAM then the floating area starts at the 256GiB mark" in the comment associated to the floating memory map - Added Peter's R-b v5 -> v6 - removal of many macros in units.h - introduce the virt_set_memmap helper - new computation for offsets of high IO regions - add comments --- hw/arm/virt.c | 51 ++++++++++++++++++++++++++++++++++++++----- include/hw/arm/virt.h | 13 +++++++---- 2 files changed, 54 insertions(+), 10 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 892bae4f3a..1c213eb3c9 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -29,6 +29,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/units.h" #include "qapi/error.h" #include "hw/sysbus.h" #include "hw/arm/arm.h" @@ -121,7 +122,7 @@ * Note that devices should generally be placed at multiples of 0x10000, * to accommodate guests using 64K pages. */ -static const MemMapEntry a15memmap[] =3D { +static const MemMapEntry base_memmap[] =3D { /* Space up to 0x8000000 is reserved for a boot ROM */ [VIRT_FLASH] =3D { 0, 0x08000000 }, [VIRT_CPUPERIPHS] =3D { 0x08000000, 0x00020000 }, @@ -149,11 +150,24 @@ static const MemMapEntry a15memmap[] =3D { [VIRT_PCIE_PIO] =3D { 0x3eff0000, 0x00010000 }, [VIRT_PCIE_ECAM] =3D { 0x3f000000, 0x01000000 }, [VIRT_MEM] =3D { 0x40000000, RAMLIMIT_BYTES }, +}; + +/* + * Highmem IO Regions: This memory map is floating, located after the RAM. + * Each MemMapEntry base (GPA) will be dynamically computed, depending on = the + * top of the RAM, so that its base get the same alignment as the size, + * ie. a 512GiB entry will be aligned on a 512GiB boundary. If there is + * less than 256GiB of RAM, the floating area starts at the 256GiB mark. + * Note the extended_memmap is sized so that it eventually also includes t= he + * base_memmap entries (VIRT_HIGH_GIC_REDIST2 index is greater than the la= st + * index of base_memmap). + */ +static MemMapEntry extended_memmap[] =3D { /* Additional 64 MB redist region (can contain up to 512 redistributor= s) */ - [VIRT_HIGH_GIC_REDIST2] =3D { 0x4000000000ULL, 0x4000000 }, - [VIRT_HIGH_PCIE_ECAM] =3D { 0x4010000000ULL, 0x10000000 }, - /* Second PCIe window, 512GB wide at the 512GB boundary */ - [VIRT_HIGH_PCIE_MMIO] =3D { 0x8000000000ULL, 0x8000000000ULL }, + [VIRT_HIGH_GIC_REDIST2] =3D { 0x0, 64 * MiB }, + [VIRT_HIGH_PCIE_ECAM] =3D { 0x0, 256 * MiB }, + /* Second PCIe window */ + [VIRT_HIGH_PCIE_MMIO] =3D { 0x0, 512 * GiB }, }; =20 static const int a15irqmap[] =3D { @@ -1354,6 +1368,29 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineStat= e *vms, int idx) return arm_cpu_mp_affinity(idx, clustersz); } =20 +static void virt_set_memmap(VirtMachineState *vms) +{ + hwaddr base; + int i; + + vms->memmap =3D extended_memmap; + + for (i =3D 0; i < ARRAY_SIZE(base_memmap); i++) { + vms->memmap[i] =3D base_memmap[i]; + } + + base =3D 256 * GiB; /* Top of the legacy initial RAM region */ + + for (i =3D VIRT_LOWMEMMAP_LAST; i < ARRAY_SIZE(extended_memmap); i++) { + hwaddr size =3D extended_memmap[i].size; + + base =3D ROUND_UP(base, size); + vms->memmap[i].base =3D base; + vms->memmap[i].size =3D size; + base +=3D size; + } +} + static void machvirt_init(MachineState *machine) { VirtMachineState *vms =3D VIRT_MACHINE(machine); @@ -1368,6 +1405,8 @@ static void machvirt_init(MachineState *machine) bool firmware_loaded =3D bios_name || drive_get(IF_PFLASH, 0, 0); bool aarch64 =3D true; =20 + virt_set_memmap(vms); + /* We can probe only here because during property set * KVM is not available yet */ @@ -1845,7 +1884,7 @@ static void virt_instance_init(Object *obj) "Valid values are none and smmuv3", NULL); =20 - vms->memmap =3D a15memmap; + vms->memmap =3D NULL; vms->irqmap =3D a15irqmap; } =20 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index a27086d524..f3f7fae4ac 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -64,7 +64,6 @@ enum { VIRT_GIC_VCPU, VIRT_GIC_ITS, VIRT_GIC_REDIST, - VIRT_HIGH_GIC_REDIST2, VIRT_SMMU, VIRT_UART, VIRT_MMIO, @@ -74,12 +73,18 @@ enum { VIRT_PCIE_MMIO, VIRT_PCIE_PIO, VIRT_PCIE_ECAM, - VIRT_HIGH_PCIE_ECAM, VIRT_PLATFORM_BUS, - VIRT_HIGH_PCIE_MMIO, VIRT_GPIO, VIRT_SECURE_UART, VIRT_SECURE_MEM, + VIRT_LOWMEMMAP_LAST, +}; + +/* indices of IO regions located after the RAM */ +enum { + VIRT_HIGH_GIC_REDIST2 =3D VIRT_LOWMEMMAP_LAST, + VIRT_HIGH_PCIE_ECAM, + VIRT_HIGH_PCIE_MMIO, }; =20 typedef enum VirtIOMMUType { @@ -116,7 +121,7 @@ typedef struct { int32_t gic_version; VirtIOMMUType iommu; struct arm_boot_info bootinfo; - const MemMapEntry *memmap; + MemMapEntry *memmap; const int *irqmap; int smp_cpus; void *fdt; --=20 2.20.1 From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155144859925822.099871749370777; Fri, 1 Mar 2019 05:56:39 -0800 (PST) Received: from localhost ([127.0.0.1]:38242 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzieU-0001Wn-5o for importer@patchew.org; Fri, 01 Mar 2019 08:56:38 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59852) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziVy-0002w4-MY for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziVx-0002p3-Ls for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:50 -0500 Received: from mx1.redhat.com ([209.132.183.28]:58902) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziVp-0002dS-39; Fri, 01 Mar 2019 08:47:41 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2A42B301509D; Fri, 1 Mar 2019 13:47:38 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id E64E95D707; Fri, 1 Mar 2019 13:47:30 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:03 +0100 Message-Id: <20190301134709.4695-5-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Fri, 01 Mar 2019 13:47:38 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 04/10] hw/boards: Add a MachineState parameter to kvm_type callback X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" On ARM, the kvm_type will be resolved by querying the KVMState. Let's add the MachineState handle to the callback so that we can retrieve the KVMState handle. in kvm_init, when the callback is called, the kvm_state variable is not yet set. Signed-off-by: Eric Auger Acked-by: David Gibson [ppc parts] Reviewed-by: Peter Maydell Reviewed-by: Igor Mammedov --- v7 -> v8: added Igor's R-b v6 -> v7: - add a comment for kvm_type - use machine instead of ms in the declaration - add Peter's R-b --- accel/kvm/kvm-all.c | 2 +- hw/ppc/mac_newworld.c | 3 +-- hw/ppc/mac_oldworld.c | 2 +- hw/ppc/spapr.c | 2 +- include/hw/boards.h | 5 ++++- 5 files changed, 8 insertions(+), 6 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index fd92b6f375..241db496c3 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -1593,7 +1593,7 @@ static int kvm_init(MachineState *ms) =20 kvm_type =3D qemu_opt_get(qemu_get_machine_opts(), "kvm-type"); if (mc->kvm_type) { - type =3D mc->kvm_type(kvm_type); + type =3D mc->kvm_type(ms, kvm_type); } else if (kvm_type) { ret =3D -EINVAL; fprintf(stderr, "Invalid argument kvm-type=3D%s\n", kvm_type); diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 98461052ac..97e8817145 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -564,8 +564,7 @@ static char *core99_fw_dev_path(FWPathProvider *p, BusS= tate *bus, =20 return NULL; } - -static int core99_kvm_type(const char *arg) +static int core99_kvm_type(MachineState *machine, const char *arg) { /* Always force PR KVM */ return 2; diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 284431ddd6..cc1e463466 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -420,7 +420,7 @@ static char *heathrow_fw_dev_path(FWPathProvider *p, Bu= sState *bus, return NULL; } =20 -static int heathrow_kvm_type(const char *arg) +static int heathrow_kvm_type(MachineState *machine, const char *arg) { /* Always force PR KVM */ return 2; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b6a571b6f1..d7850ada7d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3023,7 +3023,7 @@ static void spapr_machine_init(MachineState *machine) } } =20 -static int spapr_kvm_type(const char *vm_type) +static int spapr_kvm_type(MachineState *machine, const char *vm_type) { if (!vm_type) { return 0; diff --git a/include/hw/boards.h b/include/hw/boards.h index b55c9cc087..f7ce553aa1 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -157,6 +157,9 @@ typedef struct { * should instead use "unimplemented-device" for all memory ranges where * the guest will attempt to probe for a device that QEMU doesn't * implement and a stub device is required. + * @kvm_type: + * Return the type of KVM corresponding to the kvm-type string option or + * computed based on other criteria such as the host kernel capabilitie= s. */ struct MachineClass { /*< private >*/ @@ -172,7 +175,7 @@ struct MachineClass { void (*init)(MachineState *state); void (*reset)(void); void (*hot_add_cpu)(const int64_t id, Error **errp); - int (*kvm_type)(const char *arg); + int (*kvm_type)(MachineState *machine, const char *arg); =20 BlockInterfaceType block_default_type; int units_per_default_bus; --=20 2.20.1 From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551448869545719.5890448161152; Fri, 1 Mar 2019 06:01:09 -0800 (PST) Received: from localhost ([127.0.0.1]:38321 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziil-0005Rk-AS for importer@patchew.org; Fri, 01 Mar 2019 09:01:03 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59846) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziVy-0002w2-HR for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziVx-0002oy-Hc for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:50 -0500 Received: from mx1.redhat.com ([209.132.183.28]:43804) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziVr-0002gi-19; Fri, 01 Mar 2019 08:47:43 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4BA433070264; Fri, 1 Mar 2019 13:47:41 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id 80F625D717; Fri, 1 Mar 2019 13:47:38 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:04 +0100 Message-Id: <20190301134709.4695-6-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Fri, 01 Mar 2019 13:47:41 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 05/10] kvm: add kvm_arm_get_max_vm_ipa_size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Add the kvm_arm_get_max_vm_ipa_size() helper that returns the number of bits in the IPA address space supported by KVM. This capability needs to be known to create the VM with a specific IPA max size (kvm_type passed along KVM_CREATE_VM ioctl. Signed-off-by: Eric Auger Reviewed-by: Igor Mammedov --- v10 -> v11: - added Igor's R-b v6 -> v7: - s/kvm_arm_get_max_vm_phys_shift/kvm_arm_get_max_vm_ipa_size - reword the comment v4 -> v5: - return 40 if the host does not support the capability v3 -> v4: - s/s/ms in kvm_arm_get_max_vm_phys_shift function comment - check KVM_CAP_ARM_VM_IPA_SIZE extension v1 -> v2: - put this in ARM specific code --- target/arm/kvm.c | 10 ++++++++++ target/arm/kvm_arm.h | 13 +++++++++++++ 2 files changed, 23 insertions(+) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index e00ccf9c98..79a79f0190 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -18,6 +18,7 @@ #include "qemu/error-report.h" #include "sysemu/sysemu.h" #include "sysemu/kvm.h" +#include "sysemu/kvm_int.h" #include "kvm_arm.h" #include "cpu.h" #include "trace.h" @@ -162,6 +163,15 @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) env->features =3D arm_host_cpu_features.features; } =20 +int kvm_arm_get_max_vm_ipa_size(MachineState *ms) +{ + KVMState *s =3D KVM_STATE(ms->accelerator); + int ret; + + ret =3D kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE); + return ret > 0 ? ret : 40; +} + int kvm_arch_init(MachineState *ms, KVMState *s) { /* For ARM interrupt delivery is always asynchronous, diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 6393455b1d..2a07333c61 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -207,6 +207,14 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures = *ahcf); */ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu); =20 +/** + * kvm_arm_get_max_vm_ipa_size - Returns the number of bits in the + * IPA address space supported by KVM + * + * @ms: Machine state handle + */ +int kvm_arm_get_max_vm_ipa_size(MachineState *ms); + /** * kvm_arm_sync_mpstate_to_kvm * @cpu: ARMCPU @@ -239,6 +247,11 @@ static inline void kvm_arm_set_cpu_features_from_host(= ARMCPU *cpu) cpu->host_cpu_probe_failed =3D true; } =20 +static inline int kvm_arm_get_max_vm_ipa_size(MachineState *ms) +{ + return -ENOENT; +} + static inline int kvm_arm_vgic_probe(void) { return 0; --=20 2.20.1 From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551448407233209.91550951244062; Fri, 1 Mar 2019 05:53:27 -0800 (PST) Received: from localhost ([127.0.0.1]:38177 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzibJ-00072E-6e for importer@patchew.org; Fri, 01 Mar 2019 08:53:21 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59847) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziVy-0002w3-He for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziVx-0002pD-PR for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:50 -0500 Received: from mx1.redhat.com ([209.132.183.28]:35806) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziVt-0002k3-9G; Fri, 01 Mar 2019 08:47:45 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 624C13007429; Fri, 1 Mar 2019 13:47:44 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9ADE05D707; Fri, 1 Mar 2019 13:47:41 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:05 +0100 Message-Id: <20190301134709.4695-7-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 01 Mar 2019 13:47:44 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 06/10] vl: Set machine ram_size, maxram_size and ram_slots earlier X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The machine RAM attributes will need to be analyzed during the configure_accelerator() process. especially kvm_type() arm64 machine callback will use them to know how many IPA/GPA bits are needed to model the whole RAM range. So let's assign those machine state fields before calling configure_accelerator. Signed-off-by: Eric Auger Reviewed-by: Peter Maydell Reviewed-by: Igor Mammedov --- v7 -> v8: - added Igor's R-b v6 -> v7: - add Peter's R-b v4: new --- vl.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/vl.c b/vl.c index 502857a176..fd0d51320d 100644 --- a/vl.c +++ b/vl.c @@ -4239,6 +4239,9 @@ int main(int argc, char **argv, char **envp) machine_opts =3D qemu_get_machine_opts(); qemu_opt_foreach(machine_opts, machine_set_property, current_machine, &error_fatal); + current_machine->ram_size =3D ram_size; + current_machine->maxram_size =3D maxram_size; + current_machine->ram_slots =3D ram_slots; =20 configure_accelerator(current_machine, argv[0]); =20 @@ -4434,9 +4437,6 @@ int main(int argc, char **argv, char **envp) replay_checkpoint(CHECKPOINT_INIT); qdev_machine_init(); =20 - current_machine->ram_size =3D ram_size; - current_machine->maxram_size =3D maxram_size; - current_machine->ram_slots =3D ram_slots; current_machine->boot_order =3D boot_order; =20 /* parse features once if machine provides default cpu_type */ --=20 2.20.1 From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551448621151589.9427531519624; Fri, 1 Mar 2019 05:57:01 -0800 (PST) Received: from localhost ([127.0.0.1]:38244 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziei-0001k2-RO for importer@patchew.org; Fri, 01 Mar 2019 08:56:52 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60133) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziXG-00041k-Bh for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:49:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziXF-0003nM-3k for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:49:10 -0500 Received: from mx1.redhat.com ([209.132.183.28]:45400) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziX9-0003gu-9x; Fri, 01 Mar 2019 08:49:04 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 807CDDDB4C; Fri, 1 Mar 2019 13:47:47 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id B82815D704; Fri, 1 Mar 2019 13:47:44 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:06 +0100 Message-Id: <20190301134709.4695-8-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 01 Mar 2019 13:47:47 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 07/10] hw/arm/virt: Dynamic memory map depending on RAM requirements X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Up to now the memory map has been static and the high IO region base has always been 256GiB. This patch modifies the virt_set_memmap() function, which freezes the memory map, so that the high IO range base becomes floating, located after the initial RAM and the device memory. The function computes - the base of the device memory, - the size of the device memory, - the high IO region base - the highest GPA used in the memory map. Entries of the high IO region are assigned a base address. The device memory is initialized. The highest GPA used in the memory map will be used at VM creation to choose the requested IPA size. Setting all the existing highmem IO regions beyond the RAM allows to have a single contiguous RAM region (initial RAM and possible hotpluggable device memory). That way we do not need to do invasive changes in the EDK2 FW to support a dynamic RAM base. Still the user cannot request an initial RAM size greater than 255GB. Signed-off-by: Eric Auger Reviewed-by: Igor Mammedov --- v10 -> v11: - remove RAMBASE - s/256GiB/vms->memmap[VIRT_MEM].base + LEGACY_RAMLIMIT_BYTES while checking if high io region base < 256GB - added a comment in base_memmap about the actual RAM size v9 -> v10: - remove check of maxram_size 1GB alignment v8 -> v9: - add if (machine->device_memory) check v7 -> v8: - allocate ms->device_memory and removes vms->device_memory_base and vms->device_memory_storage - remove (ms->maxram_size > ms->ram_size || ms->ram_slots > 0) and (ms->ram_size > (ram_addr_t)LEGACY_RAMLIMIT_BYTES) checks - initialize the device memory - move the slots nb check and maxram_size alignment checks in this patch --- hw/arm/virt.c | 52 ++++++++++++++++++++++++++++++++++++++----- include/hw/arm/virt.h | 1 + 2 files changed, 47 insertions(+), 6 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 1c213eb3c9..624f417cd4 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -59,6 +59,7 @@ #include "qapi/visitor.h" #include "standard-headers/linux/input.h" #include "hw/arm/smmuv3.h" +#include "hw/acpi/acpi.h" =20 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \ static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ @@ -107,8 +108,8 @@ * of a terabyte of RAM will be doing it on a host with more than a * terabyte of physical address space.) */ -#define RAMLIMIT_GB 255 -#define RAMLIMIT_BYTES (RAMLIMIT_GB * 1024ULL * 1024 * 1024) +#define LEGACY_RAMLIMIT_GB 255 +#define LEGACY_RAMLIMIT_BYTES (LEGACY_RAMLIMIT_GB * GiB) =20 /* Addresses and sizes of our components. * 0..128MB is space for a flash device so we can run bootrom code such as= UEFI. @@ -149,7 +150,8 @@ static const MemMapEntry base_memmap[] =3D { [VIRT_PCIE_MMIO] =3D { 0x10000000, 0x2eff0000 }, [VIRT_PCIE_PIO] =3D { 0x3eff0000, 0x00010000 }, [VIRT_PCIE_ECAM] =3D { 0x3f000000, 0x01000000 }, - [VIRT_MEM] =3D { 0x40000000, RAMLIMIT_BYTES }, + /* Actual RAM size depends on initial RAM and device memory settings */ + [VIRT_MEM] =3D { GiB, LEGACY_RAMLIMIT_BYTES }, }; =20 /* @@ -1370,7 +1372,8 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState= *vms, int idx) =20 static void virt_set_memmap(VirtMachineState *vms) { - hwaddr base; + MachineState *ms =3D MACHINE(vms); + hwaddr base, device_memory_base, device_memory_size; int i; =20 vms->memmap =3D extended_memmap; @@ -1379,7 +1382,32 @@ static void virt_set_memmap(VirtMachineState *vms) vms->memmap[i] =3D base_memmap[i]; } =20 - base =3D 256 * GiB; /* Top of the legacy initial RAM region */ + if (ms->ram_slots > ACPI_MAX_RAM_SLOTS) { + error_report("unsupported number of memory slots: %"PRIu64, + ms->ram_slots); + exit(EXIT_FAILURE); + } + + /* + * We compute the base of the high IO region depending on the + * amount of initial and device memory. The device memory start/size + * is aligned on 1GiB. We never put the high IO region below 256GiB + * so that if maxram_size is < 255GiB we keep the legacy memory map. + * The device region size assumes 1GiB page max alignment per slot. + */ + device_memory_base =3D + ROUND_UP(vms->memmap[VIRT_MEM].base + ms->ram_size, GiB); + device_memory_size =3D ms->maxram_size - ms->ram_size + ms->ram_slots = * GiB; + + /* Base address of the high IO region */ + base =3D device_memory_base + ROUND_UP(device_memory_size, GiB); + if (base < device_memory_base) { + error_report("maxmem/slots too huge"); + exit(EXIT_FAILURE); + } + if (base < vms->memmap[VIRT_MEM].base + LEGACY_RAMLIMIT_BYTES) { + base =3D vms->memmap[VIRT_MEM].base + LEGACY_RAMLIMIT_BYTES; + } =20 for (i =3D VIRT_LOWMEMMAP_LAST; i < ARRAY_SIZE(extended_memmap); i++) { hwaddr size =3D extended_memmap[i].size; @@ -1389,6 +1417,13 @@ static void virt_set_memmap(VirtMachineState *vms) vms->memmap[i].size =3D size; base +=3D size; } + vms->highest_gpa =3D base - 1; + if (device_memory_size > 0) { + ms->device_memory =3D g_malloc0(sizeof(*ms->device_memory)); + ms->device_memory->base =3D device_memory_base; + memory_region_init(&ms->device_memory->mr, OBJECT(vms), + "device-memory", device_memory_size); + } } =20 static void machvirt_init(MachineState *machine) @@ -1475,7 +1510,8 @@ static void machvirt_init(MachineState *machine) vms->smp_cpus =3D smp_cpus; =20 if (machine->ram_size > vms->memmap[VIRT_MEM].size) { - error_report("mach-virt: cannot model more than %dGB RAM", RAMLIMI= T_GB); + error_report("mach-virt: cannot model more than %dGB RAM", + LEGACY_RAMLIMIT_GB); exit(1); } =20 @@ -1569,6 +1605,10 @@ static void machvirt_init(MachineState *machine) memory_region_allocate_system_memory(ram, NULL, "mach-virt.ram", machine->ram_size); memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base, ram); + if (machine->device_memory) { + memory_region_add_subregion(sysmem, machine->device_memory->base, + &machine->device_memory->mr); + } =20 create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem); =20 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index f3f7fae4ac..507517c603 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -131,6 +131,7 @@ typedef struct { uint32_t msi_phandle; uint32_t iommu_phandle; int psci_conduit; + hwaddr highest_gpa; } VirtMachineState; =20 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) --=20 2.20.1 From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551448239329824.9654857110355; Fri, 1 Mar 2019 05:50:39 -0800 (PST) Received: from localhost ([127.0.0.1]:38119 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziYg-0004iV-8s for importer@patchew.org; Fri, 01 Mar 2019 08:50:38 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59885) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziW2-0002yZ-Gg for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziW1-0002sN-LM for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:47:54 -0500 Received: from mx1.redhat.com ([209.132.183.28]:10339) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziVz-0002qV-DC; Fri, 01 Mar 2019 08:47:51 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 94DE430D78BB; Fri, 1 Mar 2019 13:47:50 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id D012E5D704; Fri, 1 Mar 2019 13:47:47 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:07 +0100 Message-Id: <20190301134709.4695-9-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Fri, 01 Mar 2019 13:47:50 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 08/10] hw/arm/virt: Implement kvm_type function for 4.0 machine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" This patch implements the machine class kvm_type() callback. It returns the number of bits requested to implement the whole GPA range including the RAM and IO regions located beyond. The returned value in passed though the KVM_CREATE_VM ioctl and this allows KVM to set the stage2 tables dynamically. To compute the highest GPA used in the memory map, kvm_type() must freeze the memory map by calling virt_set_memmap(). Signed-off-by: Eric Auger Reviewed-by: Igor Mammedov --- v10 -> v11: - replace !kvm_enabled check by !vms->memmap v7 -> v8: - remove vmc->no_extended_memmap and vms->extended_memmap v6 -> v7: - Introduce RAMBASE and rename add LEGACY_ prefix in that patch - use local variables with explicit names in virt_set_memmap: device_memory_base, device_memory_size - add an extended_memmap field in the class v5 -> v6: - add some comments - high IO region cannot start before 256GiB --- hw/arm/virt.c | 39 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 624f417cd4..300eaae26f 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1440,7 +1440,13 @@ static void machvirt_init(MachineState *machine) bool firmware_loaded =3D bios_name || drive_get(IF_PFLASH, 0, 0); bool aarch64 =3D true; =20 - virt_set_memmap(vms); + /* + * In accelerated mode, the memory map is computed earlier in kvm_type= () + * to create a VM with the right number of IPA bits. + */ + if (!vms->memmap) { + virt_set_memmap(vms); + } =20 /* We can probe only here because during property set * KVM is not available yet @@ -1829,6 +1835,36 @@ static HotplugHandler *virt_machine_get_hotplug_hand= ler(MachineState *machine, return NULL; } =20 +/* + * for arm64 kvm_type [7-0] encodes the requested number of bits + * in the IPA address space + */ +static int virt_kvm_type(MachineState *ms, const char *type_str) +{ + VirtMachineState *vms =3D VIRT_MACHINE(ms); + int max_vm_pa_size =3D kvm_arm_get_max_vm_ipa_size(ms); + int requested_pa_size; + + /* we freeze the memory map to compute the highest gpa */ + virt_set_memmap(vms); + + requested_pa_size =3D 64 - clz64(vms->highest_gpa); + + if (requested_pa_size > max_vm_pa_size) { + error_report("-m and ,maxmem option values " + "require an IPA range (%d bits) larger than " + "the one supported by the host (%d bits)", + requested_pa_size, max_vm_pa_size); + exit(1); + } + /* + * By default we return 0 which corresponds to an implicit legacy + * 40b IPA setting. Otherwise we return the actual requested PA + * logsize + */ + return requested_pa_size > 40 ? requested_pa_size : 0; +} + static void virt_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -1853,6 +1889,7 @@ static void virt_machine_class_init(ObjectClass *oc, = void *data) mc->cpu_index_to_instance_props =3D virt_cpu_index_to_props; mc->default_cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a15"); mc->get_default_cpu_node_id =3D virt_get_default_cpu_node_id; + mc->kvm_type =3D virt_kvm_type; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler =3D virt_machine_get_hotplug_handler; hc->plug =3D virt_machine_device_plug_cb; --=20 2.20.1 From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551448422672325.03751839237805; Fri, 1 Mar 2019 05:53:42 -0800 (PST) Received: from localhost ([127.0.0.1]:38179 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzibb-0007In-Ln for importer@patchew.org; Fri, 01 Mar 2019 08:53:39 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59982) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziWL-0003GI-Mr for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:48:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziWJ-00034k-L8 for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:48:13 -0500 Received: from mx1.redhat.com ([209.132.183.28]:60348) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziW8-0002vp-TF; Fri, 01 Mar 2019 08:48:01 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id DA3603007429; Fri, 1 Mar 2019 13:47:58 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id E84D85D782; Fri, 1 Mar 2019 13:47:50 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:08 +0100 Message-Id: <20190301134709.4695-10-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Fri, 01 Mar 2019 13:47:58 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 09/10] hw/arm/virt: Check the VCPU PA range in TCG mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We are about to allow the memory map to grow beyond 1TB and potentially overshoot the VCPU AA64MMFR0.PARANGE. In aarch64 mode and when highmem is set, let's check the VCPU PA range is sufficient to address the highest GPA of the memory map. Signed-off-by: Eric Auger Reviewed-by: Igor Mammedov --- hw/arm/virt.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 300eaae26f..ab70e4a657 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -60,6 +60,7 @@ #include "standard-headers/linux/input.h" #include "hw/arm/smmuv3.h" #include "hw/acpi/acpi.h" +#include "target/arm/internals.h" =20 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \ static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ @@ -1608,6 +1609,22 @@ static void machvirt_init(MachineState *machine) fdt_add_timer_nodes(vms); fdt_add_cpu_nodes(vms); =20 + if (!kvm_enabled()) { + ARMCPU *cpu =3D ARM_CPU(first_cpu); + bool aarch64 =3D object_property_get_bool(OBJECT(cpu), "aarch64", = NULL); + + if (aarch64 && vms->highmem) { + int requested_pa_size, pamax =3D arm_pamax(cpu); + + requested_pa_size =3D 64 - clz64(vms->highest_gpa); + if (pamax < requested_pa_size) { + error_report("VCPU supports less PA bits (%d) than request= ed " + "by the memory map (%d)", pamax, requested_pa_= size); + exit(1); + } + } + } + memory_region_allocate_system_memory(ram, NULL, "mach-virt.ram", machine->ram_size); memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base, ram); --=20 2.20.1 From nobody Sun Nov 9 17:51:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551448591906258.8684595083163; Fri, 1 Mar 2019 05:56:31 -0800 (PST) Received: from localhost ([127.0.0.1]:38240 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzieK-0001Pq-Rd for importer@patchew.org; Fri, 01 Mar 2019 08:56:28 -0500 Received: from eggs.gnu.org ([209.51.188.92]:60007) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gziWN-0003J6-Mm for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:48:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gziWL-000364-Lp for qemu-devel@nongnu.org; Fri, 01 Mar 2019 08:48:15 -0500 Received: from mx1.redhat.com ([209.132.183.28]:44136) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gziWD-0002yL-EV; Fri, 01 Mar 2019 08:48:05 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 02841308B473; Fri, 1 Mar 2019 13:48:02 +0000 (UTC) Received: from laptop.redhat.com (ovpn-116-102.ams2.redhat.com [10.36.116.102]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3CB415D704; Fri, 1 Mar 2019 13:47:59 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Fri, 1 Mar 2019 14:47:09 +0100 Message-Id: <20190301134709.4695-11-eric.auger@redhat.com> In-Reply-To: <20190301134709.4695-1-eric.auger@redhat.com> References: <20190301134709.4695-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Fri, 01 Mar 2019 13:48:02 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 10/10] hw/arm/virt: Bump the 255GB initial RAM limit X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Now we have the extended memory map (high IO regions beyond the scalable RAM) and dynamic IPA range support at KVM/ARM level we can bump the legacy 255GB initial RAM limit. The actual maximum RAM size now depends on the physical CPU and host kernel, in accelerated mode. In TCG mode, it depends on the VCPU AA64MMFR0.PARANGE. Signed-off-by: Eric Auger --- v7 -> v8: - TCG PAMAX check moved in a separate patch v6 -> v7 - handle TCG case - set_memmap modifications moved to previous patches --- hw/arm/virt.c | 21 +-------------------- 1 file changed, 1 insertion(+), 20 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ab70e4a657..aa06570050 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -95,20 +95,7 @@ =20 #define PLATFORM_BUS_NUM_IRQS 64 =20 -/* RAM limit in GB. Since VIRT_MEM starts at the 1GB mark, this means - * RAM can go up to the 256GB mark, leaving 256GB of the physical - * address space unallocated and free for future use between 256G and 512G. - * If we need to provide more RAM to VMs in the future then we need to: - * * allocate a second bank of RAM starting at 2TB and working up - * * fix the DT and ACPI table generation code in QEMU to correctly - * report two split lumps of RAM to the guest - * * fix KVM in the host kernel to allow guests with >40 bit address spac= es - * (We don't want to fill all the way up to 512GB with RAM because - * we might want it for non-RAM purposes later. Conversely it seems - * reasonable to assume that anybody configuring a VM with a quarter - * of a terabyte of RAM will be doing it on a host with more than a - * terabyte of physical address space.) - */ +/* Legacy RAM limit in GB (< version 4.0) */ #define LEGACY_RAMLIMIT_GB 255 #define LEGACY_RAMLIMIT_BYTES (LEGACY_RAMLIMIT_GB * GiB) =20 @@ -1516,12 +1503,6 @@ static void machvirt_init(MachineState *machine) =20 vms->smp_cpus =3D smp_cpus; =20 - if (machine->ram_size > vms->memmap[VIRT_MEM].size) { - error_report("mach-virt: cannot model more than %dGB RAM", - LEGACY_RAMLIMIT_GB); - exit(1); - } - if (vms->virt && kvm_enabled()) { error_report("mach-virt: KVM does not support providing " "Virtualization extensions to the guest CPU"); --=20 2.20.1