From nobody Mon Sep 29 07:32:14 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551442427061970.9315364546603; Fri, 1 Mar 2019 04:13:47 -0800 (PST) Received: from localhost ([127.0.0.1]:36482 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzh2r-0001U2-28 for importer@patchew.org; Fri, 01 Mar 2019 07:13:41 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40334) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzgl9-0003es-Rf for qemu-devel@nongnu.org; Fri, 01 Mar 2019 06:55:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzgl9-0006se-0k for qemu-devel@nongnu.org; Fri, 01 Mar 2019 06:55:23 -0500 Received: from mx1.redhat.com ([209.132.183.28]:42054) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gzgl8-0006sH-Oo; Fri, 01 Mar 2019 06:55:22 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0B923BAF5; Fri, 1 Mar 2019 11:55:22 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-149.ams2.redhat.com [10.36.117.149]) by smtp.corp.redhat.com (Postfix) with ESMTP id ABF335C1B5; Fri, 1 Mar 2019 11:55:20 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 12:54:06 +0100 Message-Id: <20190301115413.27153-26-david@redhat.com> In-Reply-To: <20190301115413.27153-1-david@redhat.com> References: <20190301115413.27153-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Fri, 01 Mar 2019 11:55:22 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 25/32] s390x/tcg: Implement VECTOR SELECT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , David Hildenbrand , Thomas Huth , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Provide an implementation based on i64 and on real host vectors. Signed-off-by: David Hildenbrand Reviewed-by: Richard Henderson --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 41 +++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 8d7c834e7d..ae58ff440b 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1030,6 +1030,8 @@ /* VECTOR SCATTER ELEMENT */ E(0xe71b, VSCEF, VRV, V, la2, 0, 0, 0, vsce, 0, ES_32, IF_VEC) E(0xe71a, VSCEG, VRV, V, la2, 0, 0, 0, vsce, 0, ES_64, IF_VEC) +/* VECTOR SELECT */ + F(0xe78d, VSEL, VRR_e, V, 0, 0, 0, 0, vsel, 0, IF_VEC) =20 #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.in= c.c index dacb115c79..c65e76b6f6 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -141,6 +141,10 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint= 8_t reg, TCGv_i64 enr, #define gen_gvec_3_ptr(v1, v2, v3, ptr, data, fn) \ tcg_gen_gvec_3_ptr(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ vec_full_reg_offset(v3), ptr, 16, 16, data, fn) +#define gen_gvec_4(v1, v2, v3, v4, gen) \ + tcg_gen_gvec_4(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ + vec_full_reg_offset(v3), vec_full_reg_offset(v4), \ + 16, 16, gen) #define gen_gvec_4_ool(v1, v2, v3, v4, data, fn) \ tcg_gen_gvec_4_ool(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ vec_full_reg_offset(v3), vec_full_reg_offset(v4), \ @@ -739,3 +743,40 @@ static DisasJumpType op_vsce(DisasContext *s, DisasOps= *o) tcg_temp_free_i64(tmp); return DISAS_NEXT; } + +static void gen_sel_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b, TCGv_i64 c) +{ + TCGv_i64 t =3D tcg_temp_new_i64(); + + /* bit in c not set -> copy bit from b */ + tcg_gen_andc_i64(t, b, c); + /* bit in c set -> copy bit from a */ + tcg_gen_and_i64(d, a, c); + /* merge the results */ + tcg_gen_or_i64(d, d, t); + tcg_temp_free_i64(t); +} + +static void gen_sel_vec(unsigned vece, TCGv_vec d, TCGv_vec a, TCGv_vec b, + TCGv_vec c) +{ + TCGv_vec t =3D tcg_temp_new_vec_matching(d); + + tcg_gen_andc_vec(vece, t, b, c); + tcg_gen_and_vec(vece, d, a, c); + tcg_gen_or_vec(vece, d, d, t); + tcg_temp_free_vec(t); +} + +static DisasJumpType op_vsel(DisasContext *s, DisasOps *o) +{ + static const GVecGen4 gvec_op =3D { + .fni8 =3D gen_sel_i64, + .fniv =3D gen_sel_vec, + .prefer_i64 =3D TCG_TARGET_REG_BITS =3D=3D 64, + }; + + gen_gvec_4(get_field(s->fields, v1), get_field(s->fields, v2), + get_field(s->fields, v3), get_field(s->fields, v4), &gvec_o= p); + return DISAS_NEXT; +} --=20 2.17.2