From nobody Mon Sep 29 07:32:47 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551442154711223.3352569942026; Fri, 1 Mar 2019 04:09:14 -0800 (PST) Received: from localhost ([127.0.0.1]:36394 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzgyS-00063L-Gq for importer@patchew.org; Fri, 01 Mar 2019 07:09:08 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40078) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzgkj-0003DO-Mg for qemu-devel@nongnu.org; Fri, 01 Mar 2019 06:54:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzgki-0006bf-RC for qemu-devel@nongnu.org; Fri, 01 Mar 2019 06:54:57 -0500 Received: from mx1.redhat.com ([209.132.183.28]:61417) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gzgki-0006bC-JM; Fri, 01 Mar 2019 06:54:56 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C89943D47F; Fri, 1 Mar 2019 11:54:55 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-149.ams2.redhat.com [10.36.117.149]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6B63B5C229; Fri, 1 Mar 2019 11:54:52 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 12:53:56 +0100 Message-Id: <20190301115413.27153-16-david@redhat.com> In-Reply-To: <20190301115413.27153-1-david@redhat.com> References: <20190301115413.27153-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 01 Mar 2019 11:54:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 15/32] s390x/tcg: Implement VECTOR LOAD VR ELEMENT FROM GR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , David Hildenbrand , Thomas Huth , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Very similar to VECTOR LOAD GR FROM VR ELEMENT, just the opposite direction. Also provide a fast path in case we don't care about the register content. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 41 +++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index ad8df5283c..6814061204 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1004,6 +1004,8 @@ F(0xe736, VLM, VRS_a, V, la2, 0, 0, 0, vlm, 0, IF_VEC) /* VECTOR LOAD TO BLOCK BOUNDARY */ F(0xe707, VLBB, VRX, V, la2, 0, 0, 0, vlbb, 0, IF_VEC) +/* VECTOR LOAD VR ELEMENT FROM GR */ + F(0xe722, VLVG, VRS_b, V, la2, r3, 0, 0, vlvg, 0, IF_VEC) =20 #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.in= c.c index f9d0ecf29d..78afecbe06 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -465,3 +465,44 @@ static DisasJumpType op_vlbb(DisasContext *s, DisasOps= *o) tcg_temp_free_ptr(a0); return DISAS_NEXT; } + +static DisasJumpType op_vlvg(DisasContext *s, DisasOps *o) +{ + const uint8_t es =3D get_field(s->fields, m4); + TCGv_ptr ptr; + + if (es > ES_64) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + /* fast path if we don't need the register content */ + if (!get_field(s->fields, b2)) { + uint8_t enr =3D get_field(s->fields, d2) & (NUM_VEC_ELEMENTS(es) -= 1); + + write_vec_element_i64(o->in2, get_field(s->fields, v1), enr, es); + return DISAS_NEXT; + } + + ptr =3D tcg_temp_new_ptr(); + get_vec_element_ptr_i64(ptr, get_field(s->fields, v1), o->addr1, es); + switch (es) { + case ES_8: + tcg_gen_st8_i64(o->in2, ptr, 0); + break; + case ES_16: + tcg_gen_st16_i64(o->in2, ptr, 0); + break; + case ES_32: + tcg_gen_st32_i64(o->in2, ptr, 0); + break; + case ES_64: + tcg_gen_st_i64(o->in2, ptr, 0); + break; + default: + g_assert_not_reached(); + } + tcg_temp_free_ptr(ptr); + + return DISAS_NEXT; +} --=20 2.17.2