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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id c17sm13153241wrs.17.2019.02.28.03.08.51 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Feb 2019 03:08:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=K5X5IUWaeR++0Y0n+RqFWS3vnhw3atMpY3lXmUHrh30=; b=F+c5kRmJzcIc8Am8h7tGGpoTLA9Fj7lx34TyIEDCLm8y9BDQFcH/7RCxaE7ET6rAqK +LBmYCO/muUAUCM3+cLyrqNrdwh8K6OL4+PYX4U3XTcAe14j4xiWT8gJSSGJIPj+t9AJ C3CcNXAW5ji5FzKJBeKTYVwTPd3Fo2sjrIcBzzTbQYI7uy/KTSlvxQs43oBkth/ufdfv tsjuamzl3cgmA0+T7D8UlvuIRQz0b86BMlE/g+4sVWj96xht+pPSrUyPTc/5BzrWZIbv DTCWoZXUhFwBkgM2F4iXH0pKDQeRj5P/BqmpXTLgr5hyJyICMSFLsD4NDYDtiHV3U6HJ BxbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K5X5IUWaeR++0Y0n+RqFWS3vnhw3atMpY3lXmUHrh30=; b=daeSm7sTaumi3+cRlmXEBJv9IyTCbh/V9juTmkBblV6qpF2TvuOg8agYZRaIa9VZy+ T6fXZrUwIJA9SwwTk+QdHSLbH6aNnunnGKJzMeo/CE4F0dbjS0FeToU6Es1Z/Bpuuq3i ODdUhhSQUo+40nnmUOXuewHU4sHIojV9LBUYQabPu0eMrOf1B7CSr0zgLGCDsr5ICF1s VFZSDfhZMr/Y8HEPprSpB2P3SCOWxsg7+n+biI59vJ5w513fG3ke8CNOK8YsdiF241/x sh3dSGlzAP128wi7Cw/kcXFVomuvZVrOjDhbyliN18gG9E+oAKTe1Sv5NdztW4A5MMbe CMQg== X-Gm-Message-State: AHQUAuZKLPITU3f1E1JPEr/h3xkcRGqTy0uDchJv4Akne/zZlen76ROn amAVPQYRp/A9Qkoh5fFyrZvqUDqIjvs= X-Google-Smtp-Source: APXvYqz5ktTtcgB/QfbzOV8HMbenmdqImKDokCIVAYWKWSTuN3fyqbDpteDqd2bMyBxaZyNgBTkDTw== X-Received: by 2002:a1c:9e97:: with SMTP id h145mr2412741wme.147.1551352133921; Thu, 28 Feb 2019 03:08:53 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 28 Feb 2019 11:08:22 +0000 Message-Id: <20190228110835.16159-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190228110835.16159-1-peter.maydell@linaro.org> References: <20190228110835.16159-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::330 Subject: [Qemu-devel] [PULL 03/16] target/arm/cpu: Allow init-svtor property to be set after realize X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Make the M-profile "init-svtor" property be settable after realize. This matches the hardware, where this is a config signal which is sampled on CPU reset and can thus be changed between one reset and another. To do this we have to change the API we use to add the property. (We will need this capability for the SSE-200.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20190219125808.25174-4-peter.maydell@linaro.org --- target/arm/cpu.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 8ea6569088d..4d7f6a3bc0c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -22,6 +22,7 @@ #include "target/arm/idau.h" #include "qemu/error-report.h" #include "qapi/error.h" +#include "qapi/visitor.h" #include "cpu.h" #include "internals.h" #include "qemu-common.h" @@ -771,9 +772,21 @@ static Property arm_cpu_pmsav7_dregion_property =3D pmsav7_dregion, qdev_prop_uint32, uint32_t); =20 -/* M profile: initial value of the Secure VTOR */ -static Property arm_cpu_initsvtor_property =3D - DEFINE_PROP_UINT32("init-svtor", ARMCPU, init_svtor, 0); +static void arm_get_init_svtor(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + ARMCPU *cpu =3D ARM_CPU(obj); + + visit_type_uint32(v, name, &cpu->init_svtor, errp); +} + +static void arm_set_init_svtor(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + ARMCPU *cpu =3D ARM_CPU(obj); + + visit_type_uint32(v, name, &cpu->init_svtor, errp); +} =20 void arm_cpu_post_init(Object *obj) { @@ -845,8 +858,14 @@ void arm_cpu_post_init(Object *obj) qdev_prop_allow_set_link_before_realize, OBJ_PROP_LINK_STRONG, &error_abort); - qdev_property_add_static(DEVICE(obj), &arm_cpu_initsvtor_property, - &error_abort); + /* + * M profile: initial value of the Secure VTOR. We can't just use + * a simple DEFINE_PROP_UINT32 for this because we want to permit + * the property to be set after realize. + */ + object_property_add(obj, "init-svtor", "uint32", + arm_get_init_svtor, arm_set_init_svtor, + NULL, NULL, &error_abort); } =20 qdev_property_add_static(DEVICE(obj), &arm_cpu_cfgend_property, --=20 2.20.1