From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551210203103582.4661879896323; Tue, 26 Feb 2019 11:43:23 -0800 (PST) Received: from localhost ([127.0.0.1]:60352 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyidB-0000N1-7E for importer@patchew.org; Tue, 26 Feb 2019 14:43:09 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46389) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiVL-0002cO-Sn for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:35:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyiV8-0006dn-8g for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:58 -0500 Received: from mx1.redhat.com ([209.132.183.28]:40810) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyiUg-0005yK-8n; Tue, 26 Feb 2019 14:34:22 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5610CC05000F; Tue, 26 Feb 2019 19:34:14 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B357F60865; Tue, 26 Feb 2019 19:34:10 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 129F31138661; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:33:58 +0100 Message-Id: <20190226193408.23862-2-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Tue, 26 Feb 2019 19:34:14 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 01/11] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" flash.h's incomplete struct pflash_t is completed both in pflash_cfi01.c and in pflash_cfi02.c. The complete types are incompatible. This can hide type errors, such as passing a pflash_t created with pflash_cfi02_register() to pflash_cfi01_get_memory(). Furthermore, POSIX reserves typedef names ending with _t. Rename the two structs to PFlashCFI01 and PFlashCFI02. Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/vexpress.c | 8 ++-- hw/block/pflash_cfi01.c | 89 +++++++++++++++++++++------------------- hw/block/pflash_cfi02.c | 71 +++++++++++++++++--------------- hw/i386/pc_sysfw.c | 2 +- hw/mips/mips_malta.c | 2 +- hw/xtensa/xtfpga.c | 10 ++--- include/hw/block/flash.h | 53 ++++++++++++++---------- 7 files changed, 125 insertions(+), 110 deletions(-) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index c02d18ee61..ed46d2e730 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -512,8 +512,8 @@ static void vexpress_modify_dtb(const struct arm_boot_i= nfo *info, void *fdt) /* Open code a private version of pflash registration since we * need to set non-default device width for VExpress platform. */ -static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name, - DriveInfo *di) +static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, + DriveInfo *di) { DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); =20 @@ -536,7 +536,7 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base, = const char *name, qdev_init_nofail(dev); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01"); + return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01"); } =20 static void vexpress_common_init(MachineState *machine) @@ -548,7 +548,7 @@ static void vexpress_common_init(MachineState *machine) qemu_irq pic[64]; uint32_t sys_id; DriveInfo *dinfo; - pflash_t *pflash0; + PFlashCFI01 *pflash0; I2CBus *i2c; ram_addr_t vram_size, sram_size; MemoryRegion *sysmem =3D get_system_memory(); diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index bffb4c40e7..a51ac9f399 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -65,12 +65,13 @@ do { = \ #define DPRINTF(fmt, ...) do { } while (0) #endif =20 -#define CFI_PFLASH01(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH01) +#define CFI_PFLASH01(obj) \ + OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01) =20 #define PFLASH_BE 0 #define PFLASH_SECURE 1 =20 -struct pflash_t { +struct PFlashCFI01 { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -109,17 +110,17 @@ static const VMStateDescription vmstate_pflash =3D { .minimum_version_id =3D 1, .post_load =3D pflash_post_load, .fields =3D (VMStateField[]) { - VMSTATE_UINT8(wcycle, pflash_t), - VMSTATE_UINT8(cmd, pflash_t), - VMSTATE_UINT8(status, pflash_t), - VMSTATE_UINT64(counter, pflash_t), + VMSTATE_UINT8(wcycle, PFlashCFI01), + VMSTATE_UINT8(cmd, PFlashCFI01), + VMSTATE_UINT8(status, PFlashCFI01), + VMSTATE_UINT64(counter, PFlashCFI01), VMSTATE_END_OF_LIST() } }; =20 static void pflash_timer (void *opaque) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; =20 trace_pflash_timer_expired(pfl->cmd); /* Reset flash */ @@ -133,7 +134,7 @@ static void pflash_timer (void *opaque) * If this code is called we know we have a device_width set for * this flash. */ -static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset) +static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwaddr offset) { int i; uint32_t resp =3D 0; @@ -193,7 +194,7 @@ static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr = offset) =20 =20 /* Perform a device id query based on the bank width of the flash. */ -static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset) +static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hwaddr offset) { int i; uint32_t resp; @@ -241,7 +242,7 @@ static uint32_t pflash_devid_query(pflash_t *pfl, hwadd= r offset) return resp; } =20 -static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset, +static uint32_t pflash_data_read(PFlashCFI01 *pfl, hwaddr offset, int width, int be) { uint8_t *p; @@ -284,8 +285,8 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr = offset, return ret; } =20 -static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, - int width, int be) +static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr offset, + int width, int be) { hwaddr boff; uint32_t ret; @@ -398,7 +399,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offs= et, } =20 /* update flash content on disk */ -static void pflash_update(pflash_t *pfl, int offset, +static void pflash_update(PFlashCFI01 *pfl, int offset, int size) { int offset_end; @@ -412,7 +413,7 @@ static void pflash_update(pflash_t *pfl, int offset, } } =20 -static inline void pflash_data_write(pflash_t *pfl, hwaddr offset, +static inline void pflash_data_write(PFlashCFI01 *pfl, hwaddr offset, uint32_t value, int width, int be) { uint8_t *p =3D pfl->storage; @@ -448,7 +449,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwa= ddr offset, =20 } =20 -static void pflash_write(pflash_t *pfl, hwaddr offset, +static void pflash_write(PFlashCFI01 *pfl, hwaddr offset, uint32_t value, int width, int be) { uint8_t *p; @@ -654,7 +655,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset, static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, u= int64_t *value, unsigned len, MemTxAttrs att= rs) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; bool be =3D !!(pfl->features & (1 << PFLASH_BE)); =20 if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) { @@ -668,7 +669,7 @@ static MemTxResult pflash_mem_read_with_attrs(void *opa= que, hwaddr addr, uint64_ static MemTxResult pflash_mem_write_with_attrs(void *opaque, hwaddr addr, = uint64_t value, unsigned len, MemTxAttrs at= trs) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; bool be =3D !!(pfl->features & (1 << PFLASH_BE)); =20 if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) { @@ -687,7 +688,7 @@ static const MemoryRegionOps pflash_cfi01_ops =3D { =20 static void pflash_cfi01_realize(DeviceState *dev, Error **errp) { - pflash_t *pfl =3D CFI_PFLASH01(dev); + PFlashCFI01 *pfl =3D CFI_PFLASH01(dev); uint64_t total_len; int ret; uint64_t blocks_per_device, sector_len_per_device, device_len; @@ -864,14 +865,14 @@ static void pflash_cfi01_realize(DeviceState *dev, Er= ror **errp) } =20 static Property pflash_cfi01_properties[] =3D { - DEFINE_PROP_DRIVE("drive", struct pflash_t, blk), + DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk), /* num-blocks is the number of blocks actually visible to the guest, * ie the total size of the device divided by the sector length. * If we're emulating flash devices wired in parallel the actual * number of blocks per indvidual device will differ. */ - DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0), - DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0), + DEFINE_PROP_UINT32("num-blocks", PFlashCFI01, nb_blocs, 0), + DEFINE_PROP_UINT64("sector-length", PFlashCFI01, sector_len, 0), /* width here is the overall width of this QEMU device in bytes. * The QEMU device may be emulating a number of flash devices * wired up in parallel; the width of each individual flash @@ -888,17 +889,17 @@ static Property pflash_cfi01_properties[] =3D { * 16 bit devices making up a 32 bit wide QEMU device. This * is deprecated for new uses of this device. */ - DEFINE_PROP_UINT8("width", struct pflash_t, bank_width, 0), - DEFINE_PROP_UINT8("device-width", struct pflash_t, device_width, 0), - DEFINE_PROP_UINT8("max-device-width", struct pflash_t, max_device_widt= h, 0), - DEFINE_PROP_BIT("big-endian", struct pflash_t, features, PFLASH_BE, 0), - DEFINE_PROP_BIT("secure", struct pflash_t, features, PFLASH_SECURE, 0), - DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0), - DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0), - DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0), - DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0), - DEFINE_PROP_STRING("name", struct pflash_t, name), - DEFINE_PROP_BOOL("old-multiple-chip-handling", struct pflash_t, + DEFINE_PROP_UINT8("width", PFlashCFI01, bank_width, 0), + DEFINE_PROP_UINT8("device-width", PFlashCFI01, device_width, 0), + DEFINE_PROP_UINT8("max-device-width", PFlashCFI01, max_device_width, 0= ), + DEFINE_PROP_BIT("big-endian", PFlashCFI01, features, PFLASH_BE, 0), + DEFINE_PROP_BIT("secure", PFlashCFI01, features, PFLASH_SECURE, 0), + DEFINE_PROP_UINT16("id0", PFlashCFI01, ident0, 0), + DEFINE_PROP_UINT16("id1", PFlashCFI01, ident1, 0), + DEFINE_PROP_UINT16("id2", PFlashCFI01, ident2, 0), + DEFINE_PROP_UINT16("id3", PFlashCFI01, ident3, 0), + DEFINE_PROP_STRING("name", PFlashCFI01, name), + DEFINE_PROP_BOOL("old-multiple-chip-handling", PFlashCFI01, old_multiple_chip_handling, false), DEFINE_PROP_END_OF_LIST(), }; @@ -917,7 +918,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass,= void *data) static const TypeInfo pflash_cfi01_info =3D { .name =3D TYPE_CFI_PFLASH01, .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_size =3D sizeof(struct pflash_t), + .instance_size =3D sizeof(PFlashCFI01), .class_init =3D pflash_cfi01_class_init, }; =20 @@ -928,13 +929,15 @@ static void pflash_cfi01_register_types(void) =20 type_init(pflash_cfi01_register_types) =20 -pflash_t *pflash_cfi01_register(hwaddr base, - DeviceState *qdev, const char *name, - hwaddr size, - BlockBackend *blk, - uint32_t sector_len, int nb_blocs, - int bank_width, uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, int be) +PFlashCFI01 *pflash_cfi01_register(hwaddr base, + DeviceState *qdev, const char *name, + hwaddr size, + BlockBackend *blk, + uint32_t sector_len, int nb_blocs, + int bank_width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + int be) { DeviceState *dev =3D qdev_create(NULL, TYPE_CFI_PFLASH01); =20 @@ -956,14 +959,14 @@ pflash_t *pflash_cfi01_register(hwaddr base, return CFI_PFLASH01(dev); } =20 -MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl) +MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl) { return &fl->mem; } =20 static void postload_update_cb(void *opaque, int running, RunState state) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; =20 /* This is called after bdrv_invalidate_cache_all. */ qemu_del_vm_change_state_handler(pfl->vmstate); @@ -975,7 +978,7 @@ static void postload_update_cb(void *opaque, int runnin= g, RunState state) =20 static int pflash_post_load(void *opaque, int version_id) { - pflash_t *pfl =3D opaque; + PFlashCFI01 *pfl =3D opaque; =20 if (!pfl->ro) { pfl->vmstate =3D qemu_add_vm_change_state_handler(postload_update_= cb, diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 0f8b7b8c7b..9f8486e4cf 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -57,9 +57,10 @@ do { = \ =20 #define PFLASH_LAZY_ROMD_THRESHOLD 42 =20 -#define CFI_PFLASH02(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH02) +#define CFI_PFLASH02(obj) \ + OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02) =20 -struct pflash_t { +struct PFlashCFI02 { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -101,7 +102,7 @@ struct pflash_t { /* * Set up replicated mappings of the same region. */ -static void pflash_setup_mappings(pflash_t *pfl) +static void pflash_setup_mappings(PFlashCFI02 *pfl) { unsigned i; hwaddr size =3D memory_region_size(&pfl->orig_mem); @@ -115,7 +116,7 @@ static void pflash_setup_mappings(pflash_t *pfl) } } =20 -static void pflash_register_memory(pflash_t *pfl, int rom_mode) +static void pflash_register_memory(PFlashCFI02 *pfl, int rom_mode) { memory_region_rom_device_set_romd(&pfl->orig_mem, rom_mode); pfl->rom_mode =3D rom_mode; @@ -123,7 +124,7 @@ static void pflash_register_memory(pflash_t *pfl, int r= om_mode) =20 static void pflash_timer (void *opaque) { - pflash_t *pfl =3D opaque; + PFlashCFI02 *pfl =3D opaque; =20 trace_pflash_timer_expired(pfl->cmd); /* Reset flash */ @@ -137,8 +138,8 @@ static void pflash_timer (void *opaque) pfl->cmd =3D 0; } =20 -static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, - int width, int be) +static uint32_t pflash_read(PFlashCFI02 *pfl, hwaddr offset, + int width, int be) { hwaddr boff; uint32_t ret; @@ -246,7 +247,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offs= et, } =20 /* update flash content on disk */ -static void pflash_update(pflash_t *pfl, int offset, +static void pflash_update(PFlashCFI02 *pfl, int offset, int size) { int offset_end; @@ -260,8 +261,8 @@ static void pflash_update(pflash_t *pfl, int offset, } } =20 -static void pflash_write (pflash_t *pfl, hwaddr offset, - uint32_t value, int width, int be) +static void pflash_write(PFlashCFI02 *pfl, hwaddr offset, + uint32_t value, int width, int be) { hwaddr boff; uint8_t *p; @@ -533,7 +534,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le =3D { =20 static void pflash_cfi02_realize(DeviceState *dev, Error **errp) { - pflash_t *pfl =3D CFI_PFLASH02(dev); + PFlashCFI02 *pfl =3D CFI_PFLASH02(dev); uint32_t chip_len; int ret; Error *local_err =3D NULL; @@ -679,19 +680,19 @@ static void pflash_cfi02_realize(DeviceState *dev, Er= ror **errp) } =20 static Property pflash_cfi02_properties[] =3D { - DEFINE_PROP_DRIVE("drive", struct pflash_t, blk), - DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0), - DEFINE_PROP_UINT32("sector-length", struct pflash_t, sector_len, 0), - DEFINE_PROP_UINT8("width", struct pflash_t, width, 0), - DEFINE_PROP_UINT8("mappings", struct pflash_t, mappings, 0), - DEFINE_PROP_UINT8("big-endian", struct pflash_t, be, 0), - DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0), - DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0), - DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0), - DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0), - DEFINE_PROP_UINT16("unlock-addr0", struct pflash_t, unlock_addr0, 0), - DEFINE_PROP_UINT16("unlock-addr1", struct pflash_t, unlock_addr1, 0), - DEFINE_PROP_STRING("name", struct pflash_t, name), + DEFINE_PROP_DRIVE("drive", PFlashCFI02, blk), + DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, nb_blocs, 0), + DEFINE_PROP_UINT32("sector-length", PFlashCFI02, sector_len, 0), + DEFINE_PROP_UINT8("width", PFlashCFI02, width, 0), + DEFINE_PROP_UINT8("mappings", PFlashCFI02, mappings, 0), + DEFINE_PROP_UINT8("big-endian", PFlashCFI02, be, 0), + DEFINE_PROP_UINT16("id0", PFlashCFI02, ident0, 0), + DEFINE_PROP_UINT16("id1", PFlashCFI02, ident1, 0), + DEFINE_PROP_UINT16("id2", PFlashCFI02, ident2, 0), + DEFINE_PROP_UINT16("id3", PFlashCFI02, ident3, 0), + DEFINE_PROP_UINT16("unlock-addr0", PFlashCFI02, unlock_addr0, 0), + DEFINE_PROP_UINT16("unlock-addr1", PFlashCFI02, unlock_addr1, 0), + DEFINE_PROP_STRING("name", PFlashCFI02, name), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -707,7 +708,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass,= void *data) static const TypeInfo pflash_cfi02_info =3D { .name =3D TYPE_CFI_PFLASH02, .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_size =3D sizeof(struct pflash_t), + .instance_size =3D sizeof(PFlashCFI02), .class_init =3D pflash_cfi02_class_init, }; =20 @@ -718,15 +719,17 @@ static void pflash_cfi02_register_types(void) =20 type_init(pflash_cfi02_register_types) =20 -pflash_t *pflash_cfi02_register(hwaddr base, - DeviceState *qdev, const char *name, - hwaddr size, - BlockBackend *blk, uint32_t sector_len, - int nb_blocs, int nb_mappings, int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - uint16_t unlock_addr0, uint16_t unlock_add= r1, - int be) +PFlashCFI02 *pflash_cfi02_register(hwaddr base, + DeviceState *qdev, const char *name, + hwaddr size, + BlockBackend *blk, + uint32_t sector_len, int nb_blocs, + int nb_mappings, int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + uint16_t unlock_addr0, + uint16_t unlock_addr1, + int be) { DeviceState *dev =3D qdev_create(NULL, TYPE_CFI_PFLASH02); =20 diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 091e22dd60..67e55342f6 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -111,7 +111,7 @@ static void pc_system_flash_init(MemoryRegion *rom_memo= ry) char *fatal_errmsg =3D NULL; hwaddr phys_addr =3D 0x100000000ULL; int sector_bits, sector_size; - pflash_t *system_flash; + PFlashCFI01 *system_flash; MemoryRegion *flash_mem; char name[64]; void *flash_ptr; diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 7a403ef1ce..172ee033af 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1189,7 +1189,7 @@ void mips_malta_init(MachineState *machine) const char *kernel_cmdline =3D machine->kernel_cmdline; const char *initrd_filename =3D machine->initrd_filename; char *filename; - pflash_t *fl; + PFlashCFI01 *fl; MemoryRegion *system_memory =3D get_system_memory(); MemoryRegion *ram_high =3D g_new(MemoryRegion, 1); MemoryRegion *ram_low_preio =3D g_new(MemoryRegion, 1); diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index ab3e52b415..3d59a7a356 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -162,9 +162,9 @@ static void xtfpga_net_init(MemoryRegion *address_space, memory_region_add_subregion(address_space, buffers, ram); } =20 -static pflash_t *xtfpga_flash_init(MemoryRegion *address_space, - const XtfpgaBoardDesc *board, - DriveInfo *dinfo, int be) +static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space, + const XtfpgaBoardDesc *board, + DriveInfo *dinfo, int be) { SysBusDevice *s; DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); @@ -181,7 +181,7 @@ static pflash_t *xtfpga_flash_init(MemoryRegion *addres= s_space, s =3D SYS_BUS_DEVICE(dev); memory_region_add_subregion(address_space, board->flash->base, sysbus_mmio_get_region(s, 0)); - return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01"); + return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01"); } =20 static uint64_t translate_phys_addr(void *opaque, uint64_t addr) @@ -229,7 +229,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, M= achineState *machine) XtensaMxPic *mx_pic =3D NULL; qemu_irq *extints; DriveInfo *dinfo; - pflash_t *flash =3D NULL; + PFlashCFI01 *flash =3D NULL; QemuOpts *machine_opts =3D qemu_get_machine_opts(); const char *kernel_filename =3D qemu_opt_get(machine_opts, "kernel"); const char *kernel_cmdline =3D qemu_opt_get(machine_opts, "append"); diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 67c3aa329e..51d8f60c65 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -5,32 +5,41 @@ =20 #include "exec/memory.h" =20 -#define TYPE_CFI_PFLASH01 "cfi.pflash01" -#define TYPE_CFI_PFLASH02 "cfi.pflash02" - -typedef struct pflash_t pflash_t; - /* pflash_cfi01.c */ -pflash_t *pflash_cfi01_register(hwaddr base, - DeviceState *qdev, const char *name, - hwaddr size, - BlockBackend *blk, - uint32_t sector_len, int nb_blocs, int wid= th, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, int be); + +#define TYPE_CFI_PFLASH01 "cfi.pflash01" + +typedef struct PFlashCFI01 PFlashCFI01; + +PFlashCFI01 *pflash_cfi01_register(hwaddr base, + DeviceState *qdev, const char *name, + hwaddr size, + BlockBackend *blk, + uint32_t sector_len, int nb_blocs, + int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + int be); +MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); =20 /* pflash_cfi02.c */ -pflash_t *pflash_cfi02_register(hwaddr base, - DeviceState *qdev, const char *name, - hwaddr size, - BlockBackend *blk, uint32_t sector_len, - int nb_blocs, int nb_mappings, int width, - uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - uint16_t unlock_addr0, uint16_t unlock_add= r1, - int be); =20 -MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl); +#define TYPE_CFI_PFLASH02 "cfi.pflash02" + +typedef struct PFlashCFI02 PFlashCFI02; + +PFlashCFI02 *pflash_cfi02_register(hwaddr base, + DeviceState *qdev, const char *name, + hwaddr size, + BlockBackend *blk, + uint32_t sector_len, int nb_blocs, + int nb_mappings, + int width, + uint16_t id0, uint16_t id1, + uint16_t id2, uint16_t id3, + uint16_t unlock_addr0, + uint16_t unlock_addr1, + int be); =20 /* nand.c */ DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id); --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551209828263138.4939175491777; Tue, 26 Feb 2019 11:37:08 -0800 (PST) Received: from localhost ([127.0.0.1]:60237 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiXJ-0003j5-74 for importer@patchew.org; Tue, 26 Feb 2019 14:37:05 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46131) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiUy-0002GK-3p for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyiUh-00068F-CD for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:28 -0500 Received: from mx1.redhat.com ([209.132.183.28]:34946) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyiUZ-0005wJ-Go; Tue, 26 Feb 2019 14:34:17 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id F40F17F6A7; Tue, 26 Feb 2019 19:34:11 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B772019C71; Tue, 26 Feb 2019 19:34:11 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 13A4E11385D4; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:33:59 +0100 Message-Id: <20190226193408.23862-3-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Tue, 26 Feb 2019 19:34:12 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 02/11] pflash_cfi01: Do not exit() on guest aborting "write to buffer" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" When a guest tries to abort "write to buffer" (command 0xE8), we print "PFLASH: Possible BUG - Write block confirm", then exit(1). Letting the guest terminate QEMU is not a good idea. Instead, LOG_UNIMP we screwed up, then reset the device. Macro PFLASH_BUG() is now unused; delete it. Suggested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index a51ac9f399..e6d933a06d 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -49,12 +49,6 @@ #include "sysemu/sysemu.h" #include "trace.h" =20 -#define PFLASH_BUG(fmt, ...) \ -do { \ - fprintf(stderr, "PFLASH: Possible BUG - " fmt, ## __VA_ARGS__); \ - exit(1); \ -} while(0) - /* #define PFLASH_DEBUG */ #ifdef PFLASH_DEBUG #define DPRINTF(fmt, ...) \ @@ -623,8 +617,11 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, pfl->wcycle =3D 0; pfl->status |=3D 0x80; } else { - DPRINTF("%s: unknown command for \"write block\"\n", __fun= c__); - PFLASH_BUG("Write block confirm"); + qemu_log_mask(LOG_UNIMP, + "%s: Aborting write to buffer not implemented," + " the data is already written to storage!\n" + "Flash device reset into READ mode.\n", + __func__); goto reset_flash; } break; --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551209807197847.66665277549; Tue, 26 Feb 2019 11:36:47 -0800 (PST) Received: from localhost ([127.0.0.1]:60232 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiWp-0003Nv-Dh for importer@patchew.org; Tue, 26 Feb 2019 14:36:35 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46029) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiUh-00022u-D5 for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyiUf-000655-Bv for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:22 -0500 Received: from mx1.redhat.com ([209.132.183.28]:34062) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyiUV-0005v0-Q7; Tue, 26 Feb 2019 14:34:13 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 46D517D0DB; Tue, 26 Feb 2019 19:34:10 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C36DE1001DEC; Tue, 26 Feb 2019 19:34:09 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 145E711385D5; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:34:00 +0100 Message-Id: <20190226193408.23862-4-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Tue, 26 Feb 2019 19:34:10 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 03/11] pflash_cfi01: Log use of flawed "write to buffer" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Our implementation of "write to buffer" (command 0xE8) is flawed. LOG_UNIMP its use, and add some FIXME comments. Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index e6d933a06d..d381f14e3c 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -502,6 +502,10 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, break; case 0xe8: /* Write to buffer */ DPRINTF("%s: Write to buffer\n", __func__); + /* FIXME should save @offset, @width for case 1+ */ + qemu_log_mask(LOG_UNIMP, + "%s: Write to buffer emulation is flawed\n", + __func__); pfl->status |=3D 0x80; /* Ready! */ break; case 0xf0: /* Probe for AMD flash */ @@ -545,6 +549,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, /* Mask writeblock size based on device width, or bank width if * device width not specified. */ + /* FIXME check @offset, @width */ if (pfl->device_width) { value =3D extract32(value, 0, pfl->device_width * 8); } else { @@ -582,7 +587,13 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, case 2: switch (pfl->cmd) { case 0xe8: /* Block write */ + /* FIXME check @offset, @width */ if (!pfl->ro) { + /* + * FIXME writing straight to memory is *wrong*. We + * should write to a buffer, and flush it to memory + * only on confirm command (see below). + */ pflash_data_write(pfl, offset, value, width, be); } else { pfl->status |=3D 0x10; /* Programming error */ @@ -598,6 +609,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, pfl->wcycle++; if (!pfl->ro) { /* Flush the entire write buffer onto backing storage.= */ + /* FIXME premature! */ pflash_update(pfl, offset & mask, pfl->writeblock_size= ); } else { pfl->status |=3D 0x10; /* Programming error */ @@ -614,6 +626,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, switch (pfl->cmd) { case 0xe8: /* Block write */ if (cmd =3D=3D 0xd0) { + /* FIXME this is where we should write out the buffer */ pfl->wcycle =3D 0; pfl->status |=3D 0x80; } else { --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551210100428761.4659356021667; Tue, 26 Feb 2019 11:41:40 -0800 (PST) Received: from localhost ([127.0.0.1]:60322 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyibh-0007Ss-7C for importer@patchew.org; Tue, 26 Feb 2019 14:41:37 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46248) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiV2-0002Kv-Nq for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyiV0-0006Ts-Hl for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:44 -0500 Received: from mx1.redhat.com ([209.132.183.28]:47718) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyiUg-0005xB-SS; Tue, 26 Feb 2019 14:34:23 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3284F300DA73; Tue, 26 Feb 2019 19:34:13 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C265F5D6A6; Tue, 26 Feb 2019 19:34:12 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 1891011384DA; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:34:01 +0100 Message-Id: <20190226193408.23862-5-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Tue, 26 Feb 2019 19:34:13 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 04/11] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" pflash_cfi01.c and pflash_cfi02.c start their identifiers with pflash_cfi01_ and pflash_cfi02_ respectively, except for CFI_PFLASH01(), TYPE_CFI_PFLASH01, CFI_PFLASH02(), TYPE_CFI_PFLASH02. Rename for consistency. Suggested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 12 ++++++------ hw/block/pflash_cfi02.c | 12 ++++++------ include/hw/block/flash.h | 4 ++-- 3 files changed, 14 insertions(+), 14 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index d381f14e3c..f75f0a6998 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -59,8 +59,8 @@ do { = \ #define DPRINTF(fmt, ...) do { } while (0) #endif =20 -#define CFI_PFLASH01(obj) \ - OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01) +#define PFLASH_CFI01(obj) \ + OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01) =20 #define PFLASH_BE 0 #define PFLASH_SECURE 1 @@ -698,7 +698,7 @@ static const MemoryRegionOps pflash_cfi01_ops =3D { =20 static void pflash_cfi01_realize(DeviceState *dev, Error **errp) { - PFlashCFI01 *pfl =3D CFI_PFLASH01(dev); + PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); uint64_t total_len; int ret; uint64_t blocks_per_device, sector_len_per_device, device_len; @@ -926,7 +926,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass,= void *data) =20 =20 static const TypeInfo pflash_cfi01_info =3D { - .name =3D TYPE_CFI_PFLASH01, + .name =3D TYPE_PFLASH_CFI01, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(PFlashCFI01), .class_init =3D pflash_cfi01_class_init, @@ -949,7 +949,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, uint16_t id2, uint16_t id3, int be) { - DeviceState *dev =3D qdev_create(NULL, TYPE_CFI_PFLASH01); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); =20 if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); @@ -966,7 +966,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, qdev_init_nofail(dev); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return CFI_PFLASH01(dev); + return PFLASH_CFI01(dev); } =20 MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 9f8486e4cf..c0869fc417 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -57,8 +57,8 @@ do { = \ =20 #define PFLASH_LAZY_ROMD_THRESHOLD 42 =20 -#define CFI_PFLASH02(obj) \ - OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02) +#define PFLASH_CFI02(obj) \ + OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02) =20 struct PFlashCFI02 { /*< private >*/ @@ -534,7 +534,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le =3D { =20 static void pflash_cfi02_realize(DeviceState *dev, Error **errp) { - PFlashCFI02 *pfl =3D CFI_PFLASH02(dev); + PFlashCFI02 *pfl =3D PFLASH_CFI02(dev); uint32_t chip_len; int ret; Error *local_err =3D NULL; @@ -706,7 +706,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass,= void *data) } =20 static const TypeInfo pflash_cfi02_info =3D { - .name =3D TYPE_CFI_PFLASH02, + .name =3D TYPE_PFLASH_CFI02, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(PFlashCFI02), .class_init =3D pflash_cfi02_class_init, @@ -731,7 +731,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, uint16_t unlock_addr1, int be) { - DeviceState *dev =3D qdev_create(NULL, TYPE_CFI_PFLASH02); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI02); =20 if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); @@ -751,5 +751,5 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, qdev_init_nofail(dev); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return CFI_PFLASH02(dev); + return PFLASH_CFI02(dev); } diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 51d8f60c65..333005d9ff 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -7,7 +7,7 @@ =20 /* pflash_cfi01.c */ =20 -#define TYPE_CFI_PFLASH01 "cfi.pflash01" +#define TYPE_PFLASH_CFI01 "cfi.pflash01" =20 typedef struct PFlashCFI01 PFlashCFI01; =20 @@ -24,7 +24,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); =20 /* pflash_cfi02.c */ =20 -#define TYPE_CFI_PFLASH02 "cfi.pflash02" +#define TYPE_PFLASH_CFI02 "cfi.pflash02" =20 typedef struct PFlashCFI02 PFlashCFI02; =20 --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551209825052956.5896038795788; Tue, 26 Feb 2019 11:37:05 -0800 (PST) Received: from localhost ([127.0.0.1]:60234 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiX9-0003dn-Qo for importer@patchew.org; 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Tue, 26 Feb 2019 19:34:12 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 1C2511133040; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:34:02 +0100 Message-Id: <20190226193408.23862-6-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Tue, 26 Feb 2019 19:34:13 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 05/11] hw: Use PFLASH_CFI0{1, 2} and TYPE_PFLASH_CFI0{1, 2} X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We have two open-coded copies of macro PFLASH_CFI01(). Move the macro to the header, so we can ditch the copies. Move PFLASH_CFI02() to the header for symmetry. We define macros TYPE_PFLASH_CFI01 and TYPE_PFLASH_CFI02 for type name strings, then mostly use the strings. If the macros are worth defining, they are worth using. Replace the strings by the macros. Signed-off-by: Markus Armbruster Reviewed-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e --- hw/arm/vexpress.c | 4 ++-- hw/arm/virt.c | 3 ++- hw/block/pflash_cfi01.c | 3 --- hw/block/pflash_cfi02.c | 3 --- hw/xtensa/xtfpga.c | 4 ++-- include/hw/block/flash.h | 4 ++++ 6 files changed, 10 insertions(+), 11 deletions(-) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index ed46d2e730..f07134c424 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -515,7 +515,7 @@ static void vexpress_modify_dtb(const struct arm_boot_i= nfo *info, void *fdt) static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, DriveInfo *di) { - DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); =20 if (di) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(di), @@ -536,7 +536,7 @@ static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr bas= e, const char *name, qdev_init_nofail(dev); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01"); + return PFLASH_CFI01(dev); } =20 static void vexpress_common_init(MachineState *machine) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 99c2b6e60d..f2e5fc1ce1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -34,6 +34,7 @@ #include "hw/arm/arm.h" #include "hw/arm/primecell.h" #include "hw/arm/virt.h" +#include "hw/block/flash.h" #include "hw/vfio/vfio-calxeda-xgmac.h" #include "hw/vfio/vfio-amd-xgbe.h" #include "hw/display/ramfb.h" @@ -874,7 +875,7 @@ static void create_one_flash(const char *name, hwaddr f= lashbase, * parameters as the flash devices on the Versatile Express board. */ DriveInfo *dinfo =3D drive_get_next(IF_PFLASH); - DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); const uint64_t sectorlength =3D 256 * 1024; =20 diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index f75f0a6998..1c99aa6e4a 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -59,9 +59,6 @@ do { = \ #define DPRINTF(fmt, ...) do { } while (0) #endif =20 -#define PFLASH_CFI01(obj) \ - OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01) - #define PFLASH_BE 0 #define PFLASH_SECURE 1 =20 diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index c0869fc417..5ef40154b9 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -57,9 +57,6 @@ do { = \ =20 #define PFLASH_LAZY_ROMD_THRESHOLD 42 =20 -#define PFLASH_CFI02(obj) \ - OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02) - struct PFlashCFI02 { /*< private >*/ SysBusDevice parent_obj; diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 3d59a7a356..e05ef75a75 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -167,7 +167,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *add= ress_space, DriveInfo *dinfo, int be) { SysBusDevice *s; - DeviceState *dev =3D qdev_create(NULL, "cfi.pflash01"); + DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); =20 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo), &error_abort); @@ -181,7 +181,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *add= ress_space, s =3D SYS_BUS_DEVICE(dev); memory_region_add_subregion(address_space, board->flash->base, sysbus_mmio_get_region(s, 0)); - return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01"); + return PFLASH_CFI01(dev); } =20 static uint64_t translate_phys_addr(void *opaque, uint64_t addr) diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 333005d9ff..aeea3ca99d 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -8,6 +8,8 @@ /* pflash_cfi01.c */ =20 #define TYPE_PFLASH_CFI01 "cfi.pflash01" +#define PFLASH_CFI01(obj) \ + OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01) =20 typedef struct PFlashCFI01 PFlashCFI01; =20 @@ -25,6 +27,8 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); /* pflash_cfi02.c */ =20 #define TYPE_PFLASH_CFI02 "cfi.pflash02" +#define PFLASH_CFI02(obj) \ + OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02) =20 typedef struct PFlashCFI02 PFlashCFI02; =20 --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551210020077442.9648345684783; Tue, 26 Feb 2019 11:40:20 -0800 (PST) Received: from localhost ([127.0.0.1]:60276 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiaK-0006GH-2H for importer@patchew.org; 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Tue, 26 Feb 2019 19:34:12 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 217931133056; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:34:03 +0100 Message-Id: <20190226193408.23862-7-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Tue, 26 Feb 2019 19:34:13 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Machine "sam460ex" maps its flash memory at address 0xFFF00000. When no image is supplied, its size is 1MiB (0x100000), and 512KiB of ROM get mapped on top of its second half. Else, it's the size of the image rounded up to the next multiple of 64KiB. The rounding is actually useless: pflash_cfi01_realize() fails with "failed to read the initial flash content" unless it's a no-op. I have no idea what happens when the pflash's size exceeds 1MiB. Useful outcomes seem unlikely. I guess memory at the end of the address space remains unmapped when it's smaller than 1MiB. Again, useful outcomes seem unlikely. The physical hardware appears to have 512KiB of flash memory: https://eu.mouser.com/datasheet/2/268/atmel_AT49BV040B-1180330.pdf For now, just set the flash memory size to 1MiB regardless of image size, and document the mess. Cc: BALATON Zoltan Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e Reviewed-by: BALATON Zoltan --- hw/ppc/sam460ex.c | 41 ++++++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 75250d49e4..0c919529f8 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -91,32 +91,43 @@ struct boot_info { =20 static int sam460ex_load_uboot(void) { + /* + * This first creates 1MiB of flash memory mapped at the end of + * the 32-bit address space (0xFFF00000..0xFFFFFFFF). + * + * If_PFLASH unit 0 is defined, the flash memory is initialized + * from that block backend. + * + * Else, it's initialized to zero. And then 512KiB of ROM get + * mapped on top of its second half (0xFFF80000..0xFFFFFFFF), + * initialized from u-boot-sam460-20100605.bin. + * + * This doesn't smell right. + * + * The physical hardware appears to have 512KiB flash memory. + * + * TODO Figure out what we really need here, and clean this up. + */ + DriveInfo *dinfo; - BlockBackend *blk =3D NULL; - hwaddr base =3D FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32); - long bios_size =3D FLASH_SIZE; - int fl_sectors; =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); - if (dinfo) { - blk =3D blk_by_legacy_dinfo(dinfo); - bios_size =3D blk_getlength(blk); - } - fl_sectors =3D (bios_size + 65535) >> 16; - - if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size, - blk, 64 * KiB, fl_sectors, + if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32), + NULL, "sam460ex.flash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, FLASH_SIZE / (64 * KiB), 1, 0x89, 0x18, 0x0000, 0x0, 1)) { error_report("Error registering flash memory"); /* XXX: return an error instead? */ exit(1); } =20 - if (!blk) { + if (!dinfo) { /*error_report("No flash image given with the 'pflash' parameter," " using default u-boot image");*/ - base =3D UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32); - rom_add_file_fixed(UBOOT_FILENAME, base, -1); + rom_add_file_fixed(UBOOT_FILENAME, + UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32), + -1); } =20 return 0; --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551210217809726.3641270231595; Tue, 26 Feb 2019 11:43:37 -0800 (PST) Received: from localhost ([127.0.0.1]:60354 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyida-0000eQ-Oi for importer@patchew.org; Tue, 26 Feb 2019 14:43:34 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46256) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiV3-0002LI-2M for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyiV0-0006Th-IN for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:44 -0500 Received: from mx1.redhat.com ([209.132.183.28]:1346) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyiUg-000614-0M; Tue, 26 Feb 2019 14:34:22 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D8C497C84A; Tue, 26 Feb 2019 19:34:16 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 75A495D6AA; Tue, 26 Feb 2019 19:34:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 25159113305C; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:34:04 +0100 Message-Id: <20190226193408.23862-8-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Tue, 26 Feb 2019 19:34:17 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 07/11] ppc405_boards: Don't size flash memory to match backing image X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Machine "ref405ep" maps its flash memory at address 2^32 - image size. Image size is rounded up to the next multiple of 64KiB. Useless, because pflash_cfi02_realize() fails with "failed to read the initial flash content" unless the rounding is a no-op. If the image size exceeds 0x80000 Bytes, we overlap first SRAM, then other stuff. No idea how that would play out, but a useful outcomes seem unlikely. Map the flash memory at fixed address 0xFFF80000 with size 512KiB, regardless of image size, to match the physical hardware. Machine "taihu" maps its boot flash memory similarly. The code even has a comment /* XXX: should check that size is 2MB */, followed by disabled code to adjust the size to 2MiB regardless of image size. Its code to map its application flash memory looks the same, except there the XXX comment asks for 32MiB, and the code to adjust the size isn't disabled. Note that pflash_cfi02_realize() fails with "failed to read the initial flash content" for images smaller than 32MiB. Map the boot flash memory at fixed address 0xFFE00000 with size 2MiB, to match the physical hardware. Delete dead code from application flash mapping, and simplify some. Cc: David Gibson Signed-off-by: Markus Armbruster Acked-by: David Gibson Reviewed-by: Alex Benn=C3=A9e --- hw/ppc/ppc405_boards.c | 51 +++++++++++++----------------------------- 1 file changed, 15 insertions(+), 36 deletions(-) diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index f47b15f10e..672717ef1b 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -158,7 +158,7 @@ static void ref405ep_init(MachineState *machine) target_ulong kernel_base, initrd_base; long kernel_size, initrd_size; int linux_boot; - int fl_idx, fl_sectors, len; + int len; DriveInfo *dinfo; MemoryRegion *sysmem =3D get_system_memory(); =20 @@ -185,26 +185,19 @@ static void ref405ep_init(MachineState *machine) #ifdef DEBUG_BOARD_INIT printf("%s: register BIOS\n", __func__); #endif - fl_idx =3D 0; #ifdef USE_FLASH_BIOS - dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); + dinfo =3D drive_get(IF_PFLASH, 0, 0); if (dinfo) { - BlockBackend *blk =3D blk_by_legacy_dinfo(dinfo); - - bios_size =3D blk_getlength(blk); - fl_sectors =3D (bios_size + 65535) >> 16; #ifdef DEBUG_BOARD_INIT - printf("Register parallel flash %d size %lx" - " at addr %lx '%s' %d\n", - fl_idx, bios_size, -bios_size, - blk_name(blk), fl_sectors); + printf("Register parallel flash\n"); #endif + bios_size =3D 8 * MiB; pflash_cfi02_register((uint32_t)(-bios_size), NULL, "ef405ep.bios", bios_size, - blk, 65536, fl_sectors, 1, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, bios_size / (64 * KiB), 1, 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); - fl_idx++; } else #endif { @@ -455,7 +448,7 @@ static void taihu_405ep_init(MachineState *machine) target_ulong kernel_base, initrd_base; long kernel_size, initrd_size; int linux_boot; - int fl_idx, fl_sectors; + int fl_idx; DriveInfo *dinfo; =20 /* RAM is soldered to the board so the size cannot be changed */ @@ -486,21 +479,14 @@ static void taihu_405ep_init(MachineState *machine) #if defined(USE_FLASH_BIOS) dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); if (dinfo) { - BlockBackend *blk =3D blk_by_legacy_dinfo(dinfo); - - bios_size =3D blk_getlength(blk); - /* XXX: should check that size is 2MB */ - // bios_size =3D 2 * 1024 * 1024; - fl_sectors =3D (bios_size + 65535) >> 16; #ifdef DEBUG_BOARD_INIT - printf("Register parallel flash %d size %lx" - " at addr %lx '%s' %d\n", - fl_idx, bios_size, -bios_size, - blk_name(blk), fl_sectors); + printf("Register boot flash\n"); #endif - pflash_cfi02_register((uint32_t)(-bios_size), + bios_size =3D 2 * MiB; + pflash_cfi02_register(0xFFE00000, NULL, "taihu_405ep.bios", bios_size, - blk, 65536, fl_sectors, 1, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, bios_size / (64 * KiB), 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; @@ -536,20 +522,13 @@ static void taihu_405ep_init(MachineState *machine) /* Register Linux flash */ dinfo =3D drive_get(IF_PFLASH, 0, fl_idx); if (dinfo) { - BlockBackend *blk =3D blk_by_legacy_dinfo(dinfo); - - bios_size =3D blk_getlength(blk); - /* XXX: should check that size is 32MB */ bios_size =3D 32 * MiB; - fl_sectors =3D (bios_size + 65535) >> 16; #ifdef DEBUG_BOARD_INIT - printf("Register parallel flash %d size %lx" - " at addr " TARGET_FMT_lx " '%s'\n", - fl_idx, bios_size, (target_ulong)0xfc000000, - blk_name(blk)); + printf("Register application flash\n" #endif pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_= size, - blk, 65536, fl_sectors, 1, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, bios_size / (64 * KiB), 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551210024573922.0654030861868; Tue, 26 Feb 2019 11:40:24 -0800 (PST) Received: from localhost ([127.0.0.1]:60280 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiaS-0006MM-Jc for importer@patchew.org; Tue, 26 Feb 2019 14:40:20 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46390) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiVL-0002cP-So for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:35:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyiV8-0006dj-8r for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:54 -0500 Received: from mx1.redhat.com ([209.132.183.28]:34868) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyiUy-0006CE-Fu; Tue, 26 Feb 2019 14:34:42 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8AE8189AC6; Tue, 26 Feb 2019 19:34:26 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5454419C71; Tue, 26 Feb 2019 19:34:25 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 28759113303F; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:34:05 +0100 Message-Id: <20190226193408.23862-9-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Tue, 26 Feb 2019 19:34:26 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 08/11] r2d: Flash memory creation is confused about size, mark FIXME X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, Magnus Damm , mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" pflash_cfi02_register() takes a size in bytes, a block size in bytes and a number of blocks. r2d_init() passes FLASH_SIZE, 16 * KiB, FLASH_SIZE >> 16. Does not compute: size doesn't match block size * number of blocks. The latter happens to win. I tried to find documentation on the physical hardware, no luck. For now, adjust the byte size passed to match the actual size created, and add a FIXME comment. Cc: Magnus Damm Signed-off-by: Markus Armbruster --- hw/sh4/r2d.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index dcdb3728cb..ed18d1f351 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -290,7 +290,14 @@ static void r2d_init(MachineState *machine) =20 /* onboard flash memory */ dinfo =3D drive_get(IF_PFLASH, 0, 0); - pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE, + /* + * FIXME The code is confused about the size of the flash. It + * used to pass FLASH_SIZE bytes, in FLASH_SIZE >> 16 blocks of + * 16KiB each, which does not compute, but creates one of + * FLASH_SIZE / 4 bytes anyway. The current code does so too, but + * whether it's the right size is anybody's guess. + */ + pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE / 4, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 16 * KiB, FLASH_SIZE >> 16, 1, 4, 0x0000, 0x0000, 0x0000, 0x0000, --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551209850839472.1223330099432; Tue, 26 Feb 2019 11:37:30 -0800 (PST) Received: from localhost ([127.0.0.1]:60239 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiXf-00041l-Nq for importer@patchew.org; Tue, 26 Feb 2019 14:37:27 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46176) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiV0-0002IV-EJ for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyiUu-0006M9-Ob for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:40 -0500 Received: from mx1.redhat.com ([209.132.183.28]:34142) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyiUf-00061p-Cc; Tue, 26 Feb 2019 14:34:21 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C51F77C84B; Tue, 26 Feb 2019 19:34:17 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 84E4269190; Tue, 26 Feb 2019 19:34:17 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 2CF411132EC4; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:34:06 +0100 Message-Id: <20190226193408.23862-10-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Tue, 26 Feb 2019 19:34:17 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 09/11] mips_malta: Clean up definition of flash memory size somewhat X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, Aleksandar Rikalo , alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" pflash_cfi01_register() takes a size in bytes, a block size in bytes and a number of blocks. mips_malta_init() passes BIOS_SIZE, 65536, FLASH_SIZE >> 16. Actually consistent only because BIOS_SIZE (defined in include/hw/mips/bios.h as (4 * MiB)) matches FLASH_SIZE (defined locally as 0x400000). Confusing all the same. Pass FLASH_SIZE instead of BIOS_SIZE. There are more uses of BIOS_SIZE, but I don't sufficiently understand them to attempt cleanup. Cc: Aurelien Jarno Cc: Aleksandar Rikalo Signed-off-by: Markus Armbruster Reviewed-by: Alex Benn=C3=A9e --- hw/mips/mips_malta.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 172ee033af..c2a5c65a24 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1269,12 +1269,12 @@ void mips_malta_init(MachineState *machine) if (dinfo) { printf("Register parallel flash %d size " TARGET_FMT_lx " at " "addr %08llx '%s' %x\n", - fl_idx, bios_size, FLASH_ADDRESS, + fl_idx, FLASH_SIZE, FLASH_ADDRESS, blk_name(dinfo->bdrv), fl_sectors); } #endif fl =3D pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios", - BIOS_SIZE, + FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 65536, fl_sectors, 4, 0x0000, 0x0000, 0x0000, 0x0000, be); --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551210313736844.3956983124484; Tue, 26 Feb 2019 11:45:13 -0800 (PST) Received: from localhost ([127.0.0.1]:60382 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyif8-0001iT-N9 for importer@patchew.org; Tue, 26 Feb 2019 14:45:10 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46334) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiV9-0002R4-SQ for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyiV0-0006UV-PZ for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:48 -0500 Received: from mx1.redhat.com ([209.132.183.28]:42322) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyiUg-00061y-5n; Tue, 26 Feb 2019 14:34:22 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2670C316E901; Tue, 26 Feb 2019 19:34:18 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 644DC19C77; Tue, 26 Feb 2019 19:34:17 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 308861132D3C; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:34:07 +0100 Message-Id: <20190226193408.23862-11-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Tue, 26 Feb 2019 19:34:18 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 10/11] pflash: Clean up after commit 368a354f02b part 1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" QOMification left parameter @qdev unused in pflash_cfi01_register() and pflash_cfi02_register(). All callers pass NULL. Remove. Signed-off-by: Markus Armbruster Reviewed-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/collie.c | 4 ++-- hw/arm/digic_boards.c | 2 +- hw/arm/gumstix.c | 4 ++-- hw/arm/mainstone.c | 2 +- hw/arm/musicpal.c | 4 ++-- hw/arm/omap_sx1.c | 4 ++-- hw/arm/versatilepb.c | 2 +- hw/arm/xilinx_zynq.c | 2 +- hw/arm/z2.c | 3 +-- hw/block/pflash_cfi01.c | 2 +- hw/block/pflash_cfi02.c | 2 +- hw/i386/pc_sysfw.c | 2 +- hw/lm32/lm32_boards.c | 4 ++-- hw/lm32/milkymist.c | 2 +- hw/microblaze/petalogix_ml605_mmu.c | 3 +-- hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +- hw/mips/mips_malta.c | 2 +- hw/mips/mips_r4k.c | 2 +- hw/ppc/ppc405_boards.c | 6 +++--- hw/ppc/sam460ex.c | 2 +- hw/ppc/virtex_ml507.c | 2 +- hw/sh4/r2d.c | 2 +- include/hw/block/flash.h | 4 ++-- 23 files changed, 31 insertions(+), 33 deletions(-) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index 48b732c176..cbc4400f8e 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -36,12 +36,12 @@ static void collie_init(MachineState *machine) s =3D sa1110_init(sysmem, collie_binfo.ram_size, machine->cpu_type); =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(SA_CS0, NULL, "collie.fl1", 0x02000000, + pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); =20 dinfo =3D drive_get(IF_PFLASH, 0, 1); - pflash_cfi01_register(SA_CS1, NULL, "collie.fl2", 0x02000000, + pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); =20 diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index 9f11dcd11f..15a00a1be3 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -129,7 +129,7 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *= s, hwaddr addr, #define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024) #define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024) =20 - pflash_cfi02_register(addr, NULL, "pflash", FLASH_K8P3215UQB_SIZE, + pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE, NULL, FLASH_K8P3215UQB_SECTOR_SIZE, FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_= SIZE, DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE, diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c index 56cb763c4e..304dbeab2f 100644 --- a/hw/arm/gumstix.c +++ b/hw/arm/gumstix.c @@ -72,7 +72,7 @@ static void connex_init(MachineState *machine) #else be =3D 0; #endif - if (!pflash_cfi01_register(0x00000000, NULL, "connext.rom", connex_rom, + if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, sector_len, connex_rom / sector_len, 2, 0, 0, 0, 0, be)) { @@ -109,7 +109,7 @@ static void verdex_init(MachineState *machine) #else be =3D 0; #endif - if (!pflash_cfi01_register(0x00000000, NULL, "verdex.rom", verdex_rom, + if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, sector_len, verdex_rom / sector_len, 2, 0, 0, 0, 0, be)) { diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index 0beb5c426b..2a1c1072db 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -148,7 +148,7 @@ static void mainstone_common_init(MemoryRegion *address= _space_mem, exit(1); } =20 - if (!pflash_cfi01_register(mainstone_flash_base[i], NULL, + if (!pflash_cfi01_register(mainstone_flash_base[i], i ? "mainstone.flash1" : "mainstone.fla= sh0", MAINSTONE_FLASH, blk_by_legacy_dinfo(dinfo), diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index d22532a11c..cc780dfb37 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1636,14 +1636,14 @@ static void musicpal_init(MachineState *machine) * image is smaller than 32 MB. */ #ifdef TARGET_WORDS_BIGENDIAN - pflash_cfi02_register(0x100000000ULL-MP_FLASH_SIZE_MAX, NULL, + pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, "musicpal.flash", flash_size, blk, 0x10000, (flash_size + 0xffff) >> 16, MP_FLASH_SIZE_MAX / flash_size, 2, 0x00BF, 0x236D, 0x0000, 0x0000, 0x5555, 0x2AAA, 1); #else - pflash_cfi02_register(0x100000000ULL-MP_FLASH_SIZE_MAX, NULL, + pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, "musicpal.flash", flash_size, blk, 0x10000, (flash_size + 0xffff) >> 16, MP_FLASH_SIZE_MAX / flash_size, diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index 84550f0236..b1128777cf 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -152,7 +152,7 @@ static void sx1_init(MachineState *machine, const int v= ersion) #endif =20 if ((dinfo =3D drive_get(IF_PFLASH, 0, fl_idx)) !=3D NULL) { - if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL, + if (!pflash_cfi01_register(OMAP_CS0_BASE, "omap_sx1.flash0-1", flash_size, blk_by_legacy_dinfo(dinfo), sector_size, flash_size / sector_size, @@ -176,7 +176,7 @@ static void sx1_init(MachineState *machine, const int v= ersion) memory_region_add_subregion(address_space, OMAP_CS1_BASE + flash1_size, &cs[1]); =20 - if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL, + if (!pflash_cfi01_register(OMAP_CS1_BASE, "omap_sx1.flash1-1", flash1_size, blk_by_legacy_dinfo(dinfo), sector_size, flash1_size / sector_size, diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 22b09a1e61..82c5277462 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -365,7 +365,7 @@ static void versatile_init(MachineState *machine, int b= oard_id) /* 0x34000000 NOR Flash */ =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); - if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, NULL, "versatile.flas= h", + if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, "versatile.flash", VERSATILE_FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, VERSATILE_FLASH_SECT_SIZE, diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 57497b0c4d..1fa4a77728 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -205,7 +205,7 @@ static void zynq_init(MachineState *machine) DriveInfo *dinfo =3D drive_get(IF_PFLASH, 0, 0); =20 /* AMD */ - pflash_cfi02_register(0xe2000000, NULL, "zynq.pflash", FLASH_SIZE, + pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, FLASH_SECTOR_SIZE, FLASH_SIZE/FLASH_SECTOR_SIZE, 1, diff --git a/hw/arm/z2.c b/hw/arm/z2.c index 697a822f1e..54e6caee9f 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -324,8 +324,7 @@ static void z2_init(MachineState *machine) exit(1); } =20 - if (!pflash_cfi01_register(Z2_FLASH_BASE, - NULL, "z2.flash0", Z2_FLASH_SIZE, + if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, sector_len, Z2_FLASH_SIZE / sector_len, 4, 0, 0, 0, 0, be)) { diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 1c99aa6e4a..bd42487c0a 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -937,7 +937,7 @@ static void pflash_cfi01_register_types(void) type_init(pflash_cfi01_register_types) =20 PFlashCFI01 *pflash_cfi01_register(hwaddr base, - DeviceState *qdev, const char *name, + const char *name, hwaddr size, BlockBackend *blk, uint32_t sector_len, int nb_blocs, diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 5ef40154b9..c261ebff72 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -717,7 +717,7 @@ static void pflash_cfi02_register_types(void) type_init(pflash_cfi02_register_types) =20 PFlashCFI02 *pflash_cfi02_register(hwaddr base, - DeviceState *qdev, const char *name, + const char *name, hwaddr size, BlockBackend *blk, uint32_t sector_len, int nb_blocs, diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 67e55342f6..9a5be54a85 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -160,7 +160,7 @@ static void pc_system_flash_init(MemoryRegion *rom_memo= ry) =20 /* pflash_cfi01_register() creates a deep copy of the name */ snprintf(name, sizeof name, "system.flash%d", unit); - system_flash =3D pflash_cfi01_register(phys_addr, NULL /* qdev */,= name, + system_flash =3D pflash_cfi01_register(phys_addr, name, size, blk, sector_size, size >> sector_bits, 1 /* width */, diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index 05157f8eab..f726355309 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -114,7 +114,7 @@ static void lm32_evr_init(MachineState *machine) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); /* Spansion S29NS128P */ - pflash_cfi02_register(flash_base, NULL, "lm32_evr.flash", flash_size, + pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, flash_sector_size, flash_size / flash_sector_siz= e, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); @@ -207,7 +207,7 @@ static void lm32_uclinux_init(MachineState *machine) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); /* Spansion S29NS128P */ - pflash_cfi02_register(flash_base, NULL, "lm32_uclinux.flash", flash_si= ze, + pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, flash_sector_size, flash_size / flash_sector_siz= e, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c index b080cf1ca9..ece7e3b699 100644 --- a/hw/lm32/milkymist.c +++ b/hw/lm32/milkymist.c @@ -121,7 +121,7 @@ milkymist_init(MachineState *machine) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); /* Numonyx JS28F256J3F105 */ - pflash_cfi01_register(flash_base, NULL, "milkymist.flash", flash_size, + pflash_cfi01_register(flash_base, "milkymist.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, flash_sector_size, flash_size / flash_sector_siz= e, 2, 0x00, 0x89, 0x00, 0x1d, 1); diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_= ml605_mmu.c index c730878d25..74bcc14cda 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -107,8 +107,7 @@ petalogix_ml605_init(MachineState *machine) dinfo =3D drive_get(IF_PFLASH, 0, 0); /* 5th parameter 2 means bank-width * 10th paremeter 0 means little-endian */ - pflash_cfi01_register(FLASH_BASEADDR, - NULL, "petalogix_ml605.flash", FLASH_SIZE, + pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_S= IZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, FLASH_SIZE >> 16, 2, 0x89, 0x18, 0x0000, 0x0, 0); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petal= ogix_s3adsp1800_mmu.c index b9f0b0d06e..a07b7f8edf 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -88,7 +88,7 @@ petalogix_s3adsp1800_init(MachineState *machine) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); pflash_cfi01_register(FLASH_BASEADDR, - NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE, + "petalogix_s3adsp1800.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, FLASH_SIZE >> 16, 1, 0x89, 0x18, 0x0000, 0x0, 1); diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index c2a5c65a24..fdf1434b28 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1273,7 +1273,7 @@ void mips_malta_init(MachineState *machine) blk_name(dinfo->bdrv), fl_sectors); } #endif - fl =3D pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios", + fl =3D pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 65536, fl_sectors, diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index a015a6d14e..0b9df466e7 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -235,7 +235,7 @@ void mips_r4k_init(MachineState *machine) load_image_targphys(filename, 0x1fc00000, BIOS_SIZE); } else if ((dinfo =3D drive_get(IF_PFLASH, 0, 0)) !=3D NULL) { uint32_t mips_rom =3D 0x00400000; - if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips= _rom, + if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom, blk_by_legacy_dinfo(dinfo), sector_len, mips_rom / sector_len, 4, 0, 0, 0, 0, be)) { diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 672717ef1b..dfaea45898 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -193,7 +193,7 @@ static void ref405ep_init(MachineState *machine) #endif bios_size =3D 8 * MiB; pflash_cfi02_register((uint32_t)(-bios_size), - NULL, "ef405ep.bios", bios_size, + "ef405ep.bios", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, bios_size / (64 * KiB), 1, 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, @@ -484,7 +484,7 @@ static void taihu_405ep_init(MachineState *machine) #endif bios_size =3D 2 * MiB; pflash_cfi02_register(0xFFE00000, - NULL, "taihu_405ep.bios", bios_size, + "taihu_405ep.bios", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, bios_size / (64 * KiB), 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, @@ -526,7 +526,7 @@ static void taihu_405ep_init(MachineState *machine) #ifdef DEBUG_BOARD_INIT printf("Register application flash\n" #endif - pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_= size, + pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, bios_size / (64 * KiB), 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 0c919529f8..ad36cb12c8 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -113,7 +113,7 @@ static int sam460ex_load_uboot(void) =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32), - NULL, "sam460ex.flash", FLASH_SIZE, + "sam460ex.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, FLASH_SIZE / (64 * KiB), 1, 0x89, 0x18, 0x0000, 0x0, 1)) { diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index 5a711cb3d9..d2085a839c 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -227,7 +227,7 @@ static void virtex_init(MachineState *machine) memory_region_add_subregion(address_space_mem, ram_base, phys_ram); =20 dinfo =3D drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZ= E, + pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, FLASH_SIZE >> 16, 1, 0x89, 0x18, 0x0000, 0x0, 1); diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index ed18d1f351..abd3b67c28 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -297,7 +297,7 @@ static void r2d_init(MachineState *machine) * FLASH_SIZE / 4 bytes anyway. The current code does so too, but * whether it's the right size is anybody's guess. */ - pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE / 4, + pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE / 4, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 16 * KiB, FLASH_SIZE >> 16, 1, 4, 0x0000, 0x0000, 0x0000, 0x0000, diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index aeea3ca99d..3e48901c84 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -14,7 +14,7 @@ typedef struct PFlashCFI01 PFlashCFI01; =20 PFlashCFI01 *pflash_cfi01_register(hwaddr base, - DeviceState *qdev, const char *name, + const char *name, hwaddr size, BlockBackend *blk, uint32_t sector_len, int nb_blocs, @@ -33,7 +33,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl); typedef struct PFlashCFI02 PFlashCFI02; =20 PFlashCFI02 *pflash_cfi02_register(hwaddr base, - DeviceState *qdev, const char *name, + const char *name, hwaddr size, BlockBackend *blk, uint32_t sector_len, int nb_blocs, --=20 2.17.2 From nobody Sun Nov 9 12:52:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551210387566915.2320754359366; Tue, 26 Feb 2019 11:46:27 -0800 (PST) Received: from localhost ([127.0.0.1]:60418 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyigJ-0002NS-HJ for importer@patchew.org; Tue, 26 Feb 2019 14:46:23 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46331) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyiV9-0002R1-SO for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyiV0-0006Uw-Uy for qemu-devel@nongnu.org; Tue, 26 Feb 2019 14:34:48 -0500 Received: from mx1.redhat.com ([209.132.183.28]:36014) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyiUf-0005yw-L8; Tue, 26 Feb 2019 14:34:22 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 22AD412893; Tue, 26 Feb 2019 19:34:15 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-92.ams2.redhat.com [10.36.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 86B015D6A6; Tue, 26 Feb 2019 19:34:14 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 342FB1132D3F; Tue, 26 Feb 2019 20:34:08 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 20:34:08 +0100 Message-Id: <20190226193408.23862-12-armbru@redhat.com> In-Reply-To: <20190226193408.23862-1-armbru@redhat.com> References: <20190226193408.23862-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Tue, 26 Feb 2019 19:34:15 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, qemu-block@nongnu.org, alex.bennee@linaro.org, mreitz@redhat.com, qemu-ppc@nongnu.org, lersek@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" QOMification left parameter @size unused in pflash_cfi01_register() and pflash_cfi02_register(). Obviously, @size should match @sector_len and @nb_blocs, i.e. size =3D=3D sector_len * nb_blocs. All callers satisfy this. Remove @nb_blocs and compute it from @size and @sector_len. Signed-off-by: Markus Armbruster Reviewed-by: Laszlo Ersek Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/collie.c | 5 +++-- hw/arm/digic_boards.c | 1 - hw/arm/gumstix.c | 4 ++-- hw/arm/mainstone.c | 2 +- hw/arm/musicpal.c | 4 ++-- hw/arm/omap_sx1.c | 4 ++-- hw/arm/versatilepb.c | 1 - hw/arm/xilinx_zynq.c | 3 +-- hw/arm/z2.c | 2 +- hw/block/pflash_cfi01.c | 5 +++-- hw/block/pflash_cfi02.c | 5 +++-- hw/i386/pc_sysfw.c | 6 +----- hw/lm32/lm32_boards.c | 4 ++-- hw/lm32/milkymist.c | 2 +- hw/microblaze/petalogix_ml605_mmu.c | 2 +- hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +- hw/mips/mips_malta.c | 7 +++---- hw/mips/mips_r4k.c | 2 +- hw/ppc/ppc405_boards.c | 6 +++--- hw/ppc/sam460ex.c | 2 +- hw/ppc/virtex_ml507.c | 2 +- hw/sh4/r2d.c | 2 +- include/hw/block/flash.h | 4 ++-- 23 files changed, 36 insertions(+), 41 deletions(-) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index cbc4400f8e..7c9c0615f0 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -9,6 +9,7 @@ * GNU GPL, version 2 or (at your option) any later version. */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "hw/hw.h" #include "hw/sysbus.h" #include "hw/boards.h" @@ -38,12 +39,12 @@ static void collie_init(MachineState *machine) dinfo =3D drive_get(IF_PFLASH, 0, 0); pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0); =20 dinfo =3D drive_get(IF_PFLASH, 0, 1); pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0); =20 sysbus_create_simple("scoop", 0x40800000, NULL); =20 diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index 15a00a1be3..304e4d1a29 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -131,7 +131,6 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *= s, hwaddr addr, =20 pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE, NULL, FLASH_K8P3215UQB_SECTOR_SIZE, - FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_= SIZE, DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE, 4, 0x00EC, 0x007E, 0x0003, 0x0001, diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c index 304dbeab2f..2e526218f4 100644 --- a/hw/arm/gumstix.c +++ b/hw/arm/gumstix.c @@ -74,7 +74,7 @@ static void connex_init(MachineState *machine) #endif if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, connex_rom / sector_len, + sector_len, 2, 0, 0, 0, 0, be)) { error_report("Error registering flash memory"); exit(1); @@ -111,7 +111,7 @@ static void verdex_init(MachineState *machine) #endif if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, verdex_rom / sector_len, + sector_len, 2, 0, 0, 0, 0, be)) { error_report("Error registering flash memory"); exit(1); diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index 2a1c1072db..6e15ba9663 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -152,7 +152,7 @@ static void mainstone_common_init(MemoryRegion *address= _space_mem, i ? "mainstone.flash1" : "mainstone.fla= sh0", MAINSTONE_FLASH, blk_by_legacy_dinfo(dinfo), - sector_len, MAINSTONE_FLASH / sector_le= n, + sector_len, 4, 0, 0, 0, 0, be)) { error_report("Error registering flash memory"); exit(1); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index cc780dfb37..0f4f02df8e 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1638,14 +1638,14 @@ static void musicpal_init(MachineState *machine) #ifdef TARGET_WORDS_BIGENDIAN pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, "musicpal.flash", flash_size, - blk, 0x10000, (flash_size + 0xffff) >> 16, + blk, 0x10000, MP_FLASH_SIZE_MAX / flash_size, 2, 0x00BF, 0x236D, 0x0000, 0x0000, 0x5555, 0x2AAA, 1); #else pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, "musicpal.flash", flash_size, - blk, 0x10000, (flash_size + 0xffff) >> 16, + blk, 0x10000, MP_FLASH_SIZE_MAX / flash_size, 2, 0x00BF, 0x236D, 0x0000, 0x0000, 0x5555, 0x2AAA, 0); diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index b1128777cf..b269a5e1c2 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -155,7 +155,7 @@ static void sx1_init(MachineState *machine, const int v= ersion) if (!pflash_cfi01_register(OMAP_CS0_BASE, "omap_sx1.flash0-1", flash_size, blk_by_legacy_dinfo(dinfo), - sector_size, flash_size / sector_size, + sector_size, 4, 0, 0, 0, 0, be)) { fprintf(stderr, "qemu: Error registering flash memory %d.\n", fl_idx); @@ -179,7 +179,7 @@ static void sx1_init(MachineState *machine, const int v= ersion) if (!pflash_cfi01_register(OMAP_CS1_BASE, "omap_sx1.flash1-1", flash1_size, blk_by_legacy_dinfo(dinfo), - sector_size, flash1_size / sector_size, + sector_size, 4, 0, 0, 0, 0, be)) { fprintf(stderr, "qemu: Error registering flash memory %d.\n", fl_idx); diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 82c5277462..d67181810a 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -369,7 +369,6 @@ static void versatile_init(MachineState *machine, int b= oard_id) VERSATILE_FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, VERSATILE_FLASH_SECT_SIZE, - VERSATILE_FLASH_SIZE / VERSATILE_FLASH_SECT_SIZE, 4, 0x0089, 0x0018, 0x0000, 0x0, 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); } diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 1fa4a77728..f36cfcfd4a 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -207,8 +207,7 @@ static void zynq_init(MachineState *machine) /* AMD */ pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - FLASH_SECTOR_SIZE, - FLASH_SIZE/FLASH_SECTOR_SIZE, 1, + FLASH_SECTOR_SIZE, 1, 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, 0); =20 diff --git a/hw/arm/z2.c b/hw/arm/z2.c index 54e6caee9f..fb073ec2f5 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -326,7 +326,7 @@ static void z2_init(MachineState *machine) =20 if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - sector_len, Z2_FLASH_SIZE / sector_len, + sector_len, 4, 0, 0, 0, 0, be)) { error_report("Error registering flash memory"); exit(1); diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index bd42487c0a..9d1c356eb6 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -940,7 +940,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, const char *name, hwaddr size, BlockBackend *blk, - uint32_t sector_len, int nb_blocs, + uint32_t sector_len, int bank_width, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, @@ -951,7 +951,8 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); } - qdev_prop_set_uint32(dev, "num-blocks", nb_blocs); + assert(size % sector_len =3D=3D 0); + qdev_prop_set_uint32(dev, "num-blocks", size / sector_len); qdev_prop_set_uint64(dev, "sector-length", sector_len); qdev_prop_set_uint8(dev, "width", bank_width); qdev_prop_set_bit(dev, "big-endian", !!be); diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index c261ebff72..33779ce807 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -720,7 +720,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, const char *name, hwaddr size, BlockBackend *blk, - uint32_t sector_len, int nb_blocs, + uint32_t sector_len, int nb_mappings, int width, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, @@ -733,7 +733,8 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); } - qdev_prop_set_uint32(dev, "num-blocks", nb_blocs); + assert(size % sector_len =3D=3D 0); + qdev_prop_set_uint32(dev, "num-blocks", size / sector_len); qdev_prop_set_uint32(dev, "sector-length", sector_len); qdev_prop_set_uint8(dev, "width", width); qdev_prop_set_uint8(dev, "mappings", nb_mappings); diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 9a5be54a85..34727c5b1f 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -110,16 +110,13 @@ static void pc_system_flash_init(MemoryRegion *rom_me= mory) int64_t size; char *fatal_errmsg =3D NULL; hwaddr phys_addr =3D 0x100000000ULL; - int sector_bits, sector_size; + uint32_t sector_size =3D 4096; PFlashCFI01 *system_flash; MemoryRegion *flash_mem; char name[64]; void *flash_ptr; int ret, flash_size; =20 - sector_bits =3D 12; - sector_size =3D 1 << sector_bits; - for (unit =3D 0; (unit < FLASH_MAP_UNIT_MAX && (pflash_drv =3D drive_get(IF_PFLASH, 0, unit)) !=3D NULL); @@ -162,7 +159,6 @@ static void pc_system_flash_init(MemoryRegion *rom_memo= ry) snprintf(name, sizeof name, "system.flash%d", unit); system_flash =3D pflash_cfi01_register(phys_addr, name, size, blk, sector_size, - size >> sector_bits, 1 /* width */, 0x0000 /* id0 */, 0x0000 /* id1 */, diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index f726355309..09f411ed07 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -116,7 +116,7 @@ static void lm32_evr_init(MachineState *machine) /* Spansion S29NS128P */ pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - flash_sector_size, flash_size / flash_sector_siz= e, + flash_sector_size, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); =20 /* create irq lines */ @@ -209,7 +209,7 @@ static void lm32_uclinux_init(MachineState *machine) /* Spansion S29NS128P */ pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - flash_sector_size, flash_size / flash_sector_siz= e, + flash_sector_size, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); =20 /* create irq lines */ diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c index ece7e3b699..46b0f51fdf 100644 --- a/hw/lm32/milkymist.c +++ b/hw/lm32/milkymist.c @@ -123,7 +123,7 @@ milkymist_init(MachineState *machine) /* Numonyx JS28F256J3F105 */ pflash_cfi01_register(flash_base, "milkymist.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - flash_sector_size, flash_size / flash_sector_siz= e, + flash_sector_size, 2, 0x00, 0x89, 0x00, 0x1d, 1); =20 /* create irq lines */ diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_= ml605_mmu.c index 74bcc14cda..46904d2012 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -109,7 +109,7 @@ petalogix_ml605_init(MachineState *machine) * 10th paremeter 0 means little-endian */ pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_S= IZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, FLASH_SIZE >> 16, + 64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 0); =20 =20 diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petal= ogix_s3adsp1800_mmu.c index a07b7f8edf..027c31fdcc 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -90,7 +90,7 @@ petalogix_s3adsp1800_init(MachineState *machine) pflash_cfi01_register(FLASH_BASEADDR, "petalogix_s3adsp1800.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, FLASH_SIZE >> 16, + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); =20 dev =3D qdev_create(NULL, "xlnx.xps-intc"); diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index fdf1434b28..647d4a2dac 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1208,7 +1208,6 @@ void mips_malta_init(MachineState *machine) DriveInfo *dinfo; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; int fl_idx =3D 0; - int fl_sectors =3D bios_size >> 16; int be; =20 DeviceState *dev =3D qdev_create(NULL, TYPE_MIPS_MALTA); @@ -1268,15 +1267,15 @@ void mips_malta_init(MachineState *machine) #ifdef DEBUG_BOARD_INIT if (dinfo) { printf("Register parallel flash %d size " TARGET_FMT_lx " at " - "addr %08llx '%s' %x\n", + "addr %08llx '%s'\n", fl_idx, FLASH_SIZE, FLASH_ADDRESS, - blk_name(dinfo->bdrv), fl_sectors); + blk_name(dinfo->bdrv)); } #endif fl =3D pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 65536, fl_sectors, + 65536, 4, 0x0000, 0x0000, 0x0000, 0x0000, be); bios =3D pflash_cfi01_get_memory(fl); fl_idx++; diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index 0b9df466e7..acfd59c17a 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -237,7 +237,7 @@ void mips_r4k_init(MachineState *machine) uint32_t mips_rom =3D 0x00400000; if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom, blk_by_legacy_dinfo(dinfo), - sector_len, mips_rom / sector_len, + sector_len, 4, 0, 0, 0, 0, be)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); } diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index dfaea45898..1dd5c8b797 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -195,7 +195,7 @@ static void ref405ep_init(MachineState *machine) pflash_cfi02_register((uint32_t)(-bios_size), "ef405ep.bios", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, bios_size / (64 * KiB), 1, + 64 * KiB, 1, 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); } else @@ -486,7 +486,7 @@ static void taihu_405ep_init(MachineState *machine) pflash_cfi02_register(0xFFE00000, "taihu_405ep.bios", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, bios_size / (64 * KiB), 1, + 64 * KiB, 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; @@ -528,7 +528,7 @@ static void taihu_405ep_init(MachineState *machine) #endif pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, bios_size / (64 * KiB), 1, + 64 * KiB, 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index ad36cb12c8..1de0a1b47c 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -115,7 +115,7 @@ static int sam460ex_load_uboot(void) if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32), "sam460ex.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, FLASH_SIZE / (64 * KiB), + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1)) { error_report("Error registering flash memory"); /* XXX: return an error instead? */ diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index d2085a839c..4f86c22968 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -229,7 +229,7 @@ static void virtex_init(MachineState *machine) dinfo =3D drive_get(IF_PFLASH, 0, 0); pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, FLASH_SIZE >> 16, + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); =20 cpu_irq =3D (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT]; diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index abd3b67c28..5e6953537c 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -299,7 +299,7 @@ static void r2d_init(MachineState *machine) */ pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE / 4, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 16 * KiB, FLASH_SIZE >> 16, + 16 * KiB, 1, 4, 0x0000, 0x0000, 0x0000, 0x0000, 0x555, 0x2aa, 0); =20 diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 3e48901c84..914932eaec 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -17,7 +17,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, const char *name, hwaddr size, BlockBackend *blk, - uint32_t sector_len, int nb_blocs, + uint32_t sector_len, int width, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, @@ -36,7 +36,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, const char *name, hwaddr size, BlockBackend *blk, - uint32_t sector_len, int nb_blocs, + uint32_t sector_len, int nb_mappings, int width, uint16_t id0, uint16_t id1, --=20 2.17.2