From nobody Sun Nov 9 17:50:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551181511765116.96404560689427; Tue, 26 Feb 2019 03:45:11 -0800 (PST) Received: from localhost ([127.0.0.1]:53436 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gybAa-0008P4-Hr for importer@patchew.org; Tue, 26 Feb 2019 06:45:08 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47360) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyb5R-0004Zd-ES for qemu-devel@nongnu.org; Tue, 26 Feb 2019 06:39:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyb5M-0006pW-KM for qemu-devel@nongnu.org; Tue, 26 Feb 2019 06:39:46 -0500 Received: from mx1.redhat.com ([209.132.183.28]:51300) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyb5M-0006kV-7u; Tue, 26 Feb 2019 06:39:44 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0B56330AA38E; Tue, 26 Feb 2019 11:39:33 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-93.ams2.redhat.com [10.36.117.93]) by smtp.corp.redhat.com (Postfix) with ESMTP id A0884600C0; Tue, 26 Feb 2019 11:39:31 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Tue, 26 Feb 2019 12:38:48 +0100 Message-Id: <20190226113915.20150-7-david@redhat.com> In-Reply-To: <20190226113915.20150-1-david@redhat.com> References: <20190226113915.20150-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Tue, 26 Feb 2019 11:39:33 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v1 06/33] s390x/tcg: Implement VECTOR GENERATE BYTE MASK X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , David Hildenbrand , Thomas Huth , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As we are working on byte elements, we can use i32 for element access. Add write_vec_element_i32(). Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 39 +++++++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 2b06cc9130..1bdfcf8130 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -977,6 +977,8 @@ /* VECTOR GATHER ELEMENT */ E(0xe713, VGEF, VRV, V, la2, 0, 0, 0, vge, 0, MO_32, IF_VEC) E(0xe712, VGEG, VRV, V, la2, 0, 0, 0, vge, 0, MO_64, IF_VEC) +/* VECTOR GENERATE BYTE MASK */ + F(0xe744, VGBM, VRI_a, V, 0, 0, 0, 0, vgbm, 0, IF_VEC) =20 #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.in= c.c index 56f403e40d..7775401dd3 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -105,6 +105,26 @@ static void write_vec_element_i64(TCGv_i64 src, int re= g, uint8_t enr, } } =20 +static void write_vec_element_i32(TCGv_i32 src, int reg, uint8_t enr, + TCGMemOp memop) +{ + const int offs =3D vec_reg_offset(reg, enr, memop & MO_SIZE); + + switch (memop) { + case MO_8: + tcg_gen_st8_i32(src, cpu_env, offs); + break; + case MO_16: + tcg_gen_st16_i32(src, cpu_env, offs); + break; + case MO_32: + tcg_gen_st_i32(src, cpu_env, offs); + break; + default: + g_assert_not_reached(); + } +} + static void load_vec_element(DisasContext *s, uint8_t reg, uint8_t enr, TCGv_i64 addr, uint8_t es) { @@ -136,3 +156,22 @@ static DisasJumpType op_vge(DisasContext *s, DisasOps = *o) tcg_temp_free_i64(tmp); return DISAS_NEXT; } + +static DisasJumpType op_vgbm(DisasContext *s, DisasOps *o) +{ + const uint16_t i2 =3D get_field(s->fields, i2); + TCGv_i32 ones =3D tcg_const_i32(-1u); + TCGv_i32 zeroes =3D tcg_const_i32(0); + int i; + + for (i =3D 0; i < 16; i++) { + if (extract32(i2, 15 - i, 1)) { + write_vec_element_i32(ones, get_field(s->fields, v1), i, MO_8); + } else { + write_vec_element_i32(zeroes, get_field(s->fields, v1), i, MO_= 8); + } + } + tcg_temp_free_i32(ones); + tcg_temp_free_i32(zeroes); + return DISAS_NEXT; +} --=20 2.17.2