From nobody Sun Nov 9 16:21:51 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551156954439811.6212280201697; Mon, 25 Feb 2019 20:55:54 -0800 (PST) Received: from localhost ([127.0.0.1]:48736 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyUmL-0005sx-Ha for importer@patchew.org; Mon, 25 Feb 2019 23:55:41 -0500 Received: from eggs.gnu.org ([209.51.188.92]:57399) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyUkC-0004Sl-2r for qemu-devel@nongnu.org; Mon, 25 Feb 2019 23:53:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyUjz-0000fn-9J for qemu-devel@nongnu.org; Mon, 25 Feb 2019 23:53:18 -0500 Received: from ozlabs.org ([203.11.71.1]:49187) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gyUjx-0000cE-JQ; Mon, 25 Feb 2019 23:53:14 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 447mfF5cfLz9sCH; Tue, 26 Feb 2019 15:53:09 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1551156789; bh=Nt5u13DIF622u7gwUsyXC3N+OXWKc7nZRCo8ctGoKTs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YoY2NeosZceFI0I67QS3NNm+Pho+1JYklOPok8ZmNH7fvRzfeFIdv+CxtOtFU1i8O 0XwZqTSw73qicwx5BRdZ5L4pcyzIpp9Jo4Ci1WiVSY+8ruohcSihEmPKkMLzaKw2fe HvCZDHOW6knIkNnSmzp1LKKWSUduikufiXWScQZc= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 26 Feb 2019 15:52:17 +1100 Message-Id: <20190226045304.25618-4-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190226045304.25618-1-david@gibson.dropbear.id.au> References: <20190226045304.25618-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 03/50] target/ppc: Fix support for "STOP light" states on POWER9 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, gkurz@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Benjamin Herrenschmidt STOP must act differently based on PSSCR:EC on POWER9. When set, it acts like the P7/P8 power management instructions and wake up at 0x100 based on the wakeup conditions in LPCR. When PSSCR:EC is clear however it will wakeup at the next instruction after STOP (if EE is clear) or take the corresponding interrupts (if EE is set). Signed-off-by: Benjamin Herrenschmidt Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: David Gibson Message-Id: <20190215161648.9600-4-clg@kaod.org> Signed-off-by: David Gibson --- target/ppc/cpu-qom.h | 1 + target/ppc/cpu.h | 12 +++++++++--- target/ppc/excp_helper.c | 8 ++++++-- target/ppc/translate.c | 13 ++++++++++++- target/ppc/translate_init.inc.c | 7 +++++++ 5 files changed, 35 insertions(+), 6 deletions(-) diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 3130802304..e9cb158423 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -122,6 +122,7 @@ typedef enum { PPC_PM_NAP, PPC_PM_SLEEP, PPC_PM_RVWINKLE, + PPC_PM_STOP, } powerpc_pm_insn_t; =20 /*************************************************************************= ****/ diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 325ebbeb98..5b1899bfc9 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -414,6 +414,10 @@ struct ppc_slb_t { #define LPCR_HVICE PPC_BIT(62) /* HV Virtualisation Int Enable */ #define LPCR_HDICE PPC_BIT(63) =20 +/* PSSCR bits */ +#define PSSCR_ESL PPC_BIT(42) /* Enable State Loss */ +#define PSSCR_EC PPC_BIT(43) /* Exit Criterion */ + #define msr_sf ((env->msr >> MSR_SF) & 1) #define msr_isf ((env->msr >> MSR_ISF) & 1) #define msr_shv ((env->msr >> MSR_SHV) & 1) @@ -1110,9 +1114,11 @@ struct CPUPPCState { * instructions and SPRs are diallowed if MSR:HV is 0 */ bool has_hv_mode; - /* On P7/P8, set when in PM state, we need to handle resume - * in a special way (such as routing some resume causes to - * 0x100), so flag this here. + + /* + * On P7/P8/P9, set when in PM state, we need to handle resume in + * a special way (such as routing some resume causes to 0x100), so + * flag this here. */ bool in_pm_state; #endif diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 7c7c8d1b9d..97503193ef 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -97,7 +97,10 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int exc= p_model, int excp) asrr0 =3D -1; asrr1 =3D -1; =20 - /* check for special resume at 0x100 from doze/nap/sleep/winkle on P7/= P8 */ + /* + * check for special resume at 0x100 from doze/nap/sleep/winkle on + * P7/P8/P9 + */ if (env->in_pm_state) { env->in_pm_state =3D false; =20 @@ -960,7 +963,8 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_t = insn) env->pending_interrupts &=3D ~(1 << PPC_INTERRUPT_HDECR); =20 /* Condition for waking up at 0x100 */ - env->in_pm_state =3D true; + env->in_pm_state =3D (insn !=3D PPC_PM_STOP) || + (env->spr[SPR_PSSCR] & PSSCR_EC); } #endif /* defined(TARGET_PPC64) */ =20 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index bffdbd9687..fde7ead7b7 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3589,7 +3589,18 @@ static void gen_nap(DisasContext *ctx) =20 static void gen_stop(DisasContext *ctx) { - gen_nap(ctx); +#if defined(CONFIG_USER_ONLY) + GEN_PRIV; +#else + TCGv_i32 t; + + CHK_HV; + t =3D tcg_const_i32(PPC_PM_STOP); + gen_helper_pminsn(cpu_env, t); + tcg_temp_free_i32(t); + /* Stop translation, as the CPU is supposed to sleep from now */ + gen_exception_nip(ctx, EXCP_HLT, ctx->base.pc_next); +#endif /* defined(CONFIG_USER_ONLY) */ } =20 static void gen_sleep(DisasContext *ctx) diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.in= c.c index d884906004..8b1d324b3b 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -8801,9 +8801,16 @@ static bool cpu_has_work_POWER9(CPUState *cs) CPUPPCState *env =3D &cpu->env; =20 if (cs->halted) { + uint64_t psscr =3D env->spr[SPR_PSSCR]; + if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { return false; } + + /* If EC is clear, just return true on any pending interrupt */ + if (!(psscr & PSSCR_EC)) { + return true; + } /* External Exception */ if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) && (env->spr[SPR_LPCR] & LPCR_EEE)) { --=20 2.20.1