From nobody Sun Nov 9 14:48:05 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15509647698231021.492417823046; Sat, 23 Feb 2019 15:32:49 -0800 (PST) Received: from localhost ([127.0.0.1]:43851 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxgmd-0001iE-P9 for importer@patchew.org; Sat, 23 Feb 2019 18:32:39 -0500 Received: from eggs.gnu.org ([209.51.188.92]:45460) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxgkC-0000PX-NW for qemu-devel@nongnu.org; Sat, 23 Feb 2019 18:30:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gxgkA-0007QA-Vs for qemu-devel@nongnu.org; Sat, 23 Feb 2019 18:30:08 -0500 Received: from mail-pf1-x42d.google.com ([2607:f8b0:4864:20::42d]:46941) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gxgkA-0007Np-KP for qemu-devel@nongnu.org; Sat, 23 Feb 2019 18:30:06 -0500 Received: by mail-pf1-x42d.google.com with SMTP id g6so2742522pfh.13 for ; Sat, 23 Feb 2019 15:30:06 -0800 (PST) Received: from cloudburst.twiddle.net (97-113-188-82.tukw.qwest.net. [97.113.188.82]) by smtp.gmail.com with ESMTPSA id n1sm13214842pfi.123.2019.02.23.15.30.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 23 Feb 2019 15:30:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qLrp+/HLzFcuZRP+aVxUj7RFfpVP3ZwoFIDVc9U8wkQ=; b=oy90VbiIfmKU30SL9s5PAzv8uSkDBTYuoz5P7Bt5Hq1BCUrA4msjtyU1OH+s9Vqpkk 9Fcgg/jfThoJeDK93oC1E5ENUheb+245f7DU3xSxtx2YE70a6QN567sVFvq5E+obHqHH JDJYy02XMer1wl+MJ0IwdI2C9HuWrzEIFsRBHcNehqTo+4JeQiRfh1s2bpEtvOgyW3aX jCOTdqJtvJajQ9te/zHYBd7FTaB/OpS8QvJcNEaEZ4o4tjnoSRfdCG73em+kQnkEWANB +j2hVPRHuC9DZmU3V34sM0QBwuH5sWLC7IN0PhRQN9npZbI1+4QFWkpzxXrq2C1HJBJn 1eSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qLrp+/HLzFcuZRP+aVxUj7RFfpVP3ZwoFIDVc9U8wkQ=; b=JY++TwjN3uk9XmI53xNQCcs3ixVDbKFiu8x61bkLAzr/7D34QHUXPy3MSE68wpLb/U H8cSilsrn01pl4nAFyzHhKb++yIm1pmKZhxroz9R7wcq1eOCxcELtcaWr+4kQ6dbxvmp IzzyzgMvKnrdG812NMQiXkzKS1V1GMI5IkTgWM33S3Bwc3IltfP9CR/3g57f1DaUykwM JqD/bL9JUGALPUbn+U3/6ChgucDpsYczO4KTy4WdCK7WI2qA/QkTYhNuTyKvz2axZS95 b1IdnEh8WYoMSvc4PmJvue6zE3uR5H2K5OxNtsMbcRB5UMtiRzPuJ6W3ag+/LdfWS2xd 4Fpw== X-Gm-Message-State: AHQUAuaL+li+R05g8zsvB9GfYJOTvlhz5NyW1PhhvlsXLb6TapzcQebx FmM5CHAb7shb/O05+lqNoBbs+3OQzWA= X-Google-Smtp-Source: AHgI3IZYH9x5ga2VAZs6AA55FUuRIIouDEhlWDdF2jZHAQRTz9gu51SmHQk/rpj7tP02C3VY9UGzMw== X-Received: by 2002:a63:4a0a:: with SMTP id x10mr10806448pga.325.1550964605260; Sat, 23 Feb 2019 15:30:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 23 Feb 2019 15:29:54 -0800 Message-Id: <20190223232954.7185-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190223232954.7185-1-richard.henderson@linaro.org> References: <20190223232954.7185-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::42d Subject: [Qemu-devel] [RFC 7/7] target/riscv: Use pattern groups for RVC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbastian@mail.uni-paderborn.de, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/riscv/insn_trans/trans_rvc.inc.c | 60 +++++++++---------------- target/riscv/insn16.decode | 23 +++++++--- target/riscv/insn32.decode | 18 ++++---- 3 files changed, 48 insertions(+), 53 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvc.inc.c b/target/riscv/insn_tr= ans/trans_rvc.inc.c index 631e72c8b5..a81da2f107 100644 --- a/target/riscv/insn_trans/trans_rvc.inc.c +++ b/target/riscv/insn_trans/trans_rvc.inc.c @@ -48,24 +48,6 @@ static bool trans_c_li(DisasContext *ctx, arg_c_li *a) return trans_addi(ctx, &arg); } =20 -static bool trans_c_addi16sp_lui(DisasContext *ctx, arg_c_addi16sp_lui *a) -{ - if (a->rd =3D=3D 2) { - /* C.ADDI16SP */ - arg_addi arg =3D { .rd =3D 2, .rs1 =3D 2, .imm =3D a->imm_addi16sp= }; - return trans_addi(ctx, &arg); - } else if (a->imm_lui !=3D 0) { - /* C.LUI */ - if (a->rd =3D=3D 0) { - /* Hint: insn is valid but does not affect state */ - return true; - } - arg_lui arg =3D { .rd =3D a->rd, .imm =3D a->imm_lui }; - return trans_lui(ctx, &arg); - } - return false; -} - static bool trans_c_srli(DisasContext *ctx, arg_c_srli *a) { int shamt =3D a->shamt; @@ -114,36 +96,38 @@ static bool trans_c_slli(DisasContext *ctx, arg_c_slli= *a) return trans_slli(ctx, &arg); } =20 -static bool trans_c_jr_mv(DisasContext *ctx, arg_c_jr_mv *a) +static bool trans_c_jr(DisasContext *ctx, arg_c_jr *a) { - if (a->rd !=3D 0 && a->rs2 =3D=3D 0) { - /* C.JR */ + if (a->rd !=3D 0) { arg_jalr arg =3D { .rd =3D 0, .rs1 =3D a->rd, .imm =3D 0 }; return trans_jalr(ctx, &arg); - } else if (a->rd !=3D 0 && a->rs2 !=3D 0) { - /* C.MV */ + } + return false; +} + +static bool trans_c_mv(DisasContext *ctx, arg_c_mv *a) +{ + if (a->rd !=3D 0 && a->rs2 !=3D 0) { arg_add arg =3D { .rd =3D a->rd, .rs1 =3D 0, .rs2 =3D a->rs2 }; return trans_add(ctx, &arg); } return false; } =20 -static bool trans_c_ebreak_jalr_add(DisasContext *ctx, arg_c_ebreak_jalr_a= dd *a) +static bool trans_c_jalr(DisasContext *ctx, arg_c_jalr *a) { - if (a->rd =3D=3D 0 && a->rs2 =3D=3D 0) { - /* C.EBREAK */ - arg_ebreak arg =3D { }; - return trans_ebreak(ctx, &arg); - } else if (a->rd !=3D 0) { - if (a->rs2 =3D=3D 0) { - /* C.JALR */ - arg_jalr arg =3D { .rd =3D 1, .rs1 =3D a->rd, .imm =3D 0 }; - return trans_jalr(ctx, &arg); - } else { - /* C.ADD */ - arg_add arg =3D { .rd =3D a->rd, .rs1 =3D a->rd, .rs2 =3D a->r= s2 }; - return trans_add(ctx, &arg); - } + if (a->rd !=3D 0) { + arg_jalr arg =3D { .rd =3D 1, .rs1 =3D a->rd, .imm =3D 0 }; + return trans_jalr(ctx, &arg); + } + return false; +} + +static bool trans_c_add(DisasContext *ctx, arg_c_add *a) +{ + if (a->rd !=3D 0 && a->rs2 !=3D 0) { + arg_add arg =3D { .rd =3D a->rd, .rs1 =3D a->rd, .rs2 =3D a->rs2 }; + return trans_add(ctx, &arg); } return false; } diff --git a/target/riscv/insn16.decode b/target/riscv/insn16.decode index d88a0c78ab..5b93051a19 100644 --- a/target/riscv/insn16.decode +++ b/target/riscv/insn16.decode @@ -42,11 +42,13 @@ =20 =20 # Argument sets imported from insn32.decode: +&empty !extern &r rd rs1 rs2 !extern &i imm rs1 rd !extern &s imm rs1 rs2 !extern &j imm rd !extern &b imm rs2 rs1 !extern +&u imm rd !extern =20 # Argument sets: &ci imm rd @@ -55,8 +57,6 @@ &cr rd rs2 &c_shift shamt rd =20 -&c_addi16sp_lui imm_lui imm_addi16sp rd - # Formats 16: @cr .... ..... ..... .. &cr rs2=3D%rs2_5 %rd @ci ... . ..... ..... .. &i imm=3D%imm_ci %rd rs1=3D%rd @@ -74,8 +74,6 @@ @c_sd ... . ..... ..... .. &s imm=3D%uimm_6bit_sd rs1=3D2 rs2=3D%r= s2_5 @c_sw ... . ..... ..... .. &s imm=3D%uimm_6bit_sw rs1=3D2 rs2=3D%r= s2_5 =20 -@c_addi16sp_lui ... . ..... ..... .. &c_addi16sp_lui %imm_lui %imm_addi16= sp %rd - @c_shift ... . .. ... ..... .. &c_shift rd=3D%rs1_3 shamt=3D%nzuimm= _6bit @c_shift2 ... . .. ... ..... .. &c_shift rd=3D%rd shamt=3D%nzuimm= _6bit =20 @@ -92,7 +90,11 @@ sw 110 ... ... .. ... 00 @cs_w # *** RV64C Standard Extension (Quadrant 1) *** c_addi 000 . ..... ..... 01 @ci c_li 010 . ..... ..... 01 @ci -c_addi16sp_lui 011 . ..... ..... 01 @c_addi16sp_lui # shares opc with= C.LUI +{ + # addi16sp + addi 011 . 00010 ..... 01 &i rd=3D2 rs1=3D2 imm=3D%imm_addi= 16sp + lui 011 . ..... ..... 01 &u %rd imm=3D%imm_lui +} c_srli 100 . 00 ... ..... 01 @c_shift c_srai 100 . 01 ... ..... 01 @c_shift andi 100 . 10 ... ..... 01 @c_andi @@ -108,7 +110,14 @@ bne 111 ... ... ..... 01 @cb # c_bnez c_slli 000 . ..... ..... 10 @c_shift2 fld 001 . ..... ..... 10 @c_ld # fldsp lw 010 . ..... ..... 10 @c_lw # lwsp -c_jr_mv 100 0 ..... ..... 10 @cr -c_ebreak_jalr_add 100 1 ..... ..... 10 @cr +{ + c_jr 100 0 ..... 00000 10 %rd + c_mv 100 0 ..... ..... 10 @cr +} +{ + ebreak 100 1 00000 00000 10 + c_jalr 100 1 ..... 00000 10 %rd + c_add 100 1 ..... ..... 10 @cr +} fsd 101 ...... ..... 10 @c_sd # fsdsp sw 110 . ..... ..... 10 @c_sw # swsp diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 0e098e05fe..81bcb5dbb4 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -34,20 +34,22 @@ %imm_u 12:s20 !function=3Dex_shift_12 =20 # Argument sets: -&b imm rs2 rs1 -&i imm rs1 rd -&r rd rs1 rs2 -&s imm rs2 rs1 -&j imm rd -&shift shamt rs1 rd -&atomic aq rl rs2 rs1 rd +&empty +&b imm rs2 rs1 +&i imm rs1 rd +&r rd rs1 rs2 +&s imm rs2 rs1 +&j imm rd +&u imm rd +&shift shamt rs1 rd +&atomic aq rl rs2 rs1 rd =20 # Formats 32: @r ....... ..... ..... ... ..... ....... &r %rs2 %r= s1 %rd @i ............ ..... ... ..... ....... &i imm=3D%imm_i = %rs1 %rd @b ....... ..... ..... ... ..... ....... &b imm=3D%imm_b %rs2= %rs1 @s ....... ..... ..... ... ..... ....... &s imm=3D%imm_s %rs2= %rs1 -@u .................... ..... ....... imm=3D%imm_u = %rd +@u .................... ..... ....... &u imm=3D%imm_u = %rd @j .................... ..... ....... &j imm=3D%imm_j = %rd =20 @sh ...... ...... ..... ... ..... ....... &shift shamt=3D%sh10 = %rs1 %rd --=20 2.17.2