From nobody Sat Sep 28 22:05:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=mail.uni-paderborn.de Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1550846649954372.37786830444975; Fri, 22 Feb 2019 06:44:09 -0800 (PST) Received: from localhost ([127.0.0.1]:51896 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxC3Z-0005Lt-SI for importer@patchew.org; Fri, 22 Feb 2019 09:44:05 -0500 Received: from eggs.gnu.org ([209.51.188.92]:41310) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gxBZe-0006Ia-6f for qemu-devel@nongnu.org; Fri, 22 Feb 2019 09:13:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gxBZV-0000WH-9W for qemu-devel@nongnu.org; Fri, 22 Feb 2019 09:13:06 -0500 Received: from mail.uni-paderborn.de ([131.234.142.9]:42450) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gxBZG-0007In-TI; Fri, 22 Feb 2019 09:12:52 -0500 Received: from magmaria.uni-paderborn.de ([131.234.189.24] helo=localhost.localdomain) by mail.uni-paderborn.de with esmtp (Exim 4.89 telepax) id 1gxBYW-000219-4i; Fri, 22 Feb 2019 15:12:00 +0100 Received: from mail.uni-paderborn.de by magmaria with queue id 3163445-3; Fri, 22 Feb 2019 14:11:59 GMT X-Envelope-From: From: Bastian Koppelmann To: sagark@eecs.berkeley.edu, palmer@sifive.com, kbastian@mail.uni-paderborn.de Date: Fri, 22 Feb 2019 15:10:24 +0100 Message-Id: <20190222141024.22217-35-kbastian@mail.uni-paderborn.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190222141024.22217-1-kbastian@mail.uni-paderborn.de> References: <20190222141024.22217-1-kbastian@mail.uni-paderborn.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-PMX-Version: 6.4.6.2792898, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2019.2.22.140315, AntiVirus-Engine: 5.58.0, AntiVirus-Data: 2019.2.19.5580002 X-IMT-Spam-Score: 0.0 () X-IMT-Authenticated-Sender: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 131.234.142.9 Subject: [Qemu-devel] [PATCH v8 34/34] target/riscv: Remaining rvc insn reuse 32 bit translators X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, peer.adelt@hni.uni-paderborn.de, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" only one translate functions of rvc needs to handle special cases. For the other rvc insns we can remove the extra layer of indirection. Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- target/riscv/insn16.decode | 37 +++++++++---------- target/riscv/insn_trans/trans_rvc.inc.c | 48 ------------------------- 2 files changed, 17 insertions(+), 68 deletions(-) diff --git a/target/riscv/insn16.decode b/target/riscv/insn16.decode index 98dd672c7f..d88a0c78ab 100644 --- a/target/riscv/insn16.decode +++ b/target/riscv/insn16.decode @@ -46,19 +46,15 @@ &i imm rs1 rd !extern &s imm rs1 rs2 !extern &j imm rd !extern +&b imm rs2 rs1 !extern =20 # Argument sets: &ci imm rd &ciw nzuimm rd &cs_dw uimm rs1 rs2 -&cb imm rs1 &cr rd rs2 -&c_j imm &c_shift shamt rd =20 -&c_ld uimm rd -&c_sd uimm rs2 - &c_addi16sp_lui imm_lui imm_addi16sp rd =20 # Formats 16: @@ -70,20 +66,21 @@ @cs_2 ... ... ... .. ... .. &r rd=3D%rs1_3 rs1=3D%rs1_3 rs2=3D%r= s2_3 @cs_d ... ... ... .. ... .. &s imm=3D%uimm_cl_d rs1=3D%rs1_3 rs2= =3D%rs2_3 @cs_w ... ... ... .. ... .. &s imm=3D%uimm_cl_w rs1=3D%rs1_3 rs2= =3D%rs2_3 -@cb ... ... ... .. ... .. &cb imm=3D%imm_cb rs1=3D%rs1_3 -@cj ... ........... .. &c_j imm=3D%imm_cj +@cb ... ... ... .. ... .. &b imm=3D%imm_cb rs1=3D%rs1_3 rs2=3D0 +@cj ... ........... .. &j imm=3D%imm_cj rd=3D0 =20 -@c_ld ... . ..... ..... .. &c_ld uimm=3D%uimm_6bit_ld %rd -@c_lw ... . ..... ..... .. &c_ld uimm=3D%uimm_6bit_lw %rd -@c_sd ... . ..... ..... .. &c_sd uimm=3D%uimm_6bit_sd rs2=3D%rs= 2_5 -@c_sw ... . ..... ..... .. &c_sd uimm=3D%uimm_6bit_sw rs2=3D%rs= 2_5 +@c_ld ... . ..... ..... .. &i imm=3D%uimm_6bit_ld %rd rs1=3D2 +@c_lw ... . ..... ..... .. &i imm=3D%uimm_6bit_lw %rd rs1=3D2 +@c_sd ... . ..... ..... .. &s imm=3D%uimm_6bit_sd rs1=3D2 rs2=3D%r= s2_5 +@c_sw ... . ..... ..... .. &s imm=3D%uimm_6bit_sw rs1=3D2 rs2=3D%r= s2_5 =20 @c_addi16sp_lui ... . ..... ..... .. &c_addi16sp_lui %imm_lui %imm_addi16= sp %rd =20 @c_shift ... . .. ... ..... .. &c_shift rd=3D%rs1_3 shamt=3D%nzuimm= _6bit @c_shift2 ... . .. ... ..... .. &c_shift rd=3D%rd shamt=3D%nzuimm= _6bit =20 -@c_andi ... . .. ... ..... .. &ci imm=3D%imm_ci rd=3D%rs1_3 +@c_andi ... . .. ... ..... .. &i imm=3D%imm_ci rd=3D%rs1_3 rs1=3D%= rs1_3 + =20 # *** RV64C Standard Extension (Quadrant 0) *** c_addi4spn 000 ........ ... 00 @ciw @@ -98,20 +95,20 @@ c_li 010 . ..... ..... 01 @ci c_addi16sp_lui 011 . ..... ..... 01 @c_addi16sp_lui # shares opc with= C.LUI c_srli 100 . 00 ... ..... 01 @c_shift c_srai 100 . 01 ... ..... 01 @c_shift -c_andi 100 . 10 ... ..... 01 @c_andi +andi 100 . 10 ... ..... 01 @c_andi sub 100 0 11 ... 00 ... 01 @cs_2 xor 100 0 11 ... 01 ... 01 @cs_2 or 100 0 11 ... 10 ... 01 @cs_2 and 100 0 11 ... 11 ... 01 @cs_2 -c_j 101 ........... 01 @cj -c_beqz 110 ... ... ..... 01 @cb -c_bnez 111 ... ... ..... 01 @cb +jal 101 ........... 01 @cj # c_j +beq 110 ... ... ..... 01 @cb # c_beqz +bne 111 ... ... ..... 01 @cb # c_bnez =20 # *** RV64C Standard Extension (Quadrant 2) *** c_slli 000 . ..... ..... 10 @c_shift2 -c_fldsp 001 . ..... ..... 10 @c_ld -c_lwsp 010 . ..... ..... 10 @c_lw +fld 001 . ..... ..... 10 @c_ld # fldsp +lw 010 . ..... ..... 10 @c_lw # lwsp c_jr_mv 100 0 ..... ..... 10 @cr c_ebreak_jalr_add 100 1 ..... ..... 10 @cr -c_fsdsp 101 ...... ..... 10 @c_sd -c_swsp 110 . ..... ..... 10 @c_sw +fsd 101 ...... ..... 10 @c_sd # fsdsp +sw 110 . ..... ..... 10 @c_sw # swsp diff --git a/target/riscv/insn_trans/trans_rvc.inc.c b/target/riscv/insn_tr= ans/trans_rvc.inc.c index db9119ec9b..631e72c8b5 100644 --- a/target/riscv/insn_trans/trans_rvc.inc.c +++ b/target/riscv/insn_trans/trans_rvc.inc.c @@ -98,30 +98,6 @@ static bool trans_c_srai(DisasContext *ctx, arg_c_srai *= a) return trans_srai(ctx, &arg); } =20 -static bool trans_c_andi(DisasContext *ctx, arg_c_andi *a) -{ - arg_andi arg =3D { .rd =3D a->rd, .rs1 =3D a->rd, .imm =3D a->imm }; - return trans_andi(ctx, &arg); -} - -static bool trans_c_j(DisasContext *ctx, arg_c_j *a) -{ - arg_jal arg =3D { .rd =3D 0, .imm =3D a->imm }; - return trans_jal(ctx, &arg); -} - -static bool trans_c_beqz(DisasContext *ctx, arg_c_beqz *a) -{ - arg_beq arg =3D { .rs1 =3D a->rs1, .rs2 =3D 0, .imm =3D a->imm }; - return trans_beq(ctx, &arg); -} - -static bool trans_c_bnez(DisasContext *ctx, arg_c_bnez *a) -{ - arg_bne arg =3D { .rs1 =3D a->rs1, .rs2 =3D 0, .imm =3D a->imm }; - return trans_bne(ctx, &arg); -} - static bool trans_c_slli(DisasContext *ctx, arg_c_slli *a) { int shamt =3D a->shamt; @@ -138,18 +114,6 @@ static bool trans_c_slli(DisasContext *ctx, arg_c_slli= *a) return trans_slli(ctx, &arg); } =20 -static bool trans_c_fldsp(DisasContext *ctx, arg_c_fldsp *a) -{ - arg_fld arg =3D { .rd =3D a->rd, .rs1 =3D 2, .imm =3D a->uimm }; - return trans_fld(ctx, &arg); -} - -static bool trans_c_lwsp(DisasContext *ctx, arg_c_lwsp *a) -{ - arg_lw arg =3D { .rd =3D a->rd, .rs1 =3D 2, .imm =3D a->uimm }; - return trans_lw(ctx, &arg); -} - static bool trans_c_jr_mv(DisasContext *ctx, arg_c_jr_mv *a) { if (a->rd !=3D 0 && a->rs2 =3D=3D 0) { @@ -183,15 +147,3 @@ static bool trans_c_ebreak_jalr_add(DisasContext *ctx,= arg_c_ebreak_jalr_add *a) } return false; } - -static bool trans_c_fsdsp(DisasContext *ctx, arg_c_fsdsp *a) -{ - arg_fsd arg =3D { .rs1 =3D 2, .rs2 =3D a->rs2, .imm =3D a->uimm }; - return trans_fsd(ctx, &arg); -} - -static bool trans_c_swsp(DisasContext *ctx, arg_c_swsp *a) -{ - arg_sw arg =3D { .rs1 =3D 2, .rs2 =3D a->rs2, .imm =3D a->uimm }; - return trans_sw(ctx, &arg); -} --=20 2.20.1