From nobody Fri Apr 26 20:28:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1550501540601752.4120918735254; Mon, 18 Feb 2019 06:52:20 -0800 (PST) Received: from localhost ([127.0.0.1]:59885 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gvkHI-0005pS-JH for importer@patchew.org; Mon, 18 Feb 2019 09:52:16 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38642) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gvjws-0005XD-6J for qemu-devel@nongnu.org; Mon, 18 Feb 2019 09:31:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gvjwk-0002aM-Q9 for qemu-devel@nongnu.org; Mon, 18 Feb 2019 09:31:09 -0500 Received: from ozlabs.org ([203.11.71.1]:55985) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gvjwj-0002WI-I9; Mon, 18 Feb 2019 09:31:02 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 4435rb4wy8z9sPZ; Tue, 19 Feb 2019 01:30:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1550500255; bh=1ud6hUinC7iP7PRW94SdoLKklQYsKTFA/aKDx1wLBFo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g6ha+AjBCeHOVq3zg6xC9FTmMBR3cElCRd30JiY0bkHY/cgTNpbMIEvDSJZjPYiM6 AP4dGOzCZqPV+UcgLamMLWRRju7B7E0yB0haGI4m64v0ihEyep3gn5pYp0rwdrOdpV Ajsloqpg5oQVJ2eUclXf+HxJNpxkfb452NrYLCTw= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 19 Feb 2019 01:30:08 +1100 Message-Id: <20190218143049.17142-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190218143049.17142-1-david@gibson.dropbear.id.au> References: <20190218143049.17142-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 02/43] spapr: Rename xics to intc in interrupt controller agnostic code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: clg@kaod.org, David Gibson , qemu-ppc@nongnu.org, groug@kaod.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Greg Kurz All this code is used with both the XICS and XIVE interrupt controllers. Signed-off-by: Greg Kurz Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: David Gibson --- hw/ppc/spapr.c | 6 +++--- hw/ppc/spapr_events.c | 2 +- hw/ppc/spapr_pci.c | 6 +++--- hw/ppc/spapr_vio.c | 2 +- include/hw/pci-host/spapr.h | 2 +- include/hw/ppc/spapr.h | 2 +- 6 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 332cba89d4..850cfe28c4 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -96,7 +96,7 @@ =20 #define MIN_RMA_SLOF 128UL =20 -#define PHANDLE_XICP 0x00001111 +#define PHANDLE_INTC 0x00001111 =20 /* These two functions implement the VCPU id numbering: one to compute them * all and one to identify thread 0 of a VCORE. Any change to the first one @@ -1274,7 +1274,7 @@ static void *spapr_build_fdt(sPAPRMachineState *spapr) =20 /* /interrupt controller */ spapr->irq->dt_populate(spapr, spapr_max_server_number(spapr), fdt, - PHANDLE_XICP); + PHANDLE_INTC); =20 ret =3D spapr_populate_memory(spapr, fdt); if (ret < 0) { @@ -1294,7 +1294,7 @@ static void *spapr_build_fdt(sPAPRMachineState *spapr) } =20 QLIST_FOREACH(phb, &spapr->phbs, list) { - ret =3D spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt, + ret =3D spapr_populate_pci_dt(phb, PHANDLE_INTC, fdt, spapr->irq->nr_msis); if (ret < 0) { error_report("couldn't setup PCI devices in fdt"); diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index 32719a1b72..b9c7ecb9e9 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -282,7 +282,7 @@ void spapr_dt_events(sPAPRMachineState *spapr, void *fd= t) continue; } =20 - spapr_dt_xics_irq(interrupts, source->irq, false); + spapr_dt_irq(interrupts, source->irq, false); =20 _FDT(node_offset =3D fdt_add_subnode(fdt, event_sources, source_na= me)); _FDT(fdt_setprop(fdt, node_offset, "interrupts", interrupts, diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index c99721cde8..41d81f4a85 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -2063,7 +2063,7 @@ static void spapr_phb_pci_enumerate(sPAPRPHBState *ph= b) =20 } =20 -int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t xics_phandle, void = *fdt, +int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t intc_phandle, void = *fdt, uint32_t nr_msis) { int bus_off, i, j, ret; @@ -2161,8 +2161,8 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_= t xics_phandle, void *fdt, irqmap[1] =3D 0; irqmap[2] =3D 0; irqmap[3] =3D cpu_to_be32(j+1); - irqmap[4] =3D cpu_to_be32(xics_phandle); - spapr_dt_xics_irq(&irqmap[5], phb->lsi_table[lsi_num].irq, tru= e); + irqmap[4] =3D cpu_to_be32(intc_phandle); + spapr_dt_irq(&irqmap[5], phb->lsi_table[lsi_num].irq, true); } } /* Write interrupt map */ diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 414673d313..2b7e7ecac5 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -126,7 +126,7 @@ static int vio_make_devnode(VIOsPAPRDevice *dev, if (dev->irq) { uint32_t ints_prop[2]; =20 - spapr_dt_xics_irq(ints_prop, dev->irq, false); + spapr_dt_irq(ints_prop, dev->irq, false); ret =3D fdt_setprop(fdt, node_off, "interrupts", ints_prop, sizeof(ints_prop)); if (ret < 0) { diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index a5a7bf4837..51d81c4b7c 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -112,7 +112,7 @@ static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRP= HBState *phb, int pin) return spapr_qirq(spapr, phb->lsi_table[pin].irq); } =20 -int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t xics_phandle, void = *fdt, +int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t intc_phandle, void = *fdt, uint32_t nr_msis); =20 void spapr_pci_rtas_init(void); diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index a947a0a0dc..cbd276ed2b 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -683,7 +683,7 @@ void spapr_load_rtas(sPAPRMachineState *spapr, void *fd= t, hwaddr addr); * "interrupt-controller" node has its "#interrupt-cells" property set to = 2 (ie, * VIO devices, RTAS event sources and PHBs). */ -static inline void spapr_dt_xics_irq(uint32_t *intspec, int irq, bool is_l= si) +static inline void spapr_dt_irq(uint32_t *intspec, int irq, bool is_lsi) { intspec[0] =3D cpu_to_be32(irq); intspec[1] =3D is_lsi ? cpu_to_be32(1) : 0; --=20 2.20.1