From nobody Mon Feb 9 00:02:16 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1550493344660249.7791148105224; Mon, 18 Feb 2019 04:35:44 -0800 (PST) Received: from localhost ([127.0.0.1]:57518 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gvi8x-0000wF-KU for importer@patchew.org; Mon, 18 Feb 2019 07:35:31 -0500 Received: from eggs.gnu.org ([209.51.188.92]:37834) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gvi1E-0003cm-Mr for qemu-devel@nongnu.org; Mon, 18 Feb 2019 07:27:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gvi1C-0004LE-P5 for qemu-devel@nongnu.org; Mon, 18 Feb 2019 07:27:32 -0500 Received: from mx1.redhat.com ([209.132.183.28]:50682) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gvi1A-0004Ji-U3; Mon, 18 Feb 2019 07:27:29 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1875A99CE5; Mon, 18 Feb 2019 12:27:28 +0000 (UTC) Received: from t460s.redhat.com (unknown [10.36.118.48]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3C97A4528; Mon, 18 Feb 2019 12:27:26 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Mon, 18 Feb 2019 13:27:00 +0100 Message-Id: <20190218122710.23639-6-david@redhat.com> In-Reply-To: <20190218122710.23639-1-david@redhat.com> References: <20190218122710.23639-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 18 Feb 2019 12:27:28 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 05/15] s390x/tcg: Hide IEEE underflows in some scenarios X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Janosch Frank , David Hildenbrand , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" IEEE underflows are not reported when the mask bit is off and we don't also have an inexact exception. z14 PoP, 9-20, "IEEE Underflow": An IEEE-underflow exception is recognized for an IEEE target when the tininess condition exists and either: (1) the IEEE-underflow mask bit in the FPC register is zero and the result value is inexact, or (2) the IEEE-underflow mask bit in the FPC register is one. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/fpu_helper.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index dcad9c367a..64efab72a4 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -63,6 +63,19 @@ static void handle_exceptions(CPUS390XState *env, uintpt= r_t retaddr) env->fpu_status.float_exception_flags =3D 0; s390_exc =3D s390_softfloat_exc_to_ieee(qemu_exc); =20 + /* + * IEEE-Underflow exception recognition exists if a tininess condition + * (underflow) exists and + * - The mask bit in the FPC is zero and the result is inexact + * - The mask bit in the FPC is one + * So tininess conditions that are not inexact don't trigger any + * underflow action in case the mask bit is not one. + */ + if (!(s390_exc & S390_IEEE_MASK_INEXACT) && + !((env->fpc >> 24) & S390_IEEE_MASK_UNDERFLOW)) { + s390_exc &=3D ~S390_IEEE_MASK_UNDERFLOW; + } + /* * FIXME: * 1. Right now, all inexact conditions are inidicated as --=20 2.17.2