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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id j3sm1488073wmb.39.2019.02.14.04.51.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Feb 2019 04:51:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xO0SmjJi87cMCHBDYE6Aqyprx2bqu1BuqChTWfqFWYg=; b=jODasDd2CprkDE+SMmDJ85XKzxN4RW0kLA7p/4H/kR88P23aVkEW5u39Liy0jXgBfm 67fWPG3UMDqN+EK9ujfMGKZg3fEpDRYmtBkjfy709q8nPFE1sNzCc04I5QbIRcUkDCkT pOlOgUNYvQrH97+f8fomIEqpbkHLUQPj7DtVQ7N1haFuo2pLFkiYAYJteBfqXY3dDCUp iSqOBum1ac9DtwjksTyyRGjxg1DnS4/3K0IKfXPyydLv2kH6+w80P+Co4QfDoXqbIJKU PU8O+zIidJEx0D0qz8mdp4/xoZ2rWPdxdcUlRyDVuQXTkeMZuL8a6dZoR/SlgqIBnOJP 8BPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xO0SmjJi87cMCHBDYE6Aqyprx2bqu1BuqChTWfqFWYg=; b=rUHW4mhHHj65qt5wqOYGRRuWXkwOBSPYcums19nhdkNSZ9cZdJrcAOr9sMCyBZwQDT Kc16XqZ2s+Sf4pH9FlkfH/wdpSoSeHejSMLx8Qo5vbscZSeIFQHFQAhGcLBFKDiOcN1Z OJ9qOlcJVnmjBd2d8q9PL3bIyfH+EOcGa1T+HQXv2VJqry0DV1Z2aacQDO4U6q5XeW/x VZVuIEtvAR12pY9NMbqSg6BupA3jluT2EOdBbdwXJaLbV5/5GuPIVCrJASJhHx6h4C9W uhtZPQgDMpcyptysRBP/zKgRNNoMr2hDR2IKOfM32HT/KKVjzreW+2PgSy9KBY+c7Y3I syMQ== X-Gm-Message-State: AHQUAuZbQeHHfmBK4qvBi1MzQtaScZVv247o3020HRWRz77U+4fgJBo3 dMG5z7KBqdMw3Gu7dM1ZmzVYSQ== X-Google-Smtp-Source: AHgI3IYa4mmdjqp9q4vbOGXMjaOjY+HKEkQC3TyB6sOMiOKX7U21d9XXEvdIvDKlGJvdDRq7O2wQyw== X-Received: by 2002:a1c:6442:: with SMTP id y63mr2469483wmb.143.1550148670479; Thu, 14 Feb 2019 04:51:10 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 14 Feb 2019 12:50:54 +0000 Message-Id: <20190214125107.22178-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190214125107.22178-1-peter.maydell@linaro.org> References: <20190214125107.22178-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH 01/14] hw/arm/armsse: Fix miswiring of expansion IRQs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) In commit 91c1e9fcbd7548db368 where we added dual-CPU support to the ARMSSE, we set up the wiring of the expansion IRQs via nested loops: the outer loop on 'i' loops for each CPU, and the inner loop on 'j' loops for each interrupt. Fix a typo which meant we were wiring every expansion IRQ line to external IRQ 0 on CPU 0 and to external IRQ 1 on CPU 1. Fixes: 91c1e9fcbd7548db368 ("hw/arm/armsse: Support dual-CPU configuration") Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/arm/armsse.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 5d53071a5a0..9a8c49547db 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -565,7 +565,7 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) /* Connect EXP_IRQ/EXP_CPUn_IRQ GPIOs to the NVIC's lines 32 and u= p */ s->exp_irqs[i] =3D g_new(qemu_irq, s->exp_numirq); for (j =3D 0; j < s->exp_numirq; j++) { - s->exp_irqs[i][j] =3D qdev_get_gpio_in(cpudev, i + 32); + s->exp_irqs[i][j] =3D qdev_get_gpio_in(cpudev, j + 32); } if (i =3D=3D 0) { gpioname =3D g_strdup("EXP_IRQ"); --=20 2.20.1