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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id j3sm1488073wmb.39.2019.02.14.04.51.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Feb 2019 04:51:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fPHjh0vcD+s+CvwW5rloGqyfYyS+yolZGFn/O41zExg=; b=CJ2gk9o8AkB2+K7FMlmN4yNzeVcbZiMH7mupkS/ToqRV/qSeSkfCjD1ukhP3NVht8t xm/0A2aKXV4l+y5d8PVh0rGCdfb1JYgjfWCVggo4X9KC8b/Dp9EoiLGAhTQS1qTQnRDg R+ZA+4aQjPORvrvpR4vrC2yyaIhsRoK8g2dDqDUCgAP2UiXKLyS4yyCgG+GCRkC+1/9z JqGYkUzOnkj4su8bx/SqyP5O3bhYiGMOc1TfhVio8JIU+VEPIzThjQBQw1tfwOsA7AWT 3sCsEnBtdAGVJm1DHVEqj+XekOiD8Ni5w7lvQp/W6sc8vODqe1tiEBWmLRDPkXUtPkZb bq6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fPHjh0vcD+s+CvwW5rloGqyfYyS+yolZGFn/O41zExg=; b=GLSrgLmISANYtoqI4W0MzhHEPj1BsUymqu7WUXSfVf3G/Iew5mAe5sJeXEz81ivW5M bRsFneBZcXLbGvh2YwJCCC8TrrhLz+gq7d3dZawNwL8KICsHhqhTQG99TA00sgMcXo1o GO1ymZ5PQ0mr+uE0HCY4UrpCCSmYRopAD7cOM2N2mi3zqVUpT6KQiBlhqS4uE0urqDFP yiV7kc4aAQXHWVo6BmJ27gys/QFyzSqKP72ZFXUTaX2lZnrfZ5n9z7k63CmD39Jka5GD SY3grekAZIPSAQM7BzW/Iju6tXwG6J1X7ptqKyZt3i9cOYGitYp6SBNLGrgDtJkzpchA YJfg== X-Gm-Message-State: AHQUAubgylFP2yTUrt/HgwqJOHO3flW1afEBmuF1MP5i/Ac3M0r5u02J smeO0PUOyUujzhh/NbG1mWnU2jsCZuTh8A== X-Google-Smtp-Source: AHgI3IaHfwyJbWcOQDQld1eQooUpAkdSfEir3Y6geabb1Z77oVe4O6FCdMT3TYpY4RD6k9P8Czl/aw== X-Received: by 2002:adf:f80c:: with SMTP id s12mr2644877wrp.150.1550148684789; Thu, 14 Feb 2019 04:51:24 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 14 Feb 2019 12:51:06 +0000 Message-Id: <20190214125107.22178-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190214125107.22178-1-peter.maydell@linaro.org> References: <20190214125107.22178-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 Subject: [Qemu-devel] [PATCH 13/14] hw/arm/musca: Wire up PL031 RTC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Wire up the PL031 RTC for the Musca board. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/arm/musca.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/hw/arm/musca.c b/hw/arm/musca.c index 5fadac8c09b..ec8dfee1964 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -30,6 +30,7 @@ #include "hw/misc/tz-mpc.h" #include "hw/misc/tz-ppc.h" #include "hw/misc/unimp.h" +#include "hw/timer/pl031.h" =20 #define MUSCA_NUMIRQ_MAX 96 #define MUSCA_PPC_MAX 3 @@ -73,7 +74,7 @@ typedef struct { UnimplementedDeviceState spi; UnimplementedDeviceState scc; UnimplementedDeviceState timer; - UnimplementedDeviceState rtc; + PL031State rtc; UnimplementedDeviceState pvt; UnimplementedDeviceState sdio; UnimplementedDeviceState gpio; @@ -98,6 +99,14 @@ typedef struct { */ #define SYSCLK_FRQ 40000000 =20 +static qemu_irq get_sse_irq_in(MuscaMachineState *mms, int irqno) +{ + /* Return a qemu_irq which will signal IRQ n to all CPUs in the SSE. */ + assert(irqno < MUSCA_NUMIRQ_MAX); + + return qdev_get_gpio_in(DEVICE(&mms->cpu_irq_splitter[irqno]), 0); +} + /* * Most of the devices in the Musca board sit behind Peripheral Protection * Controllers. These data structures define the layout of which devices @@ -265,6 +274,17 @@ static MemoryRegion *make_mpc(MuscaMachineState *mms, = void *opaque, return sysbus_mmio_get_region(SYS_BUS_DEVICE(mpc), 0); } =20 +static MemoryRegion *make_rtc(MuscaMachineState *mms, void *opaque, + const char *name, hwaddr size) +{ + PL031State *rtc =3D opaque; + + sysbus_init_child_obj(OBJECT(mms), name, rtc, sizeof(mms->rtc), TYPE_P= L031); + object_property_set_bool(OBJECT(rtc), true, "realized", &error_fatal); + sysbus_connect_irq(SYS_BUS_DEVICE(rtc), 0, get_sse_irq_in(mms, 39)); + return sysbus_mmio_get_region(SYS_BUS_DEVICE(rtc), 0); +} + static MemoryRegion *make_musca_a_devs(MuscaMachineState *mms, void *opaqu= e, const char *name, hwaddr size) { @@ -287,7 +307,7 @@ static MemoryRegion *make_musca_a_devs(MuscaMachineStat= e *mms, void *opaque, { "i2c1", make_unimp_dev, &mms->i2c[1], 0x5000, 0x1000 }, { "i2s", make_unimp_dev, &mms->i2s, 0x6000, 0x1000 }, { "pwm0", make_unimp_dev, &mms->pwm[0], 0x7000, 0x1000 }, - { "rtc", make_unimp_dev, &mms->rtc, 0x8000, 0x1000 }, + { "rtc", make_rtc, &mms->rtc, 0x8000, 0x1000 }, { "qspi", make_unimp_dev, &mms->qspi, 0xa000, 0x1000 }, { "timer", make_unimp_dev, &mms->timer, 0xb000, 0x1000 }, { "scc", make_unimp_dev, &mms->scc, 0xc000, 0x1000 }, @@ -447,7 +467,7 @@ static void musca_init(MachineState *machine) { "spi", make_unimp_dev, &mms->spi, 0x4010a000, 0x1000 }, { "scc", make_unimp_dev, &mms->scc, 0x5010b000, 0x1000 }, { "timer", make_unimp_dev, &mms->timer, 0x4010c000, 0x1000= }, - { "rtc", make_unimp_dev, &mms->rtc, 0x4010d000, 0x1000 }, + { "rtc", make_rtc, &mms->rtc, 0x4010d000, 0x1000 }, { "pvt", make_unimp_dev, &mms->pvt, 0x4010e000, 0x1000 }, { "sdio", make_unimp_dev, &mms->sdio, 0x4010f000, 0x1000 }, }, --=20 2.20.1