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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id j6sm1255558pgq.33.2019.02.13.22.11.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 13 Feb 2019 22:11:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=T6kQR1zbXx6ORtsxWK90eARzEoucpVE/4UB8vc3PoZA=; b=E3Cbj2Hs7fblWCEI/n8VAmxdhcFpfmI7mjUFbqBoxtbHMsKsP9ncmByULaglyYZPF7 kLbipjLf6zfhq9Ny3iSLxAOw9V/mDgfS+cIRnmu7cwkmhstWKsU8LIPQz5JsOQyj8QkL nVStDsdZc5Ae/Zhtgdi+ozsm88BFOsNUsZtl+wpGS8WxQa7w//CL5SrpNLtExPhegxVt xP4eNtgtj5U5VZzAPT793ynFX1WkNdmIi8REGqlJ6/OSCrTs5Cx9ROlwR/9PA9CEvAZE QDH1JJLmMnCbJ0+oEgjOYKHSsrS7AOqjGDPDUjmKKRohxf7SLADAO5fadqk46rgH5q5S OoUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=T6kQR1zbXx6ORtsxWK90eARzEoucpVE/4UB8vc3PoZA=; b=q/N6yYSWBkNkR7EWaxciQ7kTGfK+pY8J8P6TsPZQIz4m142U5Fe78y+lc770ZvoVcN Fwg7Be4SKj5oPDxp4Ip1MyWwNl2mdZnN+hvfngfxLiI6kf/+9NXW/t8sYntVOOM0PDfT q2U6cKNT77CO8hjkMLV/tzBOV2AJN3yJVoyif3ExjYFRfOfUxTuYXtlAXcqzXQxeoUil riHX4tXKWCYeJQpW8+uhYa8NiuILgjanLRpCjxFH2oUEuu/Q+PP2sSaHvCIVKUbilmnn 8NsnbKf+PDKCQbZY1TidSLg5g+LIzFpOMYGjcqlMPEThtKVcfzK6j99+nQLE8wXr2Qhe ekjw== X-Gm-Message-State: AHQUAub8JMXy4ViCBGiWU5xpMm2G6AawLiKk0FWZcbD+IeH30qit1GBa MXycXelaZ5L6SLibgjTVNr7Jviywv+U= X-Google-Smtp-Source: AHgI3Ibm3bc2fC7HtEOZfr6NR8BF7V+57IPSq6LPDUmOGd+/ReHKfCQSyIPf/Kh/axXF3fSFKTqL4A== X-Received: by 2002:a63:4384:: with SMTP id q126mr2179545pga.160.1550124716501; Wed, 13 Feb 2019 22:11:56 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 13 Feb 2019 22:11:54 -0800 Message-Id: <20190214061154.30457-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PATCH] softfloat: Support float_round_to_odd more places X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, alex.bennee@linaro.org, david@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Previously this was only supported for roundAndPackFloat64. Include support in round_canonical, round_to_int, roundAndPackFloat32, roundAndPackInt32, roundAndPackInt64, roundAndPackUint64. This does not include any of the floatx80 routines, as we do not have users for that rounding mode there. Signed-off-by: Richard Henderson --- David, if you could test this vs your s390 patches, vs real s390 hardware, that would be lovely. r~ --- fpu/softfloat.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 9132d7a0b0..325c6e4e79 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -696,6 +696,7 @@ static FloatParts sf_canonicalize(FloatParts part, cons= t FloatFmt *parm, static FloatParts round_canonical(FloatParts p, float_status *s, const FloatFmt *parm) { + const uint64_t frac_lsb =3D parm->frac_lsb; const uint64_t frac_lsbm1 =3D parm->frac_lsbm1; const uint64_t round_mask =3D parm->round_mask; const uint64_t roundeven_mask =3D parm->roundeven_mask; @@ -731,6 +732,10 @@ static FloatParts round_canonical(FloatParts p, float_= status *s, inc =3D p.sign ? round_mask : 0; overflow_norm =3D !p.sign; break; + case float_round_to_odd: + overflow_norm =3D true; + inc =3D frac & frac_lsb ? 0 : frac_lsbm1; + break; default: g_assert_not_reached(); } @@ -778,9 +783,14 @@ static FloatParts round_canonical(FloatParts p, float_= status *s, shift64RightJamming(frac, 1 - exp, &frac); if (frac & round_mask) { /* Need to recompute round-to-even. */ - if (s->float_rounding_mode =3D=3D float_round_nearest_even= ) { + switch (s->float_rounding_mode) { + case float_round_nearest_even: inc =3D ((frac & roundeven_mask) !=3D frac_lsbm1 ? frac_lsbm1 : 0); + break; + case float_round_to_odd: + inc =3D frac & frac_lsb ? 0 : frac_lsbm1; + break; } flags |=3D float_flag_inexact; frac +=3D inc; @@ -1988,6 +1998,9 @@ static FloatParts round_to_int(FloatParts a, int rmod= e, case float_round_down: one =3D a.sign; break; + case float_round_to_odd: + one =3D true; + break; default: g_assert_not_reached(); } @@ -2021,6 +2034,9 @@ static FloatParts round_to_int(FloatParts a, int rmod= e, case float_round_down: inc =3D a.sign ? rnd_mask : 0; break; + case float_round_to_odd: + inc =3D a.frac & frac_lsb ? 0 : frac_lsbm1; + break; default: g_assert_not_reached(); } @@ -3314,6 +3330,9 @@ static int32_t roundAndPackInt32(flag zSign, uint64_t= absZ, float_status *status case float_round_down: roundIncrement =3D zSign ? 0x7f : 0; break; + case float_round_to_odd: + roundIncrement =3D absZ & 0x80 ? 0 : 0x7f; + break; default: abort(); } @@ -3368,6 +3387,9 @@ static int64_t roundAndPackInt64(flag zSign, uint64_t= absZ0, uint64_t absZ1, case float_round_down: increment =3D zSign && absZ1; break; + case float_round_to_odd: + increment =3D !(absZ0 & 1) && absZ1; + break; default: abort(); } @@ -3424,6 +3446,9 @@ static int64_t roundAndPackUint64(flag zSign, uint64_= t absZ0, case float_round_down: increment =3D zSign && absZ1; break; + case float_round_to_odd: + increment =3D !(absZ0 & 1) && absZ1; + break; default: abort(); } @@ -3526,6 +3551,8 @@ static float32 roundAndPackFloat32(flag zSign, int zE= xp, uint32_t zSig, case float_round_down: roundIncrement =3D zSign ? 0x7f : 0; break; + case float_round_to_odd: + roundIncrement =3D zSig & 0x80 ? 0 : 0x7f; default: abort(); break; @@ -3536,8 +3563,10 @@ static float32 roundAndPackFloat32(flag zSign, int z= Exp, uint32_t zSig, || ( ( zExp =3D=3D 0xFD ) && ( (int32_t) ( zSig + roundIncrement ) < 0 ) ) ) { + bool overflow_to_inf =3D roundingMode !=3D float_round_to_odd = && + roundIncrement !=3D 0; float_raise(float_flag_overflow | float_flag_inexact, status); - return packFloat32( zSign, 0xFF, - ( roundIncrement =3D=3D 0 )= ); + return packFloat32(zSign, 0xFF, -!overflow_to_inf); } if ( zExp < 0 ) { if (status->flush_to_zero) { @@ -3555,6 +3584,13 @@ static float32 roundAndPackFloat32(flag zSign, int z= Exp, uint32_t zSig, if (isTiny && roundBits) { float_raise(float_flag_underflow, status); } + if (roundingMode =3D=3D float_round_to_odd) { + /* + * For round-to-odd case, the roundIncrement depends on + * zSig which just changed. + */ + roundIncrement =3D zSig & 0x80 ? 0 : 0x7f; + } } } if (roundBits) { --=20 2.17.2