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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id g14sm17177630pfg.27.2019.02.10.17.08.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 10 Feb 2019 17:08:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=t1Ac8wdCYYJyzUaPePYMhujZZB6jvuYyMH+INQ2PV8M=; b=zFz7sTPfqDnYF/jbhcnb/KEZRnordxjRQ+IJglgMBj+JArhgiwbROjQ/dQS/WC5oBS kokP0wQ2jKpTS8zfONNip6cMNr6KXQ/OxVSqnlSx0KeJUxFSE98mg8JkncvoupCR8Swd eJHGH7wukmoPPjBivleVo5N3pcMuJj5ztSO3wzGPo6YjbHhn52Otp/+oJTYSwtAwzwhP KrNz40VoDXADBqT7uXDgowgRUBTw9UkGzXMk+QJOmncu13mAfbjO7uSikcLVO3SIsdEV pHveLwIr/O+CZyRrUpsVBdwGGyOpIfUrn2BW27Q29RAvp7jff7Xey1bwjSDUPzlnp7P2 075Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=t1Ac8wdCYYJyzUaPePYMhujZZB6jvuYyMH+INQ2PV8M=; b=gv5own8UJOBFNJPkIUnmuPjH0p9nVh6OgKSTCRJmhlOAO22iWhLT5Q+GxFVbhkahGd HIsKxeYj01KRXPRCsFY+by5lJknBZlQLBx/PG9Kp1kD5LYKItRye4EklG1O0UQN1TERF SugC05slh23JQi2Xn5bXxD86li66aIJAGv5Qv5E7Ac0mKPo3VpQFUPJ9wn3IjDXrARK/ gn3ZZeX221SaB2imPaxt2xPVJAN1ktbvWywY5V5ncwjBnAVH0RlfBVULqBNpJJDIiaT0 YJwK23cKSwg7oEuNYZnyPczM1vzYDrP16OZY0Jtt3MWVP4it1AgxM3gZYTj5KhbJQP1/ ThKw== X-Gm-Message-State: AHQUAuaVyzkpMz0H34BZpFh8M27uu/GLPKFxfRkxzLTaLozVh0ZmEAjU aJBYsn9xw/8Srbr7rjm5Du3a4FtIyxo= X-Google-Smtp-Source: AHgI3IYiIUwYIo6VwmTJpKdu/B3dPQDQYsQ9q4KVdJ6wcaCElD/EeOHjCzlkFdAivK3Z02Vmd07hRA== X-Received: by 2002:a63:5462:: with SMTP id e34mr20081740pgm.97.1549847313272; Sun, 10 Feb 2019 17:08:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 10 Feb 2019 17:08:04 -0800 Message-Id: <20190211010829.29869-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190211010829.29869-1-richard.henderson@linaro.org> References: <20190211010829.29869-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 Subject: [Qemu-devel] [PATCH v2 01/26] target/arm: Split out arm_sctlr X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Minimize the number of places that will need updating when the virtual host extensions are added. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 26 ++++++++++++++++---------- target/arm/helper.c | 8 ++------ 2 files changed, 18 insertions(+), 16 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 29663a264d..20be9fb53a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2987,11 +2987,20 @@ static inline bool arm_sctlr_b(CPUARMState *env) (env->cp15.sctlr_el[1] & SCTLR_B) !=3D 0; } =20 +static inline uint64_t arm_sctlr(CPUARMState *env, int el) +{ + if (el =3D=3D 0) { + /* FIXME: ARMv8.1-VHE S2 translation regime. */ + return env->cp15.sctlr_el[1]; + } else { + return env->cp15.sctlr_el[el]; + } +} + + /* Return true if the processor is in big-endian mode. */ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env) { - int cur_el; - /* In 32bit endianness is determined by looking at CPSR's E bit */ if (!is_a64(env)) { return @@ -3010,15 +3019,12 @@ static inline bool arm_cpu_data_is_big_endian(CPUAR= MState *env) arm_sctlr_b(env) || #endif ((env->uncached_cpsr & CPSR_E) ? 1 : 0); + } else { + int cur_el =3D arm_current_el(env); + uint64_t sctlr =3D arm_sctlr(env, cur_el); + + return (sctlr & (cur_el ? SCTLR_EE : SCTLR_E0E)) !=3D 0; } - - cur_el =3D arm_current_el(env); - - if (cur_el =3D=3D 0) { - return (env->cp15.sctlr_el[1] & SCTLR_E0E) !=3D 0; - } - - return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) !=3D 0; } =20 #include "exec/cpu-all.h" diff --git a/target/arm/helper.c b/target/arm/helper.c index 520ceea7a4..d4abbb5076 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -13796,12 +13796,8 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target= _ulong *pc, flags =3D FIELD_DP32(flags, TBFLAG_A64, ZCR_LEN, zcr_len); } =20 - if (current_el =3D=3D 0) { - /* FIXME: ARMv8.1-VHE S2 translation regime. */ - sctlr =3D env->cp15.sctlr_el[1]; - } else { - sctlr =3D env->cp15.sctlr_el[current_el]; - } + sctlr =3D arm_sctlr(env, current_el); + if (cpu_isar_feature(aa64_pauth, cpu)) { /* * In order to save space in flags, we record only whether --=20 2.17.2