From nobody Tue May 7 03:35:36 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1549431047727635.1837678794334; Tue, 5 Feb 2019 21:30:47 -0800 (PST) Received: from localhost ([127.0.0.1]:45387 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1grFn9-0004dr-Eo for importer@patchew.org; Wed, 06 Feb 2019 00:30:35 -0500 Received: from eggs.gnu.org ([209.51.188.92]:53322) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1grFlg-0003kS-MG for qemu-devel@nongnu.org; Wed, 06 Feb 2019 00:29:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1grFlf-00068w-Tw for qemu-devel@nongnu.org; Wed, 06 Feb 2019 00:29:04 -0500 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:35712) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1grFlf-00068e-OR for qemu-devel@nongnu.org; Wed, 06 Feb 2019 00:29:03 -0500 Received: by mail-wm1-x341.google.com with SMTP id t200so1254299wmt.0 for ; Tue, 05 Feb 2019 21:29:03 -0800 (PST) Received: from cloudburst.twiddle.net (host81-133-38-158.in-addr.btopenworld.com. [81.133.38.158]) by smtp.gmail.com with ESMTPSA id g9sm19057394wmg.44.2019.02.05.21.29.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 05 Feb 2019 21:29:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zZQkf4a5k7qrShiELsVl07fSsipQr63jb6Qv20mG5js=; b=CcYB05ijfZo0uLKHeYuSvP38deJWfXO5gqxPAokbgTZdVWgKw1MwGL7CL7fmM2Px3G ize9TPxsiVw2rhiAaWSJ1VtIVVbXXg0PVHWQ7jYeyAnlLLuXltvpiV9sk5fytC/EH+50 C+b6x8kr2kmU0lseBKG7GgJ44BTLUjvam+5IpaM3lXQo8FPh73n1AXhrYAcMbh24nnF9 Ne9um2QoZHY2oeMbj3cHISEadwkCd7ZBGzPy3bJdO7qjKk6qxbVwRMNdVienOYMMAQto fw7UygnOuvenrHxNGXVbxxa3dNX1mu6tC6ZJsjk/BwTDalQPYDJoPpn22u0ytKCQ53mG mGyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zZQkf4a5k7qrShiELsVl07fSsipQr63jb6Qv20mG5js=; b=cJTkECXRpLl8mGwMO/RJYhuUlsLMeYUkEtQhcx1Q3SooHZmNE4aaBt8SuSV+3zAUkp fB9jsz9L72aCTz9ErjyV4Mv68X+Ur6jasmbmfaD5torVbLWip2Sp5rbg1Pdcb3OSpI1N 9Q3RcEmkmMcn0ekAZf7cUNve4ndVQ0o+r6LyOYL3hVFFr1QDSAc0E5I5cQu3S5zj4xRI EO+aqAOZ6Ofq7A4MI+hin7uQpyZF/YR6TZtZdQszUXalslUuUyk4N/8zwTdYxKTRaaOa /VRvJczx+ckOmIPlZwPsym3motofF7S/0xrgXKUqbiPVo0ukn7FxbDRzwwYi26S2IgyI Yuaw== X-Gm-Message-State: AHQUAuYINUF4nKMACR1OSWJ0J9jenvzBK1cP207lg2WfCqf5Xn0JVEcH jwuUM9YJNSGJWOHQuDT159rIXUP6mUbG7w== X-Google-Smtp-Source: AHgI3IZok4qaw8XNV8Nfd5BVgoJjoRm2TAZmFaAwINGkFZWR46+n2Igv5CrlBFYotOdwNN0KsOatVg== X-Received: by 2002:a1c:dcd4:: with SMTP id t203mr1510238wmg.139.1549430942348; Tue, 05 Feb 2019 21:29:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 6 Feb 2019 05:28:55 +0000 Message-Id: <20190206052857.5077-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190206052857.5077-1-richard.henderson@linaro.org> References: <20190206052857.5077-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH v2 1/3] target/arm: Force result size into dp after operation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Rather than a complex set of cases testing for writeback, adjust DP after performing the operation. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/translate.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 66cf28c8cb..eb25895876 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3970,6 +3970,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t i= nsn) tcg_gen_or_i32(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); gen_vfp_msr(tmp); + dp =3D 0; /* always a single precision result */ break; } case 7: /* vcvtt.f16.f32, vcvtt.f16.f64 */ @@ -3993,20 +3994,25 @@ static int disas_vfp_insn(DisasContext *s, uint32_t= insn) tcg_gen_or_i32(tmp, tmp, tmp2); tcg_temp_free_i32(tmp2); gen_vfp_msr(tmp); + dp =3D 0; /* always a single precision result */ break; } case 8: /* cmp */ gen_vfp_cmp(dp); + dp =3D -1; /* no write back */ break; case 9: /* cmpe */ gen_vfp_cmpe(dp); + dp =3D -1; /* no write back */ break; case 10: /* cmpz */ gen_vfp_cmp(dp); + dp =3D -1; /* no write back */ break; case 11: /* cmpez */ gen_vfp_F1_ld0(dp); gen_vfp_cmpe(dp); + dp =3D -1; /* no write back */ break; case 12: /* vrintr */ { @@ -4047,10 +4053,12 @@ static int disas_vfp_insn(DisasContext *s, uint32_t= insn) break; } case 15: /* single<->double conversion */ - if (dp) + if (dp) { gen_helper_vfp_fcvtsd(cpu_F0s, cpu_F0d, cpu_en= v); - else + } else { gen_helper_vfp_fcvtds(cpu_F0d, cpu_F0s, cpu_en= v); + } + dp =3D !dp; /* result size is opposite */ break; case 16: /* fuito */ gen_vfp_uito(dp, 0); @@ -4084,15 +4092,19 @@ static int disas_vfp_insn(DisasContext *s, uint32_t= insn) break; case 24: /* ftoui */ gen_vfp_toui(dp, 0); + dp =3D 0; /* always an integer result */ break; case 25: /* ftouiz */ gen_vfp_touiz(dp, 0); + dp =3D 0; /* always an integer result */ break; case 26: /* ftosi */ gen_vfp_tosi(dp, 0); + dp =3D 0; /* always an integer result */ break; case 27: /* ftosiz */ gen_vfp_tosiz(dp, 0); + dp =3D 0; /* always an integer result */ break; case 28: /* ftosh */ if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) { @@ -4126,20 +4138,8 @@ static int disas_vfp_insn(DisasContext *s, uint32_t = insn) return 1; } =20 - /* Write back the result. */ - if (op =3D=3D 15 && (rn >=3D 8 && rn <=3D 11)) { - /* Comparison, do nothing. */ - } else if (op =3D=3D 15 && dp && ((rn & 0x1c) =3D=3D 0x18 = || - (rn & 0x1e) =3D=3D 0x6)) { - /* VCVT double to int: always integer result. - * VCVT double to half precision is always a single - * precision result. - */ - gen_mov_vreg_F0(0, rd); - } else if (op =3D=3D 15 && rn =3D=3D 15) { - /* conversion */ - gen_mov_vreg_F0(!dp, rd); - } else { + /* Write back the result, if any. */ + if (dp >=3D 0) { gen_mov_vreg_F0(dp, rd); } =20 --=20 2.17.2 From nobody Tue May 7 03:35:36 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1549431048616906.6683439936864; Tue, 5 Feb 2019 21:30:48 -0800 (PST) Received: from localhost ([127.0.0.1]:45398 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1grFnC-0004fn-8W for importer@patchew.org; Wed, 06 Feb 2019 00:30:38 -0500 Received: from eggs.gnu.org ([209.51.188.92]:53335) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1grFli-0003l5-6S for qemu-devel@nongnu.org; Wed, 06 Feb 2019 00:29:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1grFlh-00069f-CB for qemu-devel@nongnu.org; Wed, 06 Feb 2019 00:29:06 -0500 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:34488) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1grFlh-00069H-6V for qemu-devel@nongnu.org; Wed, 06 Feb 2019 00:29:05 -0500 Received: by mail-wr1-x442.google.com with SMTP id z15so4070691wrn.1 for ; Tue, 05 Feb 2019 21:29:05 -0800 (PST) Received: from cloudburst.twiddle.net (host81-133-38-158.in-addr.btopenworld.com. [81.133.38.158]) by smtp.gmail.com with ESMTPSA id g9sm19057394wmg.44.2019.02.05.21.29.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 05 Feb 2019 21:29:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ij+VvMOypxEBP+HLSOzfpJHmuZw6B9qxZK/GJcNhZMk=; b=zSHijy0RaiEkH/c5D8wZGHAoyFO8mGp0wudcYehNjE9TbanP6wAFjoFC4RCflF0QK+ eQ3TDKN1vF5o/HICl9ZJFsYwe/6zaKg/MZzrIRxpm8ZjvcXdkDDIiZjrdwqDpJZ78KxF ePvAYeALjcVtGon73RjDvgqayTOj59GBRUGHI0oXEB2esqOaYP9E7MPKXg6K7vJdnjNA GV9e4hVLhZfTYxdaayRuowa34j8aNJ9va/ZAapP3LKbt6w9YxvBDbDV2F/PZGWxyNWGu bvs4DRQ56M3rSolEK/dhTp1UsspHt5WJTLeRFDfWQ1M0KWFGJnQPSCfBzSo88ANI/7RK znFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ij+VvMOypxEBP+HLSOzfpJHmuZw6B9qxZK/GJcNhZMk=; b=ZUz0QFMkgFpyMQQjhjoOZcqPBwV1WIKTIvls7Mz9+5yHE8QbPTatsjoEYq03/HjqO+ 4XMZxFtO4T0N0VcPKPLRXORpLCw9bQtCPPR92ld3Pod3E4+DCcMY77eK0FiY6yBbkKFP mAdz5SjztDBuvXnMyaqoUvKWm/NUyYfmAYqNqOC/mGl3mET4KR6STiGYXzoXJlfBKTKZ R8jVqzRndfJBH9Jaqa85dEgJILaPefuCcVTNQbs9EouAbx/ALmdusH7OPWvHveaQIDYS K59APUWhhVFxVTGo9QeYNRv1E76ypLqAiDAKdq3IYzHrOxS4hvjEEcZqNICgFbcDsC2U +bXw== X-Gm-Message-State: AHQUAuZ3yfVTyc0BjxG9sNOL4oN6s5R+b0McSw2oo6cJlrwSmkeGmojm jdeOeRCZiGZJwKia8DMThbXZKIL+eppG0g== X-Google-Smtp-Source: AHgI3IYb60GM5yjTHR75QiNNQyqA/gSx8QpTiWexWekZyJcQzVva+C8hEK6jDwKQgfakmdpvogteUg== X-Received: by 2002:a5d:4486:: with SMTP id j6mr5988027wrq.41.1549430943889; Tue, 05 Feb 2019 21:29:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 6 Feb 2019 05:28:56 +0000 Message-Id: <20190206052857.5077-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190206052857.5077-1-richard.henderson@linaro.org> References: <20190206052857.5077-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PATCH v2 2/3] target/arm: Restructure disas_fp_int_conv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" For opcodes 0-5, move some if conditions into the structure of a switch statement. For opcodes 6 & 7, decode everything at once with a second switch. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/translate-a64.c | 94 ++++++++++++++++++++------------------ 1 file changed, 49 insertions(+), 45 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index e002251ac6..2f849a6951 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -6541,68 +6541,72 @@ static void disas_fp_int_conv(DisasContext *s, uint= 32_t insn) int type =3D extract32(insn, 22, 2); bool sbit =3D extract32(insn, 29, 1); bool sf =3D extract32(insn, 31, 1); + bool itof =3D false; =20 if (sbit) { - unallocated_encoding(s); - return; + goto do_unallocated; } =20 - if (opcode > 5) { - /* FMOV */ - bool itof =3D opcode & 1; - - if (rmode >=3D 2) { - unallocated_encoding(s); - return; - } - - switch (sf << 3 | type << 1 | rmode) { - case 0x0: /* 32 bit */ - case 0xa: /* 64 bit */ - case 0xd: /* 64 bit to top half of quad */ - break; - case 0x6: /* 16-bit float, 32-bit int */ - case 0xe: /* 16-bit float, 64-bit int */ - if (dc_isar_feature(aa64_fp16, s)) { - break; - } - /* fallthru */ - default: - /* all other sf/type/rmode combinations are invalid */ - unallocated_encoding(s); - return; - } - - if (!fp_access_check(s)) { - return; - } - handle_fmov(s, rd, rn, type, itof); - } else { - /* actual FP conversions */ - bool itof =3D extract32(opcode, 1, 1); - - if (rmode !=3D 0 && opcode > 1) { - unallocated_encoding(s); - return; + switch (opcode) { + case 2: /* SCVTF */ + case 3: /* UCVTF */ + itof =3D true; + /* fallthru */ + case 4: /* FCVTAS */ + case 5: /* FCVTAU */ + if (rmode !=3D 0) { + goto do_unallocated; } + /* fallthru */ + case 0: /* FCVT[NPMZ]S */ + case 1: /* FCVT[NPMZ]U */ switch (type) { case 0: /* float32 */ case 1: /* float64 */ break; case 3: /* float16 */ - if (dc_isar_feature(aa64_fp16, s)) { - break; + if (!dc_isar_feature(aa64_fp16, s)) { + goto do_unallocated; } - /* fallthru */ + break; default: - unallocated_encoding(s); - return; + goto do_unallocated; } - if (!fp_access_check(s)) { return; } handle_fpfpcvt(s, rd, rn, opcode, itof, rmode, 64, sf, type); + break; + + default: + switch (sf << 7 | type << 5 | rmode << 3 | opcode) { + case 0b01100110: /* FMOV half <-> 32-bit int */ + case 0b01100111: + case 0b11100110: /* FMOV half <-> 64-bit int */ + case 0b11100111: + if (!dc_isar_feature(aa64_fp16, s)) { + goto do_unallocated; + } + /* fallthru */ + case 0b00000110: /* FMOV 32-bit */ + case 0b00000111: + case 0b10100110: /* FMOV 64-bit */ + case 0b10100111: + case 0b11001110: /* FMOV top half of 128-bit */ + case 0b11001111: + if (!fp_access_check(s)) { + return; + } + itof =3D opcode & 1; + handle_fmov(s, rd, rn, type, itof); + break; + + default: + do_unallocated: + unallocated_encoding(s); + return; + } + break; } } =20 --=20 2.17.2 From nobody Tue May 7 03:35:36 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 15494311797231008.4267379073868; Tue, 5 Feb 2019 21:32:59 -0800 (PST) Received: from localhost ([127.0.0.1]:45415 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1grFpI-0006AK-HE for importer@patchew.org; Wed, 06 Feb 2019 00:32:48 -0500 Received: from eggs.gnu.org ([209.51.188.92]:53355) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1grFlk-0003mr-9I for qemu-devel@nongnu.org; Wed, 06 Feb 2019 00:29:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1grFli-0006AO-UR for qemu-devel@nongnu.org; Wed, 06 Feb 2019 00:29:08 -0500 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:39116) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1grFli-00069y-M2 for qemu-devel@nongnu.org; Wed, 06 Feb 2019 00:29:06 -0500 Received: by mail-wr1-x442.google.com with SMTP id t27so6107183wra.6 for ; Tue, 05 Feb 2019 21:29:06 -0800 (PST) Received: from cloudburst.twiddle.net (host81-133-38-158.in-addr.btopenworld.com. [81.133.38.158]) by smtp.gmail.com with ESMTPSA id g9sm19057394wmg.44.2019.02.05.21.29.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 05 Feb 2019 21:29:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4aGhOqb/f0MMWpRA3SaNTnNHXQzX7rYwLHTSfXiLLio=; b=CRheJDgBpyu2xgUVsOiPm5+B9gAa0i+Bz1pdaUX6EwI/kzvISDXZjVUJwc0dPJ9lJv bgHJaY++OKrUdqCfA3upsx5w8kDrl5P+k5uhZKENAzuIoQgxsdrSdT7RcfK+gF44bltL L4iUDI8mVmjI18+g5l5iZ5VzmN5+tvu/zLHuSpoZ+MhqOaJtbm9bHggv4W0JG02q8v8y 7S72NTUg23Xtrmi1N734S4+g5QL78jMcK/dFgIDgPz/VrVnJpJqNMrF6SKXCN0mvGNx2 lKMR+64XPVv9GSN9XOS2FHQCw+Wxdw1h84LW6BLRI93gCSAkrs0Ybah6B0FAJVmOBxN2 8PSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4aGhOqb/f0MMWpRA3SaNTnNHXQzX7rYwLHTSfXiLLio=; b=cx6SX5JykSjvazV/pASc5flTNohLJrijvQUih7p021KNa9wLNVB5GxMN2l4nDusiTf M8nvlHbmxPHDLCgbMXFudWD+zaoPDF+V7gs6rvRbKI/6dPGgao1AxfJdksYYBadUs7HN g/lvYxBG81fnnn8t4U1OB9CN9XhcfqYOosKFTJbDha/7rsp5NfrI7pxSU1SN7Qwp8r9a E297SzgQcUHFk+BLniBkhxmVveSIY5XughHyDdaq080HyOhLD6UG5yrrxXsjGRr9DFVv aUukFgbeu2pH+qty1qQbLGBSNSShoAAQy/pwc0bQ4Eh6PK2hQabHIeshuCc7cid98SbV MvHg== X-Gm-Message-State: AHQUAuY0o0p5X0iXIT0mgmE7BXwn0Of/mFMroj/vr6NoK8aIo39C+BqC 9WmKwMtkt085J5aTHTQamkerOl6jCRPLVQ== X-Google-Smtp-Source: AHgI3IbY6zjwtQDHwHIlsnL450EQz00bOGKAaR93G9kPpBV9GWMBmsZGL0b5Du0okg85MfcmXDwHvA== X-Received: by 2002:adf:fc51:: with SMTP id e17mr6149240wrs.268.1549430945396; Tue, 05 Feb 2019 21:29:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 6 Feb 2019 05:28:57 +0000 Message-Id: <20190206052857.5077-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190206052857.5077-1-richard.henderson@linaro.org> References: <20190206052857.5077-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PATCH v2 3/3] target/arm: Implement ARMv8.3-JSConv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Tested-by: Laurent Desnogues --- v2: Return 0 for NaN --- target/arm/cpu.h | 10 +++++ target/arm/helper.h | 2 + target/arm/cpu.c | 1 + target/arm/cpu64.c | 2 + target/arm/op_helper.c | 76 ++++++++++++++++++++++++++++++++++++++ target/arm/translate-a64.c | 26 +++++++++++++ target/arm/translate.c | 15 ++++++++ 7 files changed, 132 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 47238e4245..bfc532f0ca 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3227,6 +3227,11 @@ static inline bool isar_feature_aa32_vcma(const ARMI= SARegisters *id) return FIELD_EX32(id->id_isar5, ID_ISAR5, VCMA) !=3D 0; } =20 +static inline bool isar_feature_aa32_jscvt(const ARMISARegisters *id) +{ + return FIELD_EX32(id->id_isar6, ID_ISAR6, JSCVT) !=3D 0; +} + static inline bool isar_feature_aa32_dp(const ARMISARegisters *id) { return FIELD_EX32(id->id_isar6, ID_ISAR6, DP) !=3D 0; @@ -3305,6 +3310,11 @@ static inline bool isar_feature_aa64_dp(const ARMISA= Registers *id) return FIELD_EX64(id->id_aa64isar0, ID_AA64ISAR0, DP) !=3D 0; } =20 +static inline bool isar_feature_aa64_jscvt(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, JSCVT) !=3D 0; +} + static inline bool isar_feature_aa64_fcma(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, FCMA) !=3D 0; diff --git a/target/arm/helper.h b/target/arm/helper.h index 53a38188c6..6998f7e8d5 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -218,6 +218,8 @@ DEF_HELPER_FLAGS_2(rintd_exact, TCG_CALL_NO_RWG, f64, f= 64, ptr) DEF_HELPER_FLAGS_2(rints, TCG_CALL_NO_RWG, f32, f32, ptr) DEF_HELPER_FLAGS_2(rintd, TCG_CALL_NO_RWG, f64, f64, ptr) =20 +DEF_HELPER_FLAGS_2(fjcvtzs, TCG_CALL_NO_RWG, i64, f64, ptr) + /* neon_helper.c */ DEF_HELPER_FLAGS_3(neon_qadd_u8, TCG_CALL_NO_RWG, i32, env, i32, i32) DEF_HELPER_FLAGS_3(neon_qadd_s8, TCG_CALL_NO_RWG, i32, env, i32, i32) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index edf6e0e1f1..8ea6569088 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2001,6 +2001,7 @@ static void arm_max_initfn(Object *obj) cpu->isar.id_isar5 =3D t; =20 t =3D cpu->isar.id_isar6; + t =3D FIELD_DP32(t, ID_ISAR6, JSCVT, 1); t =3D FIELD_DP32(t, ID_ISAR6, DP, 1); cpu->isar.id_isar6 =3D t; =20 diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index eff0f164dd..69e4134f79 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -311,6 +311,7 @@ static void aarch64_max_initfn(Object *obj) cpu->isar.id_aa64isar0 =3D t; =20 t =3D cpu->isar.id_aa64isar1; + t =3D FIELD_DP64(t, ID_AA64ISAR1, JSCVT, 1); t =3D FIELD_DP64(t, ID_AA64ISAR1, FCMA, 1); t =3D FIELD_DP64(t, ID_AA64ISAR1, APA, 1); /* PAuth, architected o= nly */ t =3D FIELD_DP64(t, ID_AA64ISAR1, API, 0); @@ -344,6 +345,7 @@ static void aarch64_max_initfn(Object *obj) cpu->isar.id_isar5 =3D u; =20 u =3D cpu->isar.id_isar6; + u =3D FIELD_DP32(u, ID_ISAR6, JSCVT, 1); u =3D FIELD_DP32(u, ID_ISAR6, DP, 1); cpu->isar.id_isar6 =3D u; =20 diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index c998eadfaa..be555c44e4 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -24,6 +24,7 @@ #include "internals.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "fpu/softfloat.h" =20 #define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT64 ((uint64_t)1 << 63) @@ -1376,3 +1377,78 @@ uint32_t HELPER(ror_cc)(CPUARMState *env, uint32_t x= , uint32_t i) return ((uint32_t)x >> shift) | (x << (32 - shift)); } } + +/* + * Implement float64 to int32_t conversion without saturation; + * the result is supplied modulo 2^32. + */ +uint64_t HELPER(fjcvtzs)(float64 value, void *vstatus) +{ + float_status *status =3D vstatus; + uint32_t exp, sign; + uint64_t frac; + uint32_t inexact =3D 1; /* !Z */ + + sign =3D extract64(value, 63, 1); + exp =3D extract64(value, 52, 11); + frac =3D extract64(value, 0, 52); + + if (exp =3D=3D 0) { + /* While not inexact for IEEE FP, -0.0 is inexact for JavaScript. = */ + inexact =3D sign; + if (frac !=3D 0) { + if (status->flush_inputs_to_zero) { + float_raise(float_flag_input_denormal, status); + } else { + float_raise(float_flag_inexact, status); + inexact =3D 1; + } + } + frac =3D 0; + } else if (exp =3D=3D 0x7ff) { + /* This operation raises Invalid for both NaN and overflow (Inf). = */ + float_raise(float_flag_invalid, status); + frac =3D 0; + } else { + int true_exp =3D exp - 1023; + int shift =3D true_exp - 52; + + /* Restore implicit bit. */ + frac |=3D 1ull << 52; + + /* Shift the fraction into place. */ + if (shift >=3D 0) { + /* The number is so large we must shift the fraction left. */ + if (shift >=3D 64) { + /* The the fraction is shifted out entirely. */ + frac =3D 0; + } else { + frac <<=3D shift; + } + } else if (shift > -64) { + /* Normal case -- shift right and notice if bits shift out. */ + inexact =3D (frac << (64 + shift)) !=3D 0; + frac >>=3D -shift; + } else { + /* The fraction is shifted out entirely. */ + frac =3D 0; + } + + /* Notice overflow or inexact exceptions. */ + if (true_exp > 31 || frac > (sign ? 0x80000000ull : 0x7fffffff)) { + /* Overflow, for which this operation raises invalid. */ + float_raise(float_flag_invalid, status); + inexact =3D 1; + } else if (inexact) { + float_raise(float_flag_inexact, status); + } + + /* Honor the sign. */ + if (sign) { + frac =3D -frac; + } + } + + /* Pack the result and the env->ZF representation of Z together. */ + return deposit64(frac, 32, 32, inexact); +} diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 2f849a6951..b03e592edd 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -6526,6 +6526,24 @@ static void handle_fmov(DisasContext *s, int rd, int= rn, int type, bool itof) } } =20 +static void handle_fjcvtzs(DisasContext *s, int rd, int rn) +{ + TCGv_i64 t =3D read_fp_dreg(s, rn); + TCGv_ptr fpstatus =3D get_fpstatus_ptr(false); + + gen_helper_fjcvtzs(t, t, fpstatus); + + tcg_temp_free_ptr(fpstatus); + + tcg_gen_ext32u_i64(cpu_reg(s, rd), t); + tcg_gen_extrh_i64_i32(cpu_ZF, t); + tcg_gen_movi_i32(cpu_CF, 0); + tcg_gen_movi_i32(cpu_NF, 0); + tcg_gen_movi_i32(cpu_VF, 0); + + tcg_temp_free_i64(t); +} + /* Floating point <-> integer conversions * 31 30 29 28 24 23 22 21 20 19 18 16 15 10 9 5 4= 0 * +----+---+---+-----------+------+---+-------+-----+-------------+----+-= ---+ @@ -6601,6 +6619,14 @@ static void disas_fp_int_conv(DisasContext *s, uint3= 2_t insn) handle_fmov(s, rd, rn, type, itof); break; =20 + case 0b00111110: /* FJCVTZS */ + if (!dc_isar_feature(aa64_jscvt, s)) { + goto do_unallocated; + } else if (fp_access_check(s)) { + handle_fjcvtzs(s, rd, rn); + } + break; + default: do_unallocated: unallocated_encoding(s); diff --git a/target/arm/translate.c b/target/arm/translate.c index eb25895876..a92d06b05b 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4066,6 +4066,21 @@ static int disas_vfp_insn(DisasContext *s, uint32_t = insn) case 17: /* fsito */ gen_vfp_sito(dp, 0); break; + case 19: /* vjcvt */ + if (!dp || !dc_isar_feature(aa32_jscvt, s)) { + return 1; + } else { + TCGv_ptr fpst =3D get_fpstatus_ptr(0); + gen_helper_fjcvtzs(cpu_F0d, cpu_F0d, fpst); + tcg_temp_free_ptr(fpst); + + tcg_gen_extr_i64_i32(cpu_F0s, cpu_ZF, cpu_F0d); + tcg_gen_movi_i32(cpu_NF, 0); + tcg_gen_movi_i32(cpu_CF, 0); + tcg_gen_movi_i32(cpu_VF, 0); + dp =3D 0; /* always a single precision result = */ + } + break; case 20: /* fshto */ if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) { return 1; --=20 2.17.2