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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id n6sm2847250wmk.9.2019.02.01.08.07.52 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 08:07:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=W7oLdNSaKSUjqwVpKHmmF4LmDbxYNOsBX5IaUXX+7uI=; b=N1DnWinhQcw0K83M04USH3LhBloTVqug3zvNo8QEHM3gjUO3d/NwoOQUQYbFgU9Iw4 Wy5ZuS6fVDeuSqsbLBddt48xUeeLYFBL7rllcOIdHDaB9FYnE5wBrdrZaQq3B8hvI/+v Bb8SykZ4XzI9eEER+WZUtEXIcXxIZ1Q+s/O0w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=W7oLdNSaKSUjqwVpKHmmF4LmDbxYNOsBX5IaUXX+7uI=; b=ZMOVi/ciQcfgg8MPj79QHmDAKXx5YDtKxDbvV2wXoOa55K++JVOAyLScJXflrrwaJM 9enFoUICgF8E18lLJnzelSMc1w9Ejj1N9rcBKrZjRJYSeUz5glwLbuSEPw4hV+SKiyox +bquuQXDxCeV+9Ik9h9d1SXEhcPSln5/AHSA/+9RsZ2gmdkufA2t3lRlGkM2ZuJ/NYkZ eHlj4KMdF/rwEcTX7uBRlHxR7/wTlUkvYDqZEwJw++21vo7p/hsJIEsvs3GZ+nCrrljc pjDrBOcFeKKVHZhU3tVTIr87pnNE7PMZmBGXSeruj9VY4wcf2RjU5v8IAtbjN3jAtar7 W7+A== X-Gm-Message-State: AHQUAuZbM/NdDNn1pb1wJ9zniLxV+tvk+R7eMVmXt8ZBqW86xElG8+Gy dssk9zsQPdXhh5Pddx3FWpNa89gzU8SVBQ== X-Google-Smtp-Source: AHgI3IYkZhSxnsjkfJ8wtJa/LERDDjQYBvvssr0IWxdsx2Qydw9KW+uI+sValXE9RCcscvlaxqEgzA== X-Received: by 2002:a7b:cd85:: with SMTP id y5mr2950035wmj.129.1549037273642; Fri, 01 Feb 2019 08:07:53 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 1 Feb 2019 16:06:52 +0000 Message-Id: <20190201160653.13829-47-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190201160653.13829-1-peter.maydell@linaro.org> References: <20190201160653.13829-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::332 Subject: [Qemu-devel] [PULL 46/47] arm: Instantiate NRF51 special NVM's and NVMC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Steffen G=C3=B6rtz Instantiates UICR, FICR, FLASH and NVMC in nRF51 SOC. Signed-off-by: Steffen G=C3=B6rtz Reviewed-by: Peter Maydell Reviewed-by: Stefan Hajnoczi Signed-off-by: Stefan Hajnoczi Message-id: 20190201023357.22596-3-stefanha@redhat.com Signed-off-by: Peter Maydell --- include/hw/arm/nrf51_soc.h | 2 ++ hw/arm/nrf51_soc.c | 41 +++++++++++++++++++++++++++----------- 2 files changed, 31 insertions(+), 12 deletions(-) diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index fbdefc07e4d..fd7fcc71a56 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -15,6 +15,7 @@ #include "hw/char/nrf51_uart.h" #include "hw/misc/nrf51_rng.h" #include "hw/gpio/nrf51_gpio.h" +#include "hw/nvram/nrf51_nvm.h" #include "hw/timer/nrf51_timer.h" =20 #define TYPE_NRF51_SOC "nrf51-soc" @@ -32,6 +33,7 @@ typedef struct NRF51State { =20 NRF51UARTState uart; NRF51RNGState rng; + NRF51NVMState nvm; NRF51GPIOState gpio; NRF51TimerState timer[NRF51_NUM_TIMERS]; =20 diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index 3a1c7e200cc..bbaf050103a 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -29,8 +29,10 @@ * are supported in the future, add a sub-class of NRF51SoC for * the specific variants */ -#define NRF51822_FLASH_SIZE (256 * NRF51_PAGE_SIZE) -#define NRF51822_SRAM_SIZE (16 * NRF51_PAGE_SIZE) +#define NRF51822_FLASH_PAGES 256 +#define NRF51822_SRAM_PAGES 16 +#define NRF51822_FLASH_SIZE (NRF51822_FLASH_PAGES * NRF51_PAGE_SIZE) +#define NRF51822_SRAM_SIZE (NRF51822_SRAM_PAGES * NRF51_PAGE_SIZE) =20 #define BASE_TO_IRQ(base) ((base >> 12) & 0x1F) =20 @@ -81,14 +83,6 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Erro= r **errp) =20 memory_region_add_subregion_overlap(&s->container, 0, s->board_memory,= -1); =20 - memory_region_init_rom(&s->flash, OBJECT(s), "nrf51.flash", s->flash_s= ize, - &err); - if (err) { - error_propagate(errp, err); - return; - } - memory_region_add_subregion(&s->container, NRF51_FLASH_BASE, &s->flash= ); - memory_region_init_ram(&s->sram, OBJECT(s), "nrf51.sram", s->sram_size, &err); if (err) { @@ -122,6 +116,29 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Er= ror **errp) qdev_get_gpio_in(DEVICE(&s->cpu), BASE_TO_IRQ(NRF51_RNG_BASE))); =20 + /* UICR, FICR, NVMC, FLASH */ + object_property_set_uint(OBJECT(&s->nvm), s->flash_size, "flash-size", + &err); + if (err) { + error_propagate(errp, err); + return; + } + + object_property_set_bool(OBJECT(&s->nvm), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 0); + memory_region_add_subregion_overlap(&s->container, NRF51_NVMC_BASE, mr= , 0); + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 1); + memory_region_add_subregion_overlap(&s->container, NRF51_FICR_BASE, mr= , 0); + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 2); + memory_region_add_subregion_overlap(&s->container, NRF51_UICR_BASE, mr= , 0); + mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 3); + memory_region_add_subregion_overlap(&s->container, NRF51_FLASH_BASE, m= r, 0); + /* GPIO */ object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); if (err) { @@ -159,8 +176,6 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Err= or **errp) =20 create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE, NRF51_IOMEM_SIZE); - create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE, - NRF51_FICR_SIZE); create_unimplemented_device("nrf51_soc.private", NRF51_PRIVATE_BASE, NRF51_PRIVATE_SIZE); } @@ -187,6 +202,8 @@ static void nrf51_soc_init(Object *obj) sysbus_init_child_obj(obj, "rng", &s->rng, sizeof(s->rng), TYPE_NRF51_RNG); =20 + sysbus_init_child_obj(obj, "nvm", &s->nvm, sizeof(s->nvm), TYPE_NRF51_= NVM); + sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), TYPE_NRF51_GPIO); =20 --=20 2.20.1